* cp-demangle.c (is_fnqual_component_type): Reimplement using
FNQUAL_COMPONENT_CASE.
(d_encoding): Hold bare_function_type in local var.
(d_local_name): Build name in both cases and build result once.
Collapse switch-if to single conditional.
* testsuite/demangle-expected: Realign blank lines with tests.
Richard Biener [Fri, 15 Sep 2017 07:03:02 +0000 (07:03 +0000)]
re PR tree-optimization/68823 ([graphite] tramp3d-v4 compiled with -floop-nest-optimize crashes)
2017-09-15 Richard Biener <rguenther@suse.de>
PR tree-optimization/68823
* graphite-scop-detection.c (build_alias_set): If we have a
possible dependence check whether we can handle them by just
looking at the DRs DR_ACCESS_FNs.
(build_scops): If build_alias_set fails, fail the SCOP.
Michael Meissner [Thu, 14 Sep 2017 20:44:40 +0000 (20:44 +0000)]
rs6000-builtin.def (BU_FLOAT128_1_HW): New macros to support float128 built-in functions that require the ISA 3.0 hardware.
[gcc]
2017-09-14 Michael Meissner <meissner@linux.vnet.ibm.com>
* config/rs6000/rs6000-builtin.def (BU_FLOAT128_1_HW): New macros
to support float128 built-in functions that require the ISA 3.0
hardware.
(BU_FLOAT128_3_HW): Likewise.
(SQRTF128): Add support for the IEEE 128-bit square root and fma
built-in functions.
(FMAF128): Likewise.
(FMAQ): Likewise.
* config/rs6000/rs6000.c (rs6000_builtin_mask_calculate): Add
support for built-in functions that need the ISA 3.0 IEEE 128-bit
floating point instructions.
(rs6000_invalid_builtin): Likewise.
(rs6000_builtin_mask_names): Likewise.
* config/rs6000/rs6000.h (MASK_FLOAT128_HW): Likewise.
(RS6000_BTM_FLOAT128_HW): Likewise.
(RS6000_BTM_COMMON): Likewise.
* config/rs6000/rs6000.md (fma<mode>4_hw): Add a generator
function.
* doc/extend.texi (RS/6000 built-in functions): Document the
IEEE 128-bit floating point square root and fused multiply-add
built-in functions.
[gcc/testsuite]
2017-09-14 Michael Meissner <meissner@linux.vnet.ibm.com>
* gcc.target/powerpc/abs128-1.c: Use __builtin_fabsf128 instead of
__builtin_fabsq.
* gcc.target/powerpc/float128-5.c: Use __builtin_fabsf128 instead
of __builtin_fabsq. Prevent the test from running on 32-bit.
* gcc.target/powerpc/float128-fma1.c: New test.
* gcc.target/powerpc/float128-fma2.c: Likewise.
* gcc.target/powerpc/float128-sqrt1.c: Likewise.
* gcc.target/powerpc/float128-sqrt2.c: Likewise.
David Malcolm [Thu, 14 Sep 2017 19:30:26 +0000 (19:30 +0000)]
Fix crash accessing builtins in sanitizer.def and after (PR jit/82174)
Calls to gcc_jit_context_get_builtin_function that accessed builtins
in sanitizer.def and after (or failed to match any builtin) led to
a crash accessing a NULL builtin name.
The entries with the NULL name came from these lines in sanitizer.def:
/* This has to come before all the sanitizer builtins. */
DEF_BUILTIN_STUB(BEGIN_SANITIZER_BUILTINS, (const char *)0)
[...snip...]
/* This has to come after all the sanitizer builtins. */
DEF_BUILTIN_STUB(END_SANITIZER_BUILTINS, (const char *)0)
This patch updates jit-builtins.c to cope with such entries, fixing the
crash.
gcc/jit/ChangeLog:
PR jit/82174
* jit-builtins.c (matches_builtin): Ignore entries with a NULL
name.
gcc/testsuite/ChangeLog:
PR jit/82174
* jit.dg/test-error-gcc_jit_context_get_builtin_function-unknown-builtin.c:
New test case.
Epilogue vectorisation uses the vectorisation factor of the main loop
as the maximum vectorisation factor allowed for correctness. That makes
sense as a conservatively correct value, since the chosen vectorisation
factor will be strictly less than that anyway. However, once the VF
itself becomes variable, it's easier to carry across the original
maximum VF instead.
2017-09-14 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* tree-vectorizer.h (_loop_vec_info): Add max_vectorization_factor.
(LOOP_VINFO_MAX_VECT_FACTOR): New macro.
(LOOP_VINFO_ORIG_VECT_FACTOR): Replace with...
(LOOP_VINFO_ORIG_MAX_VECT_FACTOR): ...this new macro.
* tree-vect-data-refs.c (vect_analyze_data_ref_dependences): Update
accordingly.
* tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Initialize
max_vectorization_factor.
(vect_analyze_loop_2): Set LOOP_VINFO_MAX_VECT_FACTOR.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com> Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r252766
Add a vect_worthwhile_without_simd_p helper routine
The vectoriser sometimes considers lowering "vector" operations into N
scalar word operations. This N needs to be fixed at compile time, so
the condition guarding it needs to change when variable-lengh vectors
are added. This patch puts the condition into a helper routine so that
there's only one place to update.
2017-09-14 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* tree-vectorizer.h (vect_min_worthwhile_factor): Delete.
(vect_worthwhile_without_simd_p): Declare.
* tree-vect-loop.c (vect_worthwhile_without_simd_p): New function.
(vectorizable_reduction): Use it.
* tree-vect-stmts.c (vectorizable_shift): Likewise.
(vectorizable_operation): Likewise.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com> Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r252765
Make more use of gimple-fold.h in tree-vect-loop.c
This patch makes the vectoriser use the gimple-fold.h routines
in more cases, instead of vect_init_vector. Later patches want
to use the same interface to handle variable-length vectors.
2017-09-14 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* tree-vect-loop.c (vectorizable_induction): Use gimple_build instead
of vect_init_vector.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com> Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r252763
This patch adds gimple-fold.h equivalents of build_vector and
build_vector_from_val. Like the other gimple-fold.h routines
they always return a valid gimple value and add any new
statements to a given gimple_seq. In combination with later
patches this reduces the number of force_gimple_operands.
2017-09-14 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* gimple-fold.h (gimple_build_vector_from_val): Declare, and provide
an inline wrapper that provides a location.
(gimple_build_vector): Likewise.
* gimple-fold.c (gimple_build_vector_from_val): New function.
(gimple_build_vector): Likewise.
* tree-vect-loop.c (get_initial_def_for_reduction): Use the new
functions to build the initial value. Always return a gimple value.
(get_initial_defs_for_reduction): Likewise. Only compute
neutral_vec once.
(vect_create_epilog_for_reduction): Don't call force_gimple_operand or
vect_init_vector on the results from get_initial_def(s)_for_reduction.
(vectorizable_induction): Use gimple_build_vector rather than
vect_init_vector.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com> Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r252762
This patch makes can_vec_perm_p & co. take a vec<>, wrapped in new
typedefs vec_perm_indices and auto_vec_perm_indices. There are two
reasons for doing this for SVE:
(1) it means that the number of elements is bundled with the elements
themselves, and is obviously constant.
(2) it makes it easier to change the "unsigned char" element type to
something wider.
Changing the target hook is left as follow-on work.
2017-09-14 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* target.h (vec_perm_indices): New typedef.
(auto_vec_perm_indices): Likewise.
* optabs-query.h: Include target.h
(can_vec_perm_p): Take a vec_perm_indices *.
* optabs-query.c (can_vec_perm_p): Likewise.
(can_mult_highpart_p): Update accordingly. Use auto_vec_perm_indices.
* tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
* tree-vect-generic.c (lower_vec_perm): Likewise.
* tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
(vect_grouped_load_supported): Likewise.
(vect_shift_permute_load_chain): Likewise.
(vect_permute_store_chain): Use auto_vec_perm_indices.
(vect_permute_load_chain): Likewise.
* fold-const.c (fold_vec_perm): Take vec_perm_indices.
(fold_ternary_loc): Update accordingly. Use auto_vec_perm_indices.
Update uses of can_vec_perm_p.
* tree-vect-loop.c (calc_vec_perm_mask_for_shift): Replace the
mode with a number of elements. Take a vec_perm_indices *.
(vect_create_epilog_for_reduction): Update accordingly.
Use auto_vec_perm_indices.
(have_whole_vector_shift): Likewise. Update call to can_vec_perm_p.
* tree-vect-slp.c (vect_build_slp_tree_1): Likewise.
(vect_transform_slp_perm_load): Likewise.
(vect_schedule_slp_instance): Use auto_vec_perm_indices.
* tree-vectorizer.h (vect_gen_perm_mask_any): Take a vec_perm_indices.
(vect_gen_perm_mask_checked): Likewise.
* tree-vect-stmts.c (vect_gen_perm_mask_any): Take a vec_perm_indices.
(vect_gen_perm_mask_checked): Likewise.
(vectorizable_mask_load_store): Use auto_vec_perm_indices.
(vectorizable_store): Likewise.
(vectorizable_load): Likewise.
(perm_mask_for_reverse): Likewise. Update call to can_vec_perm_p.
(vectorizable_bswap): Likewise.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com> Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r252761
This patch makes build_vector take the elements as a vec<> rather
than a tree *. This is useful for SVE because it bundles the number
of elements with the elements themselves, and enforces the fact that
the number is constant. Also, I think things like the folds can be used
with any generic GNU vector, not just those that match machine vectors,
so the arguments to XALLOCAVEC had no clear limit.
2017-09-14 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* tree.h (build_vector): Take a vec<tree> instead of a tree *.
* tree.c (build_vector): Likewise.
(build_vector_from_ctor): Update accordingly.
(build_vector_from_val): Likewise.
* gimple-fold.c (gimple_fold_stmt_to_constant_1): Likewise.
* tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
* tree-vect-generic.c (add_rshift): Likewise.
(expand_vector_divmod): Likewise.
(optimize_vector_constructor): Likewise.
* tree-vect-slp.c (vect_get_constant_vectors): Likewise.
(vect_transform_slp_perm_load): Likewise.
(vect_schedule_slp_instance): Likewise.
* tree-vect-stmts.c (vectorizable_bswap): Likewise.
(vectorizable_call): Likewise.
(vect_gen_perm_mask_any): Likewise. Add elements in order.
* expmed.c (make_tree): Likewise.
* fold-const.c (fold_negate_expr_1): Use auto_vec<tree> when building
a vector passed to build_vector.
(fold_convert_const): Likewise.
(exact_inverse): Likewise.
(fold_ternary_loc): Likewise.
(fold_relational_const): Likewise.
(const_binop): Likewise. Use VECTOR_CST_ELT directly when operating
on VECTOR_CSTs, rather than going through vec_cst_ctor_to_array.
(const_unop): Likewise. Store the reduction accumulator in a
variable rather than an array.
(vec_cst_ctor_to_array): Take the number of elements as a parameter.
(fold_vec_perm): Update calls accordingly. Use auto_vec<tree> for
the new vector, rather than constructing it after the input arrays.
(native_interpret_vector): Use auto_vec<tree> when building
a vector passed to build_vector. Add elements in order.
* tree-vect-loop.c (get_initial_defs_for_reduction): Use
auto_vec<tree> when building a vector passed to build_vector.
(vect_create_epilog_for_reduction): Likewise.
(vectorizable_induction): Likewise.
(get_initial_def_for_reduction): Likewise. Fix indentation of
case statements.
* config/sparc/sparc.c (sparc_handle_vis_mul8x16): Change n_elts
to a vec<tree> *.
(sparc_fold_builtin): Use auto_vec<tree> when building a vector
passed to build_vector.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com> Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r252760
Previously VECTOR_CST_NELTS (t) read the number of elements from
TYPE_VECTOR_SUBPARTS (TREE_TYPE (t)). There were two ways of handling
this with variable TYPE_VECTOR_SUBPARTS: either forcibly convert the
number to a constant (which is doable) or store the number directly
in the VECTOR_CST. The latter seemed better, since it involves less
pointer chasing and since the tree_node u field is otherwise unused
for VECTOR_CST. It would still be easy to switch to the former in
future if we need to free up the field for someting else.
The patch also changes various bits of VECTOR_CST code to use
VECTOR_CST_NELTS instead of TYPE_VECTOR_SUBPARTS when iterating
over VECTOR_CST_ELTs. Also, when the two are checked for equality,
the patch prefers to read VECTOR_CST_NELTS (which must be constant)
and check against TYPE_VECTOR_SUBPARTS, instead of the other way
around.
2017-09-14 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* tree-core.h (tree_base::u): Add an "nelts" field.
(tree_vector): Use VECTOR_CST_NELTS as the length.
* tree.c (tree_size): Likewise.
(make_vector): Initialize VECTOR_CST_NELTS.
* tree.h (VECTOR_CST_NELTS): Use the u.nelts field.
* cfgexpand.c (expand_debug_expr): Use VECTOR_CST_NELTS instead of
TYPE_VECTOR_SUBPARTS.
* expr.c (const_vector_mask_from_tree): Consistently use "units"
as the number of units, setting it from VECTOR_CST_NELTS.
(const_vector_from_tree): Likewise.
* fold-const.c (negate_expr_p): Use VECTOR_CST_NELTS instead of
TYPE_VECTOR_SUBPARTS for the number of elements in a VECTOR_CST.
(fold_negate_expr_1): Likewise.
(fold_convert_const): Likewise.
(const_binop): Likewise. Differentiate the number of output and
input elements.
(const_unop): Likewise.
(fold_ternary_loc): Use VECTOR_CST_NELTS for the number of elements
in a VECTOR_CST, asserting that it is the same as TYPE_VECTOR_SUBPARTS
in cases that did the opposite.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com> Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r252758
Jakub Jelinek [Thu, 14 Sep 2017 08:07:30 +0000 (10:07 +0200)]
re PR target/81325 (-fcompare-debug failure on ppc64le)
PR target/81325
* cfgbuild.c (find_bb_boundaries): Ignore debug insns in decisions
if and where to split a bb, except for splitting before debug insn
sequences followed by non-label real insn. Delete debug insns
in between basic blocks.
Ian Lance Taylor [Thu, 14 Sep 2017 03:57:18 +0000 (03:57 +0000)]
compiler, runtime: simplify select and channel operations
In preparation for upgrading libgo to the 1.9 release, this
approximately incorporates https://golang.org/cl/37661 and
https://golang.org/cl/38351.
CL 37661 changed the gc compiler such that the select statement simply
returns an integer which is then used as the argument for a switch.
Since gccgo already worked that way, this just adjusts the switch code
to look like the gc switch code by removing the explicit case index
expression and calculating it from the order of calls to selectsend,
selectrecv, and selectdefault.
CL 38351 simplifies the channel code by not passing the unused channel
type descriptor pointer.
Ian Lance Taylor [Thu, 14 Sep 2017 03:53:21 +0000 (03:53 +0000)]
compiler: avoid compiler crash on invalid program
I encountered this crash while working on upgrading libgo to the 1.9
release. I no longer have the cause of the crash, but it doesn't much
matter, as the policy for crash-on-invalid errors is to fix the crash
but not bother to commit the invalid test case.
Ian Lance Taylor [Thu, 14 Sep 2017 03:51:21 +0000 (03:51 +0000)]
compiler: emit type specific functions for aliases
If we have an alias for a struct or array that requires a
type-specific function, don't emit the function with the alias name.
Emit it with the struct/array as usual.
Ian Lance Taylor [Thu, 14 Sep 2017 03:48:51 +0000 (03:48 +0000)]
compiler, reflect: fix struct field names for embedded aliases
This adds much of https://golang.org/cl/35731 and
https://golang.org/cl/35732 to the gofrontend code.
This is a step toward updating libgo to the 1.9 release. The
gofrontend already supports type aliases, and this is required for
correct support of type aliases when used as embedded fields.
The change to expressions.cc is to handle the << 1, used for the
newly renamed offsetAnon field, in the constant context used for type
descriptor initialization.
Ian Lance Taylor [Thu, 14 Sep 2017 03:45:44 +0000 (03:45 +0000)]
compiler: fix check for notinheap conversion
A normal pointer may not be converted to a notinheap pointer. We were
erroneously permitting a conversion from a normal pointer to a
notinheap unsafe.Pointer, which is useless since unsafe.Pointer is not
marked notinheap. Correct the test to permit a conversion from
unsafe.Pointer to a notinheap pointer, which is the same test that the
gc compiler uses.
The test case for this is in the 1.9 runtime package.
Paul Thomas [Wed, 13 Sep 2017 21:15:26 +0000 (21:15 +0000)]
re PR fortran/82173 ([meta-bug] Parameterized derived type errors)
2017-09-13 Paul Thomas <pault@gcc.gnu.org>
PR fortran/82173
* decl.c (match_char_kind): If the kind expression is
parameterized, save it in saved_kind_expr and set kind = 0.
(gfc_get_pdt_instance): Resolve and simplify before emitting
error on expression kind. Insert a missing simplification after
insertion of kind expressions.
2017-09-13 Paul Thomas <pault@gcc.gnu.org>
PR fortran/82173
* gfortran.dg/pdt_10.f03 : New test.
Since the patch is going through all the definitions anyway, it seemed
like a good opportunity to put the mode argument first, to match the
order for register_move_cost.
2017-09-13 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* target.def (secondary_memory_needed): New hook.
(secondary_reload): Refer to TARGET_SECONDARY_MEMORY_NEEDED
instead of SECONDARY_MEMORY_NEEDED.
(secondary_memory_needed_mode): Likewise.
* hooks.h (hook_bool_mode_reg_class_t_reg_class_t_false): Declare.
* hooks.c (hook_bool_mode_reg_class_t_reg_class_t_false): New function.
* doc/tm.texi.in (SECONDARY_MEMORY_NEEDED): Replace with...
(TARGET_SECONDARY_MEMORY_NEEDED): ...this.
(SECONDARY_MEMORY_NEEDED_RTX): Update reference accordingly.
* doc/tm.texi: Regenerate.
* config/alpha/alpha.h (SECONDARY_MEMORY_NEEDED): Delete.
* config/alpha/alpha.c (alpha_secondary_memory_needed): New function.
(TARGET_SECONDARY_MEMORY_NEEDED): Redefine.
* config/i386/i386.h (SECONDARY_MEMORY_NEEDED): Delete.
* config/i386/i386-protos.h (ix86_secondary_memory_needed): Delete.
* config/i386/i386.c (inline_secondary_memory_needed): Put the
mode argument first and change the reg_class arguments to reg_class_t.
(ix86_secondary_memory_needed): Likewise. Remove the strict parameter.
Make static. Update the call to inline_secondary_memory_needed.
(ix86_register_move_cost): Update the call to
inline_secondary_memory_needed.
(TARGET_SECONDARY_MEMORY_NEEDED): Redefine.
* config/ia64/ia64.h (SECONDARY_MEMORY_NEEDED): Delete commented-out
definition.
* config/ia64/ia64.c (spill_xfmode_rfmode_operand): Refer to
TARGET_SECONDARY_MEMORY_NEEDED rather than SECONDARY_MEMORY_NEEDED
in comment.
* config/mips/mips.h (SECONDARY_MEMORY_NEEDED): Delete.
* config/mips/mips-protos.h (mips_secondary_memory_needed): Delete.
* config/mips/mips.c (mips_secondary_memory_needed): Make static
and match hook interface. Add comment from mips.h.
(TARGET_SECONDARY_MEMORY_NEEDED): Redefine.
* config/mmix/mmix.md (truncdfsf2): Refer to
TARGET_SECONDARY_MEMORY_NEEDED rather than SECONDARY_MEMORY_NEEDED
in comment.
* config/pa/pa-64.h (SECONDARY_MEMORY_NEEDED): Rename to...
(PA_SECONDARY_MEMORY_NEEDED): ...this, and put the mode argument first.
* config/pa/pa.c (TARGET_SECONDARY_MEMORY_NEEDED): Redefine.
(pa_secondary_memory_needed): New function.
* config/pdp11/pdp11.h (SECONDARY_MEMORY_NEEDED): Delete.
* config/pdp11/pdp11-protos.h (pdp11_secondary_memory_needed): Delete.
* config/pdp11/pdp11.c (TARGET_SECONDARY_MEMORY_NEEDED): Redefine.
(pdp11_secondary_memory_needed): Make static and match hook interface.
* config/powerpcspe/powerpcspe.h (SECONDARY_MEMORY_NEEDED): Delete.
* config/powerpcspe/powerpcspe-protos.h
(rs6000_secondary_memory_needed_ptr): Delete.
* config/powerpcspe/powerpcspe.c (rs6000_secondary_memory_needed_ptr):
Delete.
(TARGET_SECONDARY_MEMORY_NEEDED): Redefine.
(rs6000_option_override_internal): Assign to
targetm.secondary_memory_needed rather than
rs6000_secondary_memory_needed_ptr.
(rs6000_secondary_memory_needed): Match hook interface.
(rs6000_debug_secondary_memory_needed): Likewise.
* config/riscv/riscv.h (SECONDARY_MEMORY_NEEDED): Delete.
* config/riscv/riscv.c (riscv_secondary_memory_needed): New function.
(riscv_register_move_cost): Use it instead of SECONDARY_MEMORY_NEEDED.
(TARGET_SECONDARY_MEMORY_NEEDED): Redefine.
* config/rs6000/rs6000.h (SECONDARY_MEMORY_NEEDED): Delete.
* config/rs6000/rs6000-protos.h (rs6000_secondary_memory_needed_ptr):
Delete.
* config/rs6000/rs6000.c (rs6000_secondary_memory_needed_ptr): Delete.
(TARGET_SECONDARY_MEMORY_NEEDED): Redefine.
(rs6000_option_override_internal): Assign to
targetm.secondary_memory_needed rather than
rs6000_secondary_memory_needed_ptr.
(rs6000_secondary_memory_needed): Match hook interface.
(rs6000_debug_secondary_memory_needed): Likewise.
* config/s390/s390.h (SECONDARY_MEMORY_NEEDED): Delete.
* config/s390/s390.c (s390_secondary_memory_needed): New function.
(TARGET_SECONDARY_MEMORY_NEEDED): Redefine.
* config/sparc/sparc.h (SECONDARY_MEMORY_NEEDED): Delete.
* config/sparc/sparc.c (TARGET_SECONDARY_MEMORY_NEEDED): Redefine.
(sparc_secondary_memory_needed): New function.
* lra-constraints.c (check_and_process_move): Refer to
TARGET_SECONDARY_MEMORY_NEEDED rather than SECONDARY_MEMORY_NEEDED
in comment.
(curr_insn_transform): Likewise.
(process_alt_operands): Use targetm.secondary_memory_needed
instead of TARGET_SECONDARY_MEMORY_NEEDED.
(check_secondary_memory_needed_p): Likewise.
(choose_split_class): Likewise.
* reload.c: Unconditionally include code that was previously
conditional on SECONDARY_MEMORY_NEEDED.
(push_secondary_reload): Use targetm.secondary_memory_needed
instead of TARGET_SECONDARY_MEMORY_NEEDED.
(push_reload): Likewise.
* reload1.c: Unconditionally include code that was previously
conditional on SECONDARY_MEMORY_NEEDED.
(choose_reload_regs): Use targetm.secondary_memory_needed
instead of TARGET_SECONDARY_MEMORY_NEEDED.
(gen_reload): Likewise.
* system.h (SECONDARY_MEMORY_NEEDED): Poison.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com> Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r252461
in which the positioning of the second ifdef meant that defining
SECONDARY_MEMORY_NEEDED_MODE to its default value was not a no-op:
without a definition, we would consider using secondary reloads for
mem<-reg and reg<-mem reloads even if the secondary memory has the
same mode as the original mem, while defining it would avoid this.
The latter behaviour seems correct.
The default is different for reload and LRA. For LRA the default is
to use the original mode, while reload promotes smaller-than-word
integral modes to word mode:
Some of the ports that have switched to LRA seemed to have
SECONDARY_MEMORY_NEEDED_MDOEs based on the old reload definition,
and still referred to the reload.c:get_secondary_mem function in
the comments. The patch just keeps them as-is.
2017-09-13 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
Jackson Woodruff [Wed, 13 Sep 2017 16:49:42 +0000 (16:49 +0000)]
[AArch64, PATCH] Improve Neon store of zero
Committed on behalf of Jackson Woodruff.
---
gcc/
* config/aarch64/constraints.md (Umq): New constraint.
* config/aarch64/aarch64-simd.md (*aarch64_simd_mov<mode>):
Change to use Umq.
(mov<mode>): Update condition.
This patch changes pr62178.c so that it now scans
for two `ldr`s, one into an `s` register, instead
of a `ld1r` as before. Also add a scan for an mla
instruction.
The `ld1r` was needed when this should have generated
a mla by vector. Now that we can generate an mla by
element instruction and can load directly into the
simd register, it is cheaper to not do the ld1r
which needlessly duplicates the single element used
across the whole vector register.
Committed on behalf of Jackson Woodruff
gcc/testsuite/
* gcc.target/aarch64/pr62178.c: Updated testcase
to scan for two ldrs and an mla.
[store-merging] Use store order as tie-breaker in sort_by_bitpos
As Alexander pointed out in the thread starting at [1] the sort_by_bitpos sorting function
was behaving badly when we had multiple stores at the same position. He fixed that (thanks!)
but we can do better by not returning zero when the bitpositions are equal but by falling back
to comparing the order the stores appear in, which is guaranteed to be unique (barring other
bugs elsewhere).
This patch does that.
Bootstrapped and tested on aarch64-none-linux-gnu.
Conv-op identifers not in identifier hash table
* lex.c (conv_type_hasher): Make member fns inline.
(make_conv_op_name): Directly clone conv_op_identifier.
Rename CLASSTYPE_METHOD_VEC to CLASSTYPE_MEMBER_VEC.
* cp-tree.h (struct lang_type): Rename methods to members.
(CLASSTYPE_METHOD_VEC): Rename to ...
(CLASSTYPE_MEMBER_VEC): ... this.
* name-lookup.h (get_method_slot): Rename to ...
(get_member_slot): ... this.
(resort_type_method_vec): Rename to ...
(resort_type_member_vec): ... this.
* class.c (add_method, warn_hidden): Adjust.
* search.c (dfs_locate_field_accessor_pre): Adjust.
* name-lookup.c (method_vec_binary_search): Rename to ...
(member_vec_binary_search): ... this and adjust.
(method_vec_linear_search): Rename to ...
(member_vec_linear_search): ... this and adjust.
(fields_linear_search, get_class_binding_direct): Adjust.
(get_method_slot): Rename to ...
(get_member_slot): ... this and adjust.
(method_name_slot): Rename to ...
(member_name_slot): ... this and adjust.
(resort_type_method_vec): Rename to ...
(resort_type_member_vec): ... this and adjust.
(method_vec_append_class_fields): Rename to ...
(member_vec_append_class_fields): ... this and adjust.
(method_vec_append_enum_values): Rename to ...
(member_vec_append_enum_values): ... this and adjust.
(method_vec_dedup): Rename to ...
(member_vec_dedup): ... this and adjust.
(set_class_bindings, insert_late_enum_def_bindings): Adjust.
* sem_ch13.adb (Register_Address_Clause_Check): New procedure to save
the suppression status of Alignment_Check on the current scope.
(Alignment_Checks_Suppressed): New function to use the saved instead of
the current suppression status of Alignment_Check.
(Address_Clause_Check_Record): Add Alignment_Checks_Suppressed field.
(Analyze_Attribute_Definition_Clause): Instead of manually appending to
the table, call Register_Address_Clause_Check.
(Validate_Address_Clauses): Call Alignment_Checks_Suppressed on the
recorded address clause instead of its entity.
2017-09-13 Jerome Guitton <guitton@adacore.com>
* libgnarl/s-tpopsp__vxworks-tls.adb,
libgnarl/s-tpopsp__vxworks-rtp.adb, libgnarl/s-tpopsp__vxworks.adb
(Self): Register thread if task id is null.
2017-09-13 Arnaud Charlet <charlet@adacore.com>
* libgnat/s-htable.adb, libgnat/s-htable.ads: Minor style tuning.
2017-09-13 Arnaud Charlet <charlet@adacore.com>
* lib-xref-spark_specific.adb (Scopes): simplify hash map; now it maps
from an entity to only scope index, as a mapping from an entity to the
same entity was useless.
(Get_Scope_Num): refactor as a simple renaming; rename parameter from N
to E.
(Set_Scope_Num): refactor as a simple renaming; rename parameter from N
to E.
(Is_Constant_Object_Without_Variable_Input): remove local "Result"
variable, just use return statements.
[testsuite/ARM] Fix coprocessor intrinsic test failures on ARMv8-A
Coprocessor intrinsic tests in gcc.target/arm/acle test whether
__ARM_FEATURE_COPROC has the right bit defined before calling the
intrinsic. This allows to test both the correct setting of that macro
and the availability and correct working of the intrinsic. However the
__ARM_FEATURE_COPROC macro is no longer defined for ARMv8-A since
r249399.
This patch changes the testcases to skip that test for ARMv8-A and
ARMv8-R targets. It also fixes some irregularity in the coprocessor
effective targets:
- add ldcl and stcl to the list of instructions listed as guarded by
arm_coproc1_ok
- enable tests guarded by arm_coproc2_ok, arm_coproc3_ok and
arm_coproc4_ok for Thumb-2 capable targets but disable for Thumb-1
targets.
2017-09-13 Thomas Preud'homme <thomas.preudhomme@arm.com>
* einfo.adb: Flag42 is now Is_Controlled_Active.
(Is_Controlled): This attribute is now synthesized.
(Is_Controlled_Active): This attribute is now an explicit flag rather
than a synthesized attribute. (Set_Is_Controlled): Removed.
(Set_Is_Controlled_Active): New routine.
(Write_Entity_Flags): Update the output for Flag42.
* einfo.ads: Update the documentation of the following attributes:
Disable_Controlled, Is_Controlled, Is_Controlled_Active, Is_Controlled
and Is_Controlled_Active have swapped their functionality.
(Is_Controlled): Renamed to Is_Controlled_Active.
(Is_Controlled_Active): Renamed to Is_Controlled.
(Set_Is_Controlled): Renamed to Set_Is_Controlled_Active.
* exp_ch3.adb (Expand_Freeze_Record_Type): Restore the original use of
Is_Controlled.
* exp_util.adb (Has_Some_Controlled_Component): Code clean up.
(Needs_Finalization): Code clean up. Remove the tests for
Disable_Controlled because a) they were incorrect as they would reject
a type which is sublect to the aspect, but may contain controlled
components, and b) they are no longer necessary.
* exp_util.ads (Needs_Finalization): Update comment on documentation.
* freeze.adb (Freeze_Array_Type): Restore the original use of
Is_Controlled.
(Freeze_Record_Type): Restore the original use of Is_Controlled.
* sem_ch3.adb (Analyze_Object_Declaration): Restore the original use of
Is_Controlled.
(Array_Type_Declaration): Restore the original use of Is_Controlled.
(Build_Derived_Private_Type): Restore the original use of
Is_Controlled.
(Build_Derived_Record_Type): Set the Is_Controlled_Active flag of a
type derived from Ada.Finalization.[Limited_]Controlled.
(Build_Derived_Type): Restore the original use of Is_Controlled.
(Record_Type_Definition): Restore the original use of Is_Controlled.
* sem_ch7.adb (Preserve_Full_Attributes): Restore the original use of
Is_Controlled.
* sem_ch13.adb (Analyze_Aspect_Disable_Controlled): New routine.
(Analyze_Aspect_Specifications): Use routine
Analyze_Aspect_Disable_Controlled to process aspect Disable_Controlled.
2017-09-13 Vincent Celier <celier@adacore.com>
* clean.adb (Gnatclean): Fix error when looking for target
of <target>-gnatclean
2017-09-13 Javier Miranda <miranda@adacore.com>
Ed Schonberg <schonberg@adacore.com>
* sem_ch8.adb (Find_Expanded_Name): Complete code that identifies an
expanded name that designates the current instance of a child unit in
its own body and appears as the prefix of a reference to an entity
local to the child unit.
Richard Biener [Wed, 13 Sep 2017 08:13:03 +0000 (08:13 +0000)]
re PR tree-optimization/82128 (ICE on valid code)
2017-09-13 Richard Biener <rguenther@suse.de>
PR middle-end/82128
* gimple-fold.c (gimple_fold_call): Update SSA name in-place to
default-def to avoid breaking iterator update with the weird
interaction with cgraph_update_edges_for_call_stmt_node.
* config/aarch64/aarch64.c (aarch64_override_options_after_change_1):
Disable pc relative literal load irrespective of TARGET_FIX_ERR_A53_84341
for default.
Paul Thomas [Tue, 12 Sep 2017 18:06:52 +0000 (18:06 +0000)]
re PR fortran/82173 ([meta-bug] Parameterized derived type errors)
2017-09-12 Paul Thomas <pault@gcc.gnu.org>
PR fortran/82173
PR fortran/82168
* decl.c (variable_decl): Check pdt template components for
appearance of KIND/LEN components in the type parameter name
list, that components corresponding to type parameters have
either KIND or LEN attributes and that KIND or LEN components
are scalar. Copy the initializer to the parameter value.
(gfc_get_pdt_instance): Add a label 'error_return' and follow
it with repeated code, while replacing this code with a jump.
Check if a parameter appears as a component in the template.
Make sure that the parameter expressions are integer. Validate
KIND expressions.
(gfc_match_decl_type_spec): Search for pdt_types in the parent
namespace since they are instantiated in the template ns.
* expr.c (gfc_extract_int): Use a KIND parameter if it
appears as a component expression.
(gfc_check_init_expr): Allow expressions with the pdt_kind
attribute.
*primary.c (gfc_match_actual_arglist): Make sure that the first
keyword argument is recognised when 'pdt' is set.
2017-09-12 Paul Thomas <pault@gcc.gnu.org>
PR fortran/82173
* gfortran.dg/pdt_4.f03 : Remove the 'is being used before it
is defined' error.
* gfortran.dg/pdt_6.f03 : New test.
* gfortran.dg/pdt_7.f03 : New test.
* gfortran.dg/pdt_8.f03 : New test.
PR fortran/82168
* gfortran.dg/pdt_9.f03 : New test.
Jiong Wang [Tue, 12 Sep 2017 16:39:59 +0000 (16:39 +0000)]
Add DW_CFA_AARCH64_negate_ra_state to dwarf2.def/h and dwarfnames.c
A new vendor CFA DW_CFA_AARCH64_negate_ra_state was introduced for ARMv8.3-A
return address signing, it is multiplexing DW_CFA_GNU_window_save in CFA vendor
extension space.
This patch adds necessary code to make it available to external, the GDB
patch (https://sourceware.org/ml/gdb-patches/2017-08/msg00215.html) is intended
to use it.
A new DW_CFA_DUP for it is added in dwarf2.def. The use of DW_CFA_DUP is to
avoid duplicated case value issue when included in libiberty/dwarfnames.
Native x86 builds OK to make sure no macro expanding errors.
Committed on behalf of Jiong Wang.
include/
* dwarf2.def (DW_CFA_AARCH64_negate_ra_state): New DW_CFA_DUP.
* dwarf2.h (DW_CFA_DUP): New define.
libiberty/
* dwarfnames.c (DW_CFA_DUP): New define.
H.J. Lu [Tue, 12 Sep 2017 16:35:39 +0000 (16:35 +0000)]
Don't warn function alignment if warn_if_not_aligned_p is true
When warn_if_not_aligned_p is true, a warning will be issued on function
declaration later. There is no need to warn function alignment when
warn_if_not_aligned_p is true.
* c-attribs.c (common_handle_aligned_attribute): Don't warn
function alignment if warn_if_not_aligned_p is true.
H.J. Lu [Tue, 12 Sep 2017 16:30:28 +0000 (16:30 +0000)]
Add -static-pie to GCC driver to create static PIE
This patch adds -static-pie to GCC driver to create static PIE. A static
position independent executable (PIE) is similar to static executable,
but can be loaded at any address without a dynamic linker. All linker
input files must be compiled with -fpie or -fPIE and linker must support
--no-dynamic-linker to avoid linking with dynamic linker. "-z text" is
also needed to prevent dynamic relocations in read-only segments.
Remove the remaining uses of '*' from the movsi/di/ti patterns.
Using '*' in alternatives is typically incorrect at it tells the register
allocator to ignore those alternatives. So remove these from all the
integer move patterns. This removes unnecessary int to float moves, for
example gcc.target/aarch64/pr62178.c no longer generates a redundant fmov
since the w = m variant is now allowed.
Jakub Jelinek [Tue, 12 Sep 2017 15:25:15 +0000 (17:25 +0200)]
re PR target/82112 (internal compiler error: in fold_convert_loc, at fold-const.c:2262)
PR target/82112
* config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): For
ALTIVEC_BUILTIN_VEC_LD if arg1 has array type call default_conversion
on it early, rather than manual conversion late. For
ALTIVEC_BUILTIN_VEC_ST if arg2 has array type call default_conversion
instead of performing manual conversion.
* gcc.target/powerpc/pr82112.c: New test.
* g++.dg/ext/altivec-18.C: New test.
James Greenhalgh [Tue, 12 Sep 2017 14:57:58 +0000 (14:57 +0000)]
[Patch AArch64 2/2] Fix memory sizes to load/store patterns
There seems to be a partial misconception in the AArch64 backend that
load1/load2 referred to the number of registers to load, rather than the
number of words to load. This patch fixes that using the new "number of
byte" types added in the previous patch.
That means using the load_16 and store_16 types that were defined in the
previous patch for the first time in the AArch64 backend. To ensure
continuity for scheduling models, I've just split this out from load_8.
Please update your models if this is very wrong!
---
gcc/
* config/aarch64/aarch64.md (movdi_aarch64): Set load/store
types correctly.
(movti_aarch64): Likewise.
(movdf_aarch64): Likewise.
(movtf_aarch64): Likewise.
(load_pairdi): Likewise.
(store_pairdi): Likewise.
(load_pairdf): Likewise.
(store_pairdf): Likewise.
(loadwb_pair<GPI:mode>_<P:mode>): Likewise.
(storewb_pair<GPI:mode>_<P:mode>): Likewise.
(ldr_got_small_<mode>): Likewise.
(ldr_got_small_28k_<mode>): Likewise.
(ldr_got_tiny): Likewise.
* config/aarch64/iterators.md (ldst_sz): New.
(ldpstp_sz): Likewise.
* config/aarch64/thunderx.md (thunderx_storepair): Split store_8
to store_16.
(thunderx_load): Split load_8 to load_16.
* config/aarch64/thunderx2t99.md (thunderx2t99_loadpair): Split
load_8 to load_16.
(thunderx2t99_storepair_basic): Split store_8 to store_16.
* config/arm/xgene1.md (xgene1_load_pair): Split load_8 to load_16.
(xgene1_store_pair): Split store_8 to store_16.
* config/aarch64/falkor.md (falkor_ld_3_ld): Split load_8 to load_16.
(falkor_st_0_st_sd): Split store_8 to store_16.
James Greenhalgh [Tue, 12 Sep 2017 14:48:34 +0000 (14:48 +0000)]
[Mechanical Patch ARM/AArch64 1/2] Rename load/store scheduling types to encode data size
In the AArch64 backend and scheduling models there is some confusion as to
what the load1/load2 etc. scheduling types refer to. This leads to us using
load1/load2 in two contexts - for a variety of 32-bit, 64-bit and 128-bit
loads in AArch32 and 128-bit loads in AArch64. That leads to an undesirable
confusion in scheduling.
Fixing it is easy, but mechanical and boring. Essentially,
Across all sorts of pipeline models, and the two backends.
I have intentionally not modified any of the patterns which now look obviously
incorrect. I'll be doing a second pass over the AArch64 back-end in patch
2/2 which will fix these bugs.
c-common.c (field_decl_cmp, [...]): Move to c/c-decl.c.
c-family/
* c-common.c (field_decl_cmp, resort_data, resort_field_decl_cmp,
resort_sorted_fields): Move to c/c-decl.c.
* c-common.h (field_decl_cmp, resort_sorted_fields): Delete.
(struct sorted_fields_type): Move to c/c-lang.h.
c/
* c-decl.c (field_decl_cmp, resort_data, resort_field_decl_cmp,
resort_sorted_fields): Moved from c-family/c-common.c.
* c-lang.h (struct sorted_fields_type): Moved from c-family/c-common.h.
Martin Liska [Tue, 12 Sep 2017 14:24:29 +0000 (16:24 +0200)]
Reduce lookup_attribute memory footprint.
2017-09-12 Martin Liska <mliska@suse.cz>
* attribs.c (private_lookup_attribute): New function.
* attribs.h (private_lookup_attribute): Declared here.
(lookup_attribute): Called from this place.
Jonathan Wakely [Tue, 12 Sep 2017 14:02:59 +0000 (15:02 +0100)]
PR libstdc++/79433 no #error for including headers with wrong -std
PR libstdc++/79433
* doc/xml/manual/status_cxx2017.xml: Update feature-test macros.
* doc/html/*: Regenerate.
* include/Makefile.am: Remove <bits/c++17_warning.h>.
* include/Makefile.in: Regenerate.
* include/bits/c++17_warning.h: Remove.
* include/bits/string_view.tcc: Do not include <bits/c++17_warning.h>
for pre-C++17 modes.
* include/std/any: Likewise.
(__cpp_lib_any): Define.
* include/std/mutex (__cpp_lib_scoped_lock): Adjust value as per new
SD-6 draft.
* include/std/numeric (__cpp_lib_gcd_lcm): Define as per new SD-6
draft.
* include/std/optional: Do not include <bits/c++17_warning.h>.
(__cpp_lib_optional): Define.
* include/std/shared_mutex: Do not include <bits/c++14_warning.h>.
* include/std/string_view: Do not include <bits/c++17_warning.h>.
(__cpp_lib_string_view): Define.
* include/std/variant: Do not include <bits/c++17_warning.h>.
(__cpp_lib_variant): Define.
* testsuite/20_util/optional/cons/value_neg.cc: Adjust dg-error line
numbers.
* testsuite/26_numerics/gcd/1.cc: Test for __cpp_lib_gcd_lcm.
* testsuite/26_numerics/gcd/gcd_neg.cc: Adjust dg-error line
numbers.
* testsuite/26_numerics/lcm/1.cc: Test for __cpp_lib_gcd_lcm.
* testsuite/26_numerics/lcm/lcm_neg.cc: Adjust dg-error line
numbers.
* testsuite/30_threads/scoped_lock/requirements/typedefs.cc: Adjust
expected value of __cpp_lib_scoped_lock.
This patch converts some places that use HARD_REGNO_NREGS to use
hard_regno_nregs, in places where the initialisation has obviously
already taken place.
2017-09-12 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
* config/arm/arm.h (THUMB_SECONDARY_INPUT_RELOAD_CLASS): Use
hard_regno_nregs instead of HARD_REGNO_NREGS.
(THUMB_SECONDARY_OUTPUT_RELOAD_CLASS): Likewise.
* config/c6x/c6x.c (c6x_expand_prologue): Likewise.
(c6x_expand_epilogue): Likewise.
* config/frv/frv.c (frv_alloc_temp_reg): Likewise.
(frv_read_iacc_argument): Likewise.
* config/sh/sh.c: Include regs.h.
(sh_print_operand): Use hard_regno_nregs instead of HARD_REGNO_NREGS.
(regs_used): Likewise.
(output_stack_adjust): Likewise.
* config/xtensa/xtensa.c (xtensa_copy_incoming_a7): Likewise.
* expmed.c: Include regs.h.
(store_bit_field_1): Use hard_regno_nregs instead of HARD_REGNO_NREGS.
* ree.c: Include regs.h.
(combine_reaching_defs): Use hard_regno_nregs instead of
HARD_REGNO_NREGS.
(add_removable_extension): Likewise.
This patch converts hard_regno_nregs into an inline function, which
in turn allows hard_regno_nregs to be used as the name of a targetm
field. This is just a mechanical change.
2017-09-12 Richard Sandiford <richard.sandiford@linaro.org>
An upcoming patch will convert hard_regno_nregs into an inline
function, which in turn allows hard_regno_nregs to be used as the
name of a targetm field. This patch rewrites a use that can use
in_hard_reg_set_p instead.
2017-09-12 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
* ira-costs.c (record_operand_costs): Use in_hard_reg_set_p
instead of hard_regno_nregs.
An upcoming patch will convert hard_regno_nregs into an inline
function, which in turn allows hard_regno_nregs to be used as the
name of a targetm field. This patch rewrites uses that can use
end_hard_regno instead.
2017-09-12 Richard Sandiford <richard.sandiford@linaro.org>
projects / thirdparty / gcc.git / log
