[powerpc] Rename fegetenv_status to fegetenv_control

fegetenv_status is used variously to retrieve the FPSCR exception enable
bits, rounding mode bits, or both.  These are referred to as the control
bits in the POWER ISA.  FPSCR status bits are also returned by the
'mffs' and 'mffsl' instructions, but they are uniformly ignored by all
uses of fegetenv_status.  Change the name to be reflective of its
current and expected use.

Reviewed-By: Paul E Murphy <murphyp@linux.ibm.com>

diff --git a/ChangeLog b/ChangeLog
index a1192a3a70ecf5af6f88352d624aa9866837e2ac..6c28351c37e242ffe861631be463323aca7e0997 100644 (file)
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,15 @@
+2019-09-27  Paul A. Clarke  <pc@us.ibm.com>
+
+       * sysdeps/powerpc/fpu/fenv_libc.h (fegetenv_status): Rename to
+       fegetenv_control.
+       * sysdeps/powerpc/fpu/fedisblxcpt.c (fedisableexcept): Accommodate
+       rename of fegetenv_status to fegetenv_control.
+       * sysdeps/powerpc/fpu/feenablxcpt.c (feenableexcept): Likewise.
+       * sysdeps/powerpc/fpu/fegetexcept.c (__fegetexcept): Likewise.
+       * sysdeps/powerpc/fpu/fegetmode.c (fegetmode): Likewise.
+       * sysdeps/powerpc/fpu/fesetenv.c (__fesetenv): Likewise.
+       * sysdeps/powerpc/fpu/fesetmode.c (fesetmode): Likewise.
+
 2019-09-27  Paul A. Clarke  <pc@us.ibm.com>
 
        * sysdeps/powerpc/fpu/fenv_libc.h (__fesetround_inline): Use

diff --git a/sysdeps/powerpc/fpu/fedisblxcpt.c b/sysdeps/powerpc/fpu/fedisblxcpt.c
index 0d9bf00574f0201ea3451b8819fa4f9e828236bb..870cfc8dbcb17f40ed4ab05b52858c258f38778b 100644 (file)
--- a/sysdeps/powerpc/fpu/fedisblxcpt.c
+++ b/sysdeps/powerpc/fpu/fedisblxcpt.c
@@ -26,7 +26,7 @@ fedisableexcept (int excepts)
   int result, new;
 
   /* Get current exception mask to return.  */
-  fe.fenv = curr.fenv = fegetenv_status ();
+  fe.fenv = curr.fenv = fegetenv_control ();
   result = fenv_reg_to_exceptions (fe.l);
 
   if ((excepts & FE_ALL_INVALID) == FE_ALL_INVALID)

diff --git a/sysdeps/powerpc/fpu/feenablxcpt.c b/sysdeps/powerpc/fpu/feenablxcpt.c
index cf670b86d112dc4057761e9a68d7486f60b48ebd..43f6482f43b9fcdb48e604285dbea8eedfb5ff89 100644 (file)
--- a/sysdeps/powerpc/fpu/feenablxcpt.c
+++ b/sysdeps/powerpc/fpu/feenablxcpt.c
@@ -26,7 +26,7 @@ feenableexcept (int excepts)
   int result, new;
 
   /* Get current exception mask to return.  */
-  fe.fenv = curr.fenv = fegetenv_status ();
+  fe.fenv = curr.fenv = fegetenv_control ();
   result = fenv_reg_to_exceptions (fe.l);
 
   if ((excepts & FE_ALL_INVALID) == FE_ALL_INVALID)

diff --git a/sysdeps/powerpc/fpu/fegetexcept.c b/sysdeps/powerpc/fpu/fegetexcept.c
index bd27a807ed2120c27328673aacdd485661822878..179e3c4e81d13b5c6fbe0df5bc4d0de108ee7fa3 100644 (file)
--- a/sysdeps/powerpc/fpu/fegetexcept.c
+++ b/sysdeps/powerpc/fpu/fegetexcept.c
@@ -24,7 +24,7 @@ __fegetexcept (void)
 {
   fenv_union_t fe;
 
-  fe.fenv = fegetenv_status ();
+  fe.fenv = fegetenv_control ();
 
   return fenv_reg_to_exceptions (fe.l);
 }

diff --git a/sysdeps/powerpc/fpu/fegetmode.c b/sysdeps/powerpc/fpu/fegetmode.c
index 0e0a01c708ab6fbb7ff1f192149b609149ba1327..65c5ebe56b240ad6b18b88e40cc7d2c097d19879 100644 (file)
--- a/sysdeps/powerpc/fpu/fegetmode.c
+++ b/sysdeps/powerpc/fpu/fegetmode.c
@@ -21,6 +21,6 @@
 int
 fegetmode (femode_t *modep)
 {
-  *modep = fegetenv_status ();
+  *modep = fegetenv_control ();
   return 0;
 }

diff --git a/sysdeps/powerpc/fpu/fenv_libc.h b/sysdeps/powerpc/fpu/fenv_libc.h
index 06bd9bad4c496d9100cbc43063579583ca5f338e..17667d0a34b5ab0402ca2d7bb2e892b73ee2f197 100644 (file)
--- a/sysdeps/powerpc/fpu/fenv_libc.h
+++ b/sysdeps/powerpc/fpu/fenv_libc.h
@@ -60,7 +60,7 @@ extern const fenv_t *__fe_mask_env (void) attribute_hidden;
    'mffs' on architectures older than "power9" because the additional
    bits set for 'mffsl' are "don't care" for 'mffs'.  'mffs' is a superset
    of 'mffsl'.  */
-#define fegetenv_status()                                      \
+#define fegetenv_control()                                     \
   ({register double __fr;                                              \
     __asm__ __volatile__ (                                             \
       ".machine push; .machine \"power9\"; mffsl %0; .machine pop"     \
@@ -84,7 +84,7 @@ extern const fenv_t *__fe_mask_env (void) attribute_hidden;
     __fr.fenv;                                                         \
   })
 
-/* Like fegetenv_status, but also sets the rounding mode.  */
+/* Like fegetenv_control, but also sets the rounding mode.  */
 #ifdef _ARCH_PWR9
 #define fegetenv_and_set_rn(rn) __fe_mffscrn (rn)
 #else
@@ -115,7 +115,7 @@ extern const fenv_t *__fe_mask_env (void) attribute_hidden;
 
 /* Set the last 2 nibbles of the FPSCR, which contain the
    exception enables and the rounding mode.
-   'fegetenv_status' retrieves these bits by reading the FPSCR.  */
+   'fegetenv_control' retrieves these bits by reading the FPSCR.  */
 #define fesetenv_mode(env) __builtin_mtfsf (0b00000011, (env));
 
 /* This very handy macro:

diff --git a/sysdeps/powerpc/fpu/fesetenv.c b/sysdeps/powerpc/fpu/fesetenv.c
index 949d916d7605e2c2f5889c1be1b7e0c0dce46237..fc7b8192e2cc8d2732dae673d20455cb574a7f41 100644 (file)
--- a/sysdeps/powerpc/fpu/fesetenv.c
+++ b/sysdeps/powerpc/fpu/fesetenv.c
@@ -26,7 +26,7 @@ __fesetenv (const fenv_t *envp)
 
   /* get the currently set exceptions.  */
   new.fenv = *envp;
-  old.fenv = fegetenv_status ();
+  old.fenv = fegetenv_control ();
 
   __TEST_AND_EXIT_NON_STOP (old.l, new.l);
   __TEST_AND_ENTER_NON_STOP (old.l, new.l);

diff --git a/sysdeps/powerpc/fpu/fesetmode.c b/sysdeps/powerpc/fpu/fesetmode.c
index 90d86a969f76010d76574c26866089a28d6801a3..1e9a874efa8b4497377c73a8920824c413ea53e6 100644 (file)
--- a/sysdeps/powerpc/fpu/fesetmode.c
+++ b/sysdeps/powerpc/fpu/fesetmode.c
@@ -27,7 +27,7 @@ fesetmode (const femode_t *modep)
   /* Logic regarding enabled exceptions as in fesetenv.  */
 
   new.fenv = *modep;
-  old.fenv = fegetenv_status ();
+  old.fenv = fegetenv_control ();
   new.l = (new.l & ~FPSCR_STATUS_MASK) | (old.l & FPSCR_STATUS_MASK);
 
   if (old.l == new.l)