From d7a568af5546e0313abbc04060c8e9b0d3f750b4 Mon Sep 17 00:00:00 2001 From: "Paul A. Clarke" Date: Thu, 19 Sep 2019 14:04:45 -0500 Subject: [PATCH] [powerpc] Rename fesetenv_mode to fesetenv_control fesetenv_mode is used variously to write the FPSCR exception enable bits and rounding mode bits. These are referred to as the control bits in the POWER ISA. Change the name to be reflective of its current and expected use, and match up well with fegetenv_control. --- ChangeLog | 11 +++++++++++ sysdeps/powerpc/fpu/fedisblxcpt.c | 2 +- sysdeps/powerpc/fpu/feenablxcpt.c | 2 +- sysdeps/powerpc/fpu/fenv_libc.h | 2 +- sysdeps/powerpc/fpu/fenv_private.h | 4 ++-- sysdeps/powerpc/fpu/fesetmode.c | 2 +- 6 files changed, 17 insertions(+), 6 deletions(-) diff --git a/ChangeLog b/ChangeLog index 3c792b4317b..d9ea94ad703 100644 --- a/ChangeLog +++ b/ChangeLog @@ -1,3 +1,14 @@ +2019-09-27 Paul A. Clarke + + * sysdeps/powerpc/fpu/fenv_libc.h (fesetenv_mode): Rename to + fesetenv_control. + * sysdeps/powerpc/fpu/fedisblxcpt.c (fedisableexcept): Accommodate + rename of fesetenv_mode to fegetenv_control. + * sysdeps/powerpc/fpu/feenablxcpt.c (feenableexcept): Likewise. + * sysdeps/powerpc/fpu/fesetmode.c (fesetmode): Likewise. + * sysdeps/powerpc/fpu/fenv_private.h (__libc_femergeenv_ppc): Likewise. + (libc_feholdsetround_noex_ppc_ctx): Likewise. + 2019-09-27 Paul A. Clarke * sysdeps/powerpc/fpu/fenv_private.h diff --git a/sysdeps/powerpc/fpu/fedisblxcpt.c b/sysdeps/powerpc/fpu/fedisblxcpt.c index 870cfc8dbcb..9f86c5fbef8 100644 --- a/sysdeps/powerpc/fpu/fedisblxcpt.c +++ b/sysdeps/powerpc/fpu/fedisblxcpt.c @@ -41,7 +41,7 @@ fedisableexcept (int excepts) fe.l &= ~new; if (fe.l != curr.l) - fesetenv_mode (fe.fenv); + fesetenv_control (fe.fenv); __TEST_AND_ENTER_NON_STOP (-1ULL, fe.l); diff --git a/sysdeps/powerpc/fpu/feenablxcpt.c b/sysdeps/powerpc/fpu/feenablxcpt.c index 43f6482f43b..141cfb4cd9b 100644 --- a/sysdeps/powerpc/fpu/feenablxcpt.c +++ b/sysdeps/powerpc/fpu/feenablxcpt.c @@ -41,7 +41,7 @@ feenableexcept (int excepts) fe.l |= new; if (fe.l != curr.l) - fesetenv_mode (fe.fenv); + fesetenv_control (fe.fenv); __TEST_AND_EXIT_NON_STOP (0ULL, fe.l); diff --git a/sysdeps/powerpc/fpu/fenv_libc.h b/sysdeps/powerpc/fpu/fenv_libc.h index 17667d0a34b..ed368473ea4 100644 --- a/sysdeps/powerpc/fpu/fenv_libc.h +++ b/sysdeps/powerpc/fpu/fenv_libc.h @@ -116,7 +116,7 @@ extern const fenv_t *__fe_mask_env (void) attribute_hidden; /* Set the last 2 nibbles of the FPSCR, which contain the exception enables and the rounding mode. 'fegetenv_control' retrieves these bits by reading the FPSCR. */ -#define fesetenv_mode(env) __builtin_mtfsf (0b00000011, (env)); +#define fesetenv_control(env) __builtin_mtfsf (0b00000011, (env)); /* This very handy macro: - Sets the rounding mode to 'round to nearest'; diff --git a/sysdeps/powerpc/fpu/fenv_private.h b/sysdeps/powerpc/fpu/fenv_private.h index ade0bfaf5f4..5eedc3b552d 100644 --- a/sysdeps/powerpc/fpu/fenv_private.h +++ b/sysdeps/powerpc/fpu/fenv_private.h @@ -61,7 +61,7 @@ __libc_femergeenv_ppc (const fenv_t *envp, unsigned long long old_mask, == (FPSCR_CONTROL_MASK|FPSCR_EXCEPTIONS_MASK) && (old.l & FPSCR_EXCEPTIONS_MASK) == (new.l & FPSCR_EXCEPTIONS_MASK)) { - fesetenv_mode (new.fenv); + fesetenv_control (new.fenv); } else /* Atomically enable and raise (if appropriate) exceptions set in `new'. */ @@ -142,7 +142,7 @@ libc_feholdsetround_noex_ppc_ctx (struct rm_ctx *ctx, int r) if (__glibc_unlikely (new.l != old.l)) { __TEST_AND_ENTER_NON_STOP (old.l, 0ULL); - fesetenv_mode (new.fenv); + fesetenv_control (new.fenv); ctx->updated_status = true; } else diff --git a/sysdeps/powerpc/fpu/fesetmode.c b/sysdeps/powerpc/fpu/fesetmode.c index 1e9a874efa8..a7ead9f0151 100644 --- a/sysdeps/powerpc/fpu/fesetmode.c +++ b/sysdeps/powerpc/fpu/fesetmode.c @@ -36,6 +36,6 @@ fesetmode (const femode_t *modep) __TEST_AND_EXIT_NON_STOP (old.l, new.l); __TEST_AND_ENTER_NON_STOP (old.l, new.l); - fesetenv_mode (new.fenv); + fesetenv_control (new.fenv); return 0; } -- 2.39.2