]> git.ipfire.org Git - thirdparty/kernel/linux.git/blame - include/linux/regmap.h
Merge tag 'mm-stable-2024-05-17-19-19' of git://git.kernel.org/pub/scm/linux/kernel...
[thirdparty/kernel/linux.git] / include / linux / regmap.h
CommitLineData
d2912cb1 1/* SPDX-License-Identifier: GPL-2.0-only */
b83a313b
MB
2#ifndef __LINUX_REGMAP_H
3#define __LINUX_REGMAP_H
4
5/*
6 * Register map access API
7 *
8 * Copyright 2011 Wolfson Microelectronics plc
9 *
10 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
b83a313b
MB
11 */
12
b83a313b 13#include <linux/list.h>
6863ca62 14#include <linux/rbtree.h>
f15cd6d9 15#include <linux/ktime.h>
adf08d48 16#include <linux/delay.h>
49ccc142 17#include <linux/err.h>
3f0fa9a8 18#include <linux/bug.h>
3cfe7a74 19#include <linux/lockdep.h>
e44ab4e1 20#include <linux/iopoll.h>
5cc2013b 21#include <linux/fwnode.h>
b83a313b 22
de477254 23struct module;
31895662 24struct clk;
313162d0 25struct device;
12479382 26struct device_node;
bf0d29fb 27struct fsi_device;
9943fa30 28struct i2c_client;
6445500b 29struct i3c_device;
90f790d2 30struct irq_domain;
1f89d2fe 31struct mdio_device;
7d6f7fb0 32struct slim_device;
a676f083 33struct spi_device;
a01779f8 34struct spmi_device;
b83d2ff0 35struct regmap;
6863ca62 36struct regmap_range_cfg;
67252287 37struct regmap_field;
22853223 38struct snd_ac97;
7c22ce6e 39struct sdw_slave;
9943fa30 40
7b3c4c37
AL
41/*
42 * regmap_mdio address encoding. IEEE 802.3ae clause 45 addresses consist of a
43 * device address and a register address.
44 */
45#define REGMAP_MDIO_C45_DEVAD_SHIFT 16
46#define REGMAP_MDIO_C45_DEVAD_MASK GENMASK(20, 16)
47#define REGMAP_MDIO_C45_REGNUM_MASK GENMASK(15, 0)
48
4a670ac3
MC
49/*
50 * regmap.reg_shift indicates by how much we must shift registers prior to
51 * performing any operation. It's a signed value, positive numbers means
52 * downshifting the register's address, while negative numbers means upshifting.
53 */
54#define REGMAP_UPSHIFT(s) (-(s))
55#define REGMAP_DOWNSHIFT(s) (s)
56
9fabe24e
DP
57/* An enum of all the supported cache types */
58enum regcache_type {
59 REGCACHE_NONE,
28644c80 60 REGCACHE_RBTREE,
2ac902ce 61 REGCACHE_FLAT,
f033c26d 62 REGCACHE_MAPLE,
9fabe24e
DP
63};
64
bd20eb54 65/**
2cf8e2df 66 * struct reg_default - Default value for a register.
bd20eb54
MB
67 *
68 * @reg: Register address.
69 * @def: Register default value.
2cf8e2df
CK
70 *
71 * We use an array of structs rather than a simple array as many modern devices
72 * have very sparse register maps.
bd20eb54
MB
73 */
74struct reg_default {
75 unsigned int reg;
76 unsigned int def;
77};
78
8019ff6c 79/**
2cf8e2df 80 * struct reg_sequence - An individual write from a sequence of writes.
8019ff6c
NP
81 *
82 * @reg: Register address.
83 * @def: Register value.
2de9d600 84 * @delay_us: Delay to be applied after the register write in microseconds
2cf8e2df
CK
85 *
86 * Register/value pairs for sequences of writes with an optional delay in
87 * microseconds to be applied after each write.
8019ff6c
NP
88 */
89struct reg_sequence {
90 unsigned int reg;
91 unsigned int def;
2de9d600 92 unsigned int delay_us;
8019ff6c
NP
93};
94
bd3ddb49
MF
95#define REG_SEQ(_reg, _def, _delay_us) { \
96 .reg = _reg, \
97 .def = _def, \
98 .delay_us = _delay_us, \
99 }
100#define REG_SEQ0(_reg, _def) REG_SEQ(_reg, _def, 0)
101
08188ba8
PZ
102/**
103 * regmap_read_poll_timeout - Poll until a condition is met or a timeout occurs
2cf8e2df 104 *
08188ba8
PZ
105 * @map: Regmap to read from
106 * @addr: Address to poll
107 * @val: Unsigned integer variable to read the value into
108 * @cond: Break condition (usually involving @val)
109 * @sleep_us: Maximum time to sleep between reads in us (0
110 * tight-loops). Should be less than ~20ms since usleep_range
458f69ef 111 * is used (see Documentation/timers/timers-howto.rst).
08188ba8
PZ
112 * @timeout_us: Timeout in us, 0 means never timeout
113 *
114 * Returns 0 on success and -ETIMEDOUT upon a timeout or the regmap_read
115 * error return value in case of a error read. In the two former cases,
116 * the last read value at @addr is stored in @val. Must not be called
117 * from atomic context if sleep_us or timeout_us are used.
118 *
119 * This is modelled after the readx_poll_timeout macros in linux/iopoll.h.
120 */
121#define regmap_read_poll_timeout(map, addr, val, cond, sleep_us, timeout_us) \
122({ \
e44ab4e1
DZ
123 int __ret, __tmp; \
124 __tmp = read_poll_timeout(regmap_read, __ret, __ret || (cond), \
125 sleep_us, timeout_us, false, (map), (addr), &(val)); \
126 __ret ?: __tmp; \
08188ba8
PZ
127})
128
50816a4c
SP
129/**
130 * regmap_read_poll_timeout_atomic - Poll until a condition is met or a timeout occurs
131 *
132 * @map: Regmap to read from
133 * @addr: Address to poll
134 * @val: Unsigned integer variable to read the value into
135 * @cond: Break condition (usually involving @val)
136 * @delay_us: Time to udelay between reads in us (0 tight-loops).
137 * Should be less than ~10us since udelay is used
138 * (see Documentation/timers/timers-howto.rst).
139 * @timeout_us: Timeout in us, 0 means never timeout
140 *
141 * Returns 0 on success and -ETIMEDOUT upon a timeout or the regmap_read
142 * error return value in case of a error read. In the two former cases,
143 * the last read value at @addr is stored in @val.
144 *
145 * This is modelled after the readx_poll_timeout_atomic macros in linux/iopoll.h.
146 *
147 * Note: In general regmap cannot be used in atomic context. If you want to use
148 * this macro then first setup your regmap for atomic use (flat or no cache
149 * and MMIO regmap).
150 */
151#define regmap_read_poll_timeout_atomic(map, addr, val, cond, delay_us, timeout_us) \
152({ \
153 u64 __timeout_us = (timeout_us); \
154 unsigned long __delay_us = (delay_us); \
155 ktime_t __timeout = ktime_add_us(ktime_get(), __timeout_us); \
156 int __ret; \
157 for (;;) { \
158 __ret = regmap_read((map), (addr), &(val)); \
159 if (__ret) \
160 break; \
161 if (cond) \
162 break; \
163 if ((__timeout_us) && \
164 ktime_compare(ktime_get(), __timeout) > 0) { \
165 __ret = regmap_read((map), (addr), &(val)); \
166 break; \
167 } \
168 if (__delay_us) \
169 udelay(__delay_us); \
170 } \
171 __ret ?: ((cond) ? 0 : -ETIMEDOUT); \
172})
173
667063ac
CYT
174/**
175 * regmap_field_read_poll_timeout - Poll until a condition is met or timeout
176 *
177 * @field: Regmap field to read from
178 * @val: Unsigned integer variable to read the value into
179 * @cond: Break condition (usually involving @val)
180 * @sleep_us: Maximum time to sleep between reads in us (0
181 * tight-loops). Should be less than ~20ms since usleep_range
458f69ef 182 * is used (see Documentation/timers/timers-howto.rst).
667063ac
CYT
183 * @timeout_us: Timeout in us, 0 means never timeout
184 *
185 * Returns 0 on success and -ETIMEDOUT upon a timeout or the regmap_field_read
186 * error return value in case of a error read. In the two former cases,
187 * the last read value at @addr is stored in @val. Must not be called
188 * from atomic context if sleep_us or timeout_us are used.
189 *
190 * This is modelled after the readx_poll_timeout macros in linux/iopoll.h.
191 */
192#define regmap_field_read_poll_timeout(field, val, cond, sleep_us, timeout_us) \
193({ \
148c01d1
DZ
194 int __ret, __tmp; \
195 __tmp = read_poll_timeout(regmap_field_read, __ret, __ret || (cond), \
196 sleep_us, timeout_us, false, (field), &(val)); \
197 __ret ?: __tmp; \
667063ac
CYT
198})
199
b83d2ff0
MB
200#ifdef CONFIG_REGMAP
201
141eba2e
SW
202enum regmap_endian {
203 /* Unspecified -> 0 -> Backwards compatible default */
204 REGMAP_ENDIAN_DEFAULT = 0,
205 REGMAP_ENDIAN_BIG,
206 REGMAP_ENDIAN_LITTLE,
207 REGMAP_ENDIAN_NATIVE,
208};
209
76aad392 210/**
2cf8e2df
CK
211 * struct regmap_range - A register range, used for access related checks
212 * (readable/writeable/volatile/precious checks)
76aad392
DC
213 *
214 * @range_min: address of first register
215 * @range_max: address of last register
216 */
217struct regmap_range {
218 unsigned int range_min;
219 unsigned int range_max;
220};
221
6112fe60
LD
222#define regmap_reg_range(low, high) { .range_min = low, .range_max = high, }
223
2cf8e2df
CK
224/**
225 * struct regmap_access_table - A table of register ranges for access checks
76aad392
DC
226 *
227 * @yes_ranges : pointer to an array of regmap ranges used as "yes ranges"
228 * @n_yes_ranges: size of the above array
229 * @no_ranges: pointer to an array of regmap ranges used as "no ranges"
230 * @n_no_ranges: size of the above array
2cf8e2df
CK
231 *
232 * A table of ranges including some yes ranges and some no ranges.
233 * If a register belongs to a no_range, the corresponding check function
234 * will return false. If a register belongs to a yes range, the corresponding
235 * check function will return true. "no_ranges" are searched first.
76aad392
DC
236 */
237struct regmap_access_table {
238 const struct regmap_range *yes_ranges;
239 unsigned int n_yes_ranges;
240 const struct regmap_range *no_ranges;
241 unsigned int n_no_ranges;
242};
243
0d4529c5
DC
244typedef void (*regmap_lock)(void *);
245typedef void (*regmap_unlock)(void *);
246
dd898b20 247/**
2cf8e2df 248 * struct regmap_config - Configuration for the register map of a device.
dd898b20 249 *
d3c242e1
SW
250 * @name: Optional name of the regmap. Useful when a device has multiple
251 * register regions.
252 *
dd898b20 253 * @reg_bits: Number of bits in a register address, mandatory.
f01ee60f
SW
254 * @reg_stride: The register address stride. Valid register addresses are a
255 * multiple of this value. If set to 0, a value of 1 will be
256 * used.
4a670ac3
MC
257 * @reg_shift: The number of bits to shift the register before performing any
258 * operations. Any positive number will be downshifted, and negative
259 * values will be upshifted
0074f3f2
CF
260 * @reg_base: Value to be added to every register address before performing any
261 * operation.
82159ba8 262 * @pad_bits: Number of bits of padding between register and value.
dd898b20 263 * @val_bits: Number of bits in a register value, mandatory.
2e2ae66d 264 *
3566cc9d 265 * @writeable_reg: Optional callback returning true if the register
76aad392
DC
266 * can be written to. If this field is NULL but wr_table
267 * (see below) is not, the check is performed on such table
268 * (a register is writeable if it belongs to one of the ranges
269 * specified by wr_table).
3566cc9d 270 * @readable_reg: Optional callback returning true if the register
76aad392
DC
271 * can be read from. If this field is NULL but rd_table
272 * (see below) is not, the check is performed on such table
273 * (a register is readable if it belongs to one of the ranges
274 * specified by rd_table).
3566cc9d 275 * @volatile_reg: Optional callback returning true if the register
76aad392
DC
276 * value can't be cached. If this field is NULL but
277 * volatile_table (see below) is not, the check is performed on
278 * such table (a register is volatile if it belongs to one of
279 * the ranges specified by volatile_table).
bdc39644 280 * @precious_reg: Optional callback returning true if the register
76aad392 281 * should not be read outside of a call from the driver
bdc39644 282 * (e.g., a clear on read interrupt status register). If this
76aad392
DC
283 * field is NULL but precious_table (see below) is not, the
284 * check is performed on such table (a register is precious if
285 * it belongs to one of the ranges specified by precious_table).
cdf6b11d
BW
286 * @writeable_noinc_reg: Optional callback returning true if the register
287 * supports multiple write operations without incrementing
288 * the register number. If this field is NULL but
289 * wr_noinc_table (see below) is not, the check is
290 * performed on such table (a register is no increment
291 * writeable if it belongs to one of the ranges specified
292 * by wr_noinc_table).
74fe7b55
LC
293 * @readable_noinc_reg: Optional callback returning true if the register
294 * supports multiple read operations without incrementing
295 * the register number. If this field is NULL but
296 * rd_noinc_table (see below) is not, the check is
297 * performed on such table (a register is no increment
298 * readable if it belongs to one of the ranges specified
299 * by rd_noinc_table).
d2a5884a
AS
300 * @reg_read: Optional callback that if filled will be used to perform
301 * all the reads from the registers. Should only be provided for
bdc39644
LP
302 * devices whose read operation cannot be represented as a simple
303 * read operation on a bus such as SPI, I2C, etc. Most of the
304 * devices do not need this.
d2a5884a 305 * @reg_write: Same as above for writing.
02d6fdec
CM
306 * @reg_update_bits: Optional callback that if filled will be used to perform
307 * all the update_bits(rmw) operation. Should only be provided
308 * if the function require special handling with lock and reg
309 * handling and the operation cannot be represented as a simple
310 * update_bits operation on a bus such as SPI, I2C, etc.
d77e7456
MV
311 * @read: Optional callback that if filled will be used to perform all the
312 * bulk reads from the registers. Data is returned in the buffer used
313 * to transmit data.
314 * @write: Same as above for writing.
315 * @max_raw_read: Max raw read size that can be used on the device.
316 * @max_raw_write: Max raw write size that can be used on the device.
9b1fe051 317 * @can_sleep: Optional, specifies whether regmap operations can sleep.
d2a5884a
AS
318 * @fast_io: Register IO is fast. Use a spinlock instead of a mutex
319 * to perform locking. This field is ignored if custom lock/unlock
320 * functions are used (see fields lock/unlock of struct regmap_config).
321 * This field is a duplicate of a similar file in
322 * 'struct regmap_bus' and serves exact same purpose.
323 * Use it only for "no-bus" cases.
93ce5576
AS
324 * @io_port: Support IO port accessors. Makes sense only when MMIO vs. IO port
325 * access can be distinguished.
9b1fe051
CJ
326 * @disable_locking: This regmap is either protected by external means or
327 * is guaranteed not to be accessed from multiple threads.
328 * Don't use any locking mechanisms.
329 * @lock: Optional lock callback (overrides regmap's default lock
330 * function, based on spinlock or mutex).
331 * @unlock: As above for unlocking.
332 * @lock_arg: This field is passed as the only argument of lock/unlock
333 * functions (ignored in case regular lock/unlock functions
334 * are not overridden).
b429fab4 335 * @max_register: Optional, specifies the maximum valid register address.
0ec74ad3
JD
336 * @max_register_is_0: Optional, specifies that zero value in @max_register
337 * should be taken into account. This is a workaround to
338 * apply handling of @max_register for regmap that contains
339 * only one register.
76aad392
DC
340 * @wr_table: Optional, points to a struct regmap_access_table specifying
341 * valid ranges for write access.
342 * @rd_table: As above, for read access.
343 * @volatile_table: As above, for volatile registers.
344 * @precious_table: As above, for precious registers.
cdf6b11d 345 * @wr_noinc_table: As above, for no increment writeable registers.
74fe7b55 346 * @rd_noinc_table: As above, for no increment readable registers.
bd20eb54
MB
347 * @reg_defaults: Power on reset values for registers (for use with
348 * register cache support).
349 * @num_reg_defaults: Number of elements in reg_defaults.
6f306441 350 *
f50e38c9 351 * @read_flag_mask: Mask to be set in the top bytes of the register when doing
6f306441 352 * a read.
f50e38c9 353 * @write_flag_mask: Mask to be set in the top bytes of the register when doing
6f306441 354 * a write. If both read_flag_mask and write_flag_mask are
9bf485c9
AD
355 * empty and zero_flag_mask is not set the regmap_bus default
356 * masks are used.
357 * @zero_flag_mask: If set, read_flag_mask and write_flag_mask are used even
358 * if they are both empty.
6e1e90ec
AR
359 * @use_relaxed_mmio: If set, MMIO R/W operations will not use memory barriers.
360 * This can avoid load on devices which don't require strict
361 * orderings, but drivers should carefully add any explicit
362 * memory barriers when they may require them.
1c96a2f6
DF
363 * @use_single_read: If set, converts the bulk read operation into a series of
364 * single read operations. This is useful for a device that
365 * does not support bulk read.
366 * @use_single_write: If set, converts the bulk write operation into a series of
367 * single write operations. This is useful for a device that
368 * does not support bulk write.
e894c3f4
OAO
369 * @can_multi_write: If set, the device supports the multi write mode of bulk
370 * write operations, if clear multi write requests will be
371 * split into individual write operations
9fabe24e
DP
372 *
373 * @cache_type: The actual cache type.
374 * @reg_defaults_raw: Power on reset values for registers (for use with
375 * register cache support).
376 * @num_reg_defaults_raw: Number of elements in reg_defaults_raw.
a4887813 377 * @use_hwlock: Indicate if a hardware spinlock should be used.
67021f25 378 * @use_raw_spinlock: Indicate if a raw spinlock should be used.
8698b936
BW
379 * @hwlock_id: Specify the hardware spinlock id.
380 * @hwlock_mode: The hardware spinlock mode, should be HWLOCK_IRQSTATE,
381 * HWLOCK_IRQ or 0.
9b1fe051
CJ
382 * @reg_format_endian: Endianness for formatted register addresses. If this is
383 * DEFAULT, the @reg_format_endian_default value from the
384 * regmap bus is used.
385 * @val_format_endian: Endianness for formatted register values. If this is
386 * DEFAULT, the @reg_format_endian_default value from the
387 * regmap bus is used.
388 *
389 * @ranges: Array of configuration entries for virtual address ranges.
390 * @num_ranges: Number of range configuration entries.
dd898b20 391 */
b83a313b 392struct regmap_config {
d3c242e1
SW
393 const char *name;
394
b83a313b 395 int reg_bits;
f01ee60f 396 int reg_stride;
4a670ac3 397 int reg_shift;
0074f3f2 398 unsigned int reg_base;
82159ba8 399 int pad_bits;
b83a313b 400 int val_bits;
2e2ae66d 401
2e2ae66d
MB
402 bool (*writeable_reg)(struct device *dev, unsigned int reg);
403 bool (*readable_reg)(struct device *dev, unsigned int reg);
404 bool (*volatile_reg)(struct device *dev, unsigned int reg);
18694886 405 bool (*precious_reg)(struct device *dev, unsigned int reg);
cdf6b11d 406 bool (*writeable_noinc_reg)(struct device *dev, unsigned int reg);
74fe7b55 407 bool (*readable_noinc_reg)(struct device *dev, unsigned int reg);
c9b41fcf 408
d2a5884a
AS
409 int (*reg_read)(void *context, unsigned int reg, unsigned int *val);
410 int (*reg_write)(void *context, unsigned int reg, unsigned int val);
02d6fdec
CM
411 int (*reg_update_bits)(void *context, unsigned int reg,
412 unsigned int mask, unsigned int val);
d77e7456
MV
413 /* Bulk read/write */
414 int (*read)(void *context, const void *reg_buf, size_t reg_size,
415 void *val_buf, size_t val_size);
416 int (*write)(void *context, const void *data, size_t count);
417 size_t max_raw_read;
418 size_t max_raw_write;
d2a5884a 419
9b1fe051
CJ
420 bool can_sleep;
421
d2a5884a 422 bool fast_io;
93ce5576 423 bool io_port;
d2a5884a 424
9b1fe051
CJ
425 bool disable_locking;
426 regmap_lock lock;
427 regmap_unlock unlock;
428 void *lock_arg;
429
bd20eb54 430 unsigned int max_register;
0ec74ad3 431 bool max_register_is_0;
76aad392
DC
432 const struct regmap_access_table *wr_table;
433 const struct regmap_access_table *rd_table;
434 const struct regmap_access_table *volatile_table;
435 const struct regmap_access_table *precious_table;
cdf6b11d 436 const struct regmap_access_table *wr_noinc_table;
74fe7b55 437 const struct regmap_access_table *rd_noinc_table;
720e4616 438 const struct reg_default *reg_defaults;
9fabe24e
DP
439 unsigned int num_reg_defaults;
440 enum regcache_type cache_type;
441 const void *reg_defaults_raw;
442 unsigned int num_reg_defaults_raw;
6f306441 443
f50e38c9
TL
444 unsigned long read_flag_mask;
445 unsigned long write_flag_mask;
9bf485c9 446 bool zero_flag_mask;
2e33caf1 447
1c96a2f6
DF
448 bool use_single_read;
449 bool use_single_write;
6e1e90ec 450 bool use_relaxed_mmio;
e894c3f4 451 bool can_multi_write;
141eba2e 452
a4887813 453 bool use_hwlock;
67021f25 454 bool use_raw_spinlock;
8698b936
BW
455 unsigned int hwlock_id;
456 unsigned int hwlock_mode;
21f8e482 457
9b1fe051
CJ
458 enum regmap_endian reg_format_endian;
459 enum regmap_endian val_format_endian;
460
461 const struct regmap_range_cfg *ranges;
462 unsigned int num_ranges;
6863ca62
KG
463};
464
465/**
2cf8e2df
CK
466 * struct regmap_range_cfg - Configuration for indirectly accessed or paged
467 * registers.
6863ca62 468 *
d058bb49
MB
469 * @name: Descriptive name for diagnostics
470 *
6863ca62
KG
471 * @range_min: Address of the lowest register address in virtual range.
472 * @range_max: Address of the highest register in virtual range.
473 *
2cf8e2df 474 * @selector_reg: Register with selector field.
ad5906bd
PL
475 * @selector_mask: Bit mask for selector value.
476 * @selector_shift: Bit shift for selector value.
6863ca62
KG
477 *
478 * @window_start: Address of first (lowest) register in data window.
479 * @window_len: Number of registers in data window.
2cf8e2df
CK
480 *
481 * Registers, mapped to this virtual range, are accessed in two steps:
482 * 1. page selector register update;
483 * 2. access through data window registers.
6863ca62
KG
484 */
485struct regmap_range_cfg {
d058bb49
MB
486 const char *name;
487
6863ca62
KG
488 /* Registers of virtual address range */
489 unsigned int range_min;
490 unsigned int range_max;
491
492 /* Page selector for indirect addressing */
493 unsigned int selector_reg;
494 unsigned int selector_mask;
495 int selector_shift;
496
497 /* Data window (per each page) */
498 unsigned int window_start;
499 unsigned int window_len;
b83a313b
MB
500};
501
0d509f2b
MB
502struct regmap_async;
503
0135bbcc 504typedef int (*regmap_hw_write)(void *context, const void *data,
b83a313b 505 size_t count);
0135bbcc 506typedef int (*regmap_hw_gather_write)(void *context,
b83a313b
MB
507 const void *reg, size_t reg_len,
508 const void *val, size_t val_len);
0d509f2b
MB
509typedef int (*regmap_hw_async_write)(void *context,
510 const void *reg, size_t reg_len,
511 const void *val, size_t val_len,
512 struct regmap_async *async);
0135bbcc 513typedef int (*regmap_hw_read)(void *context,
b83a313b
MB
514 const void *reg_buf, size_t reg_size,
515 void *val_buf, size_t val_size);
3ac17037
BB
516typedef int (*regmap_hw_reg_read)(void *context, unsigned int reg,
517 unsigned int *val);
c20cc099
LW
518typedef int (*regmap_hw_reg_noinc_read)(void *context, unsigned int reg,
519 void *val, size_t val_count);
3ac17037
BB
520typedef int (*regmap_hw_reg_write)(void *context, unsigned int reg,
521 unsigned int val);
c20cc099
LW
522typedef int (*regmap_hw_reg_noinc_write)(void *context, unsigned int reg,
523 const void *val, size_t val_count);
77792b11
JR
524typedef int (*regmap_hw_reg_update_bits)(void *context, unsigned int reg,
525 unsigned int mask, unsigned int val);
0d509f2b 526typedef struct regmap_async *(*regmap_hw_async_alloc)(void);
0135bbcc 527typedef void (*regmap_hw_free_context)(void *context);
b83a313b
MB
528
529/**
2cf8e2df
CK
530 * struct regmap_bus - Description of a hardware bus for the register map
531 * infrastructure.
b83a313b 532 *
bacdbe07 533 * @fast_io: Register IO is fast. Use a spinlock instead of a mutex
0d4529c5
DC
534 * to perform locking. This field is ignored if custom lock/unlock
535 * functions are used (see fields lock/unlock of
536 * struct regmap_config).
74641458 537 * @free_on_exit: kfree this on exit of regmap
b83a313b
MB
538 * @write: Write operation.
539 * @gather_write: Write operation with split register/value, return -ENOTSUPP
540 * if not implemented on a given device.
0d509f2b
MB
541 * @async_write: Write operation which completes asynchronously, optional and
542 * must serialise with respect to non-async I/O.
c5f58f2d
MSP
543 * @reg_write: Write a single register value to the given register address. This
544 * write operation has to complete when returning from the function.
c20cc099
LW
545 * @reg_write_noinc: Write multiple register value to the same register. This
546 * write operation has to complete when returning from the function.
2cf8e2df
CK
547 * @reg_update_bits: Update bits operation to be used against volatile
548 * registers, intended for devices supporting some mechanism
549 * for setting clearing bits without having to
550 * read/modify/write.
b83a313b
MB
551 * @read: Read operation. Data is returned in the buffer used to transmit
552 * data.
c5f58f2d
MSP
553 * @reg_read: Read a single register value from a given register address.
554 * @free_context: Free context.
0d509f2b 555 * @async_alloc: Allocate a regmap_async() structure.
b83a313b
MB
556 * @read_flag_mask: Mask to be set in the top byte of the register when doing
557 * a read.
141eba2e
SW
558 * @reg_format_endian_default: Default endianness for formatted register
559 * addresses. Used when the regmap_config specifies DEFAULT. If this is
560 * DEFAULT, BIG is assumed.
561 * @val_format_endian_default: Default endianness for formatted register
562 * values. Used when the regmap_config specifies DEFAULT. If this is
563 * DEFAULT, BIG is assumed.
adaac459
MSP
564 * @max_raw_read: Max raw read size that can be used on the bus.
565 * @max_raw_write: Max raw write size that can be used on the bus.
b83a313b
MB
566 */
567struct regmap_bus {
bacdbe07 568 bool fast_io;
74641458 569 bool free_on_exit;
b83a313b
MB
570 regmap_hw_write write;
571 regmap_hw_gather_write gather_write;
0d509f2b 572 regmap_hw_async_write async_write;
3ac17037 573 regmap_hw_reg_write reg_write;
c20cc099 574 regmap_hw_reg_noinc_write reg_noinc_write;
77792b11 575 regmap_hw_reg_update_bits reg_update_bits;
b83a313b 576 regmap_hw_read read;
3ac17037 577 regmap_hw_reg_read reg_read;
c20cc099 578 regmap_hw_reg_noinc_read reg_noinc_read;
0135bbcc 579 regmap_hw_free_context free_context;
0d509f2b 580 regmap_hw_async_alloc async_alloc;
b83a313b 581 u8 read_flag_mask;
141eba2e
SW
582 enum regmap_endian reg_format_endian_default;
583 enum regmap_endian val_format_endian_default;
adaac459
MSP
584 size_t max_raw_read;
585 size_t max_raw_write;
b83a313b
MB
586};
587
3cfe7a74
NB
588/*
589 * __regmap_init functions.
590 *
591 * These functions take a lock key and name parameter, and should not be called
592 * directly. Instead, use the regmap_init macros that generate a key and name
593 * for each call.
594 */
595struct regmap *__regmap_init(struct device *dev,
596 const struct regmap_bus *bus,
597 void *bus_context,
598 const struct regmap_config *config,
599 struct lock_class_key *lock_key,
600 const char *lock_name);
601struct regmap *__regmap_init_i2c(struct i2c_client *i2c,
602 const struct regmap_config *config,
603 struct lock_class_key *lock_key,
604 const char *lock_name);
1f89d2fe
SV
605struct regmap *__regmap_init_mdio(struct mdio_device *mdio_dev,
606 const struct regmap_config *config,
607 struct lock_class_key *lock_key,
608 const char *lock_name);
bcf7eac3
AM
609struct regmap *__regmap_init_sccb(struct i2c_client *i2c,
610 const struct regmap_config *config,
611 struct lock_class_key *lock_key,
612 const char *lock_name);
7d6f7fb0
SK
613struct regmap *__regmap_init_slimbus(struct slim_device *slimbus,
614 const struct regmap_config *config,
615 struct lock_class_key *lock_key,
616 const char *lock_name);
3cfe7a74
NB
617struct regmap *__regmap_init_spi(struct spi_device *dev,
618 const struct regmap_config *config,
619 struct lock_class_key *lock_key,
620 const char *lock_name);
621struct regmap *__regmap_init_spmi_base(struct spmi_device *dev,
622 const struct regmap_config *config,
623 struct lock_class_key *lock_key,
624 const char *lock_name);
625struct regmap *__regmap_init_spmi_ext(struct spmi_device *dev,
626 const struct regmap_config *config,
627 struct lock_class_key *lock_key,
628 const char *lock_name);
cc5d0db3
AM
629struct regmap *__regmap_init_w1(struct device *w1_dev,
630 const struct regmap_config *config,
631 struct lock_class_key *lock_key,
632 const char *lock_name);
3cfe7a74
NB
633struct regmap *__regmap_init_mmio_clk(struct device *dev, const char *clk_id,
634 void __iomem *regs,
635 const struct regmap_config *config,
636 struct lock_class_key *lock_key,
637 const char *lock_name);
638struct regmap *__regmap_init_ac97(struct snd_ac97 *ac97,
639 const struct regmap_config *config,
640 struct lock_class_key *lock_key,
641 const char *lock_name);
7c22ce6e
VK
642struct regmap *__regmap_init_sdw(struct sdw_slave *sdw,
643 const struct regmap_config *config,
644 struct lock_class_key *lock_key,
645 const char *lock_name);
fb5103f9
PLB
646struct regmap *__regmap_init_sdw_mbq(struct sdw_slave *sdw,
647 const struct regmap_config *config,
648 struct lock_class_key *lock_key,
649 const char *lock_name);
7f9fb673
XY
650struct regmap *__regmap_init_spi_avmm(struct spi_device *spi,
651 const struct regmap_config *config,
652 struct lock_class_key *lock_key,
653 const char *lock_name);
bf0d29fb
EJ
654struct regmap *__regmap_init_fsi(struct fsi_device *fsi_dev,
655 const struct regmap_config *config,
656 struct lock_class_key *lock_key,
657 const char *lock_name);
3cfe7a74
NB
658
659struct regmap *__devm_regmap_init(struct device *dev,
660 const struct regmap_bus *bus,
661 void *bus_context,
662 const struct regmap_config *config,
663 struct lock_class_key *lock_key,
664 const char *lock_name);
665struct regmap *__devm_regmap_init_i2c(struct i2c_client *i2c,
666 const struct regmap_config *config,
667 struct lock_class_key *lock_key,
668 const char *lock_name);
1f89d2fe
SV
669struct regmap *__devm_regmap_init_mdio(struct mdio_device *mdio_dev,
670 const struct regmap_config *config,
671 struct lock_class_key *lock_key,
672 const char *lock_name);
bcf7eac3
AM
673struct regmap *__devm_regmap_init_sccb(struct i2c_client *i2c,
674 const struct regmap_config *config,
675 struct lock_class_key *lock_key,
676 const char *lock_name);
3cfe7a74
NB
677struct regmap *__devm_regmap_init_spi(struct spi_device *dev,
678 const struct regmap_config *config,
679 struct lock_class_key *lock_key,
680 const char *lock_name);
681struct regmap *__devm_regmap_init_spmi_base(struct spmi_device *dev,
682 const struct regmap_config *config,
683 struct lock_class_key *lock_key,
684 const char *lock_name);
685struct regmap *__devm_regmap_init_spmi_ext(struct spmi_device *dev,
686 const struct regmap_config *config,
687 struct lock_class_key *lock_key,
688 const char *lock_name);
cc5d0db3
AM
689struct regmap *__devm_regmap_init_w1(struct device *w1_dev,
690 const struct regmap_config *config,
691 struct lock_class_key *lock_key,
692 const char *lock_name);
3cfe7a74
NB
693struct regmap *__devm_regmap_init_mmio_clk(struct device *dev,
694 const char *clk_id,
695 void __iomem *regs,
696 const struct regmap_config *config,
697 struct lock_class_key *lock_key,
698 const char *lock_name);
699struct regmap *__devm_regmap_init_ac97(struct snd_ac97 *ac97,
700 const struct regmap_config *config,
701 struct lock_class_key *lock_key,
702 const char *lock_name);
7c22ce6e
VK
703struct regmap *__devm_regmap_init_sdw(struct sdw_slave *sdw,
704 const struct regmap_config *config,
705 struct lock_class_key *lock_key,
706 const char *lock_name);
fb5103f9
PLB
707struct regmap *__devm_regmap_init_sdw_mbq(struct sdw_slave *sdw,
708 const struct regmap_config *config,
709 struct lock_class_key *lock_key,
710 const char *lock_name);
ed24d568
SK
711struct regmap *__devm_regmap_init_slimbus(struct slim_device *slimbus,
712 const struct regmap_config *config,
713 struct lock_class_key *lock_key,
714 const char *lock_name);
6445500b
VS
715struct regmap *__devm_regmap_init_i3c(struct i3c_device *i3c,
716 const struct regmap_config *config,
717 struct lock_class_key *lock_key,
718 const char *lock_name);
7f9fb673
XY
719struct regmap *__devm_regmap_init_spi_avmm(struct spi_device *spi,
720 const struct regmap_config *config,
721 struct lock_class_key *lock_key,
722 const char *lock_name);
bf0d29fb
EJ
723struct regmap *__devm_regmap_init_fsi(struct fsi_device *fsi_dev,
724 const struct regmap_config *config,
725 struct lock_class_key *lock_key,
726 const char *lock_name);
727
3cfe7a74
NB
728/*
729 * Wrapper for regmap_init macros to include a unique lockdep key and name
730 * for each call. No-op if CONFIG_LOCKDEP is not set.
731 *
732 * @fn: Real function to call (in the form __[*_]regmap_init[_*])
733 * @name: Config variable name (#config in the calling macro)
734 **/
735#ifdef CONFIG_LOCKDEP
736#define __regmap_lockdep_wrapper(fn, name, ...) \
737( \
738 ({ \
739 static struct lock_class_key _key; \
740 fn(__VA_ARGS__, &_key, \
741 KBUILD_BASENAME ":" \
742 __stringify(__LINE__) ":" \
743 "(" name ")->lock"); \
744 }) \
745)
746#else
747#define __regmap_lockdep_wrapper(fn, name, ...) fn(__VA_ARGS__, NULL, NULL)
748#endif
749
1ed81114 750/**
2cf8e2df 751 * regmap_init() - Initialise register map
1ed81114
NB
752 *
753 * @dev: Device that will be interacted with
754 * @bus: Bus-specific callbacks to use with device
755 * @bus_context: Data passed to bus-specific callbacks
756 * @config: Configuration for register map
757 *
758 * The return value will be an ERR_PTR() on error or a valid pointer to
759 * a struct regmap. This function should generally not be called
760 * directly, it should be called by bus-specific init functions.
761 */
3cfe7a74
NB
762#define regmap_init(dev, bus, bus_context, config) \
763 __regmap_lockdep_wrapper(__regmap_init, #config, \
764 dev, bus, bus_context, config)
6cfec04b 765int regmap_attach_dev(struct device *dev, struct regmap *map,
3cfe7a74 766 const struct regmap_config *config);
22853223 767
1ed81114 768/**
2cf8e2df 769 * regmap_init_i2c() - Initialise register map
1ed81114
NB
770 *
771 * @i2c: Device that will be interacted with
772 * @config: Configuration for register map
773 *
774 * The return value will be an ERR_PTR() on error or a valid pointer to
775 * a struct regmap.
776 */
3cfe7a74
NB
777#define regmap_init_i2c(i2c, config) \
778 __regmap_lockdep_wrapper(__regmap_init_i2c, #config, \
779 i2c, config)
1ed81114 780
1f89d2fe
SV
781/**
782 * regmap_init_mdio() - Initialise register map
783 *
784 * @mdio_dev: Device that will be interacted with
785 * @config: Configuration for register map
786 *
787 * The return value will be an ERR_PTR() on error or a valid pointer to
788 * a struct regmap.
789 */
790#define regmap_init_mdio(mdio_dev, config) \
791 __regmap_lockdep_wrapper(__regmap_init_mdio, #config, \
792 mdio_dev, config)
793
bcf7eac3
AM
794/**
795 * regmap_init_sccb() - Initialise register map
796 *
797 * @i2c: Device that will be interacted with
798 * @config: Configuration for register map
799 *
800 * The return value will be an ERR_PTR() on error or a valid pointer to
801 * a struct regmap.
802 */
803#define regmap_init_sccb(i2c, config) \
804 __regmap_lockdep_wrapper(__regmap_init_sccb, #config, \
805 i2c, config)
806
7d6f7fb0
SK
807/**
808 * regmap_init_slimbus() - Initialise register map
809 *
810 * @slimbus: Device that will be interacted with
811 * @config: Configuration for register map
812 *
813 * The return value will be an ERR_PTR() on error or a valid pointer to
814 * a struct regmap.
815 */
816#define regmap_init_slimbus(slimbus, config) \
817 __regmap_lockdep_wrapper(__regmap_init_slimbus, #config, \
818 slimbus, config)
819
1ed81114 820/**
2cf8e2df 821 * regmap_init_spi() - Initialise register map
1ed81114 822 *
2cf8e2df 823 * @dev: Device that will be interacted with
1ed81114
NB
824 * @config: Configuration for register map
825 *
826 * The return value will be an ERR_PTR() on error or a valid pointer to
827 * a struct regmap.
828 */
3cfe7a74
NB
829#define regmap_init_spi(dev, config) \
830 __regmap_lockdep_wrapper(__regmap_init_spi, #config, \
831 dev, config)
1ed81114
NB
832
833/**
2cf8e2df
CK
834 * regmap_init_spmi_base() - Create regmap for the Base register space
835 *
836 * @dev: SPMI device that will be interacted with
1ed81114
NB
837 * @config: Configuration for register map
838 *
839 * The return value will be an ERR_PTR() on error or a valid pointer to
840 * a struct regmap.
841 */
3cfe7a74
NB
842#define regmap_init_spmi_base(dev, config) \
843 __regmap_lockdep_wrapper(__regmap_init_spmi_base, #config, \
844 dev, config)
1ed81114
NB
845
846/**
2cf8e2df
CK
847 * regmap_init_spmi_ext() - Create regmap for Ext register space
848 *
849 * @dev: Device that will be interacted with
1ed81114
NB
850 * @config: Configuration for register map
851 *
852 * The return value will be an ERR_PTR() on error or a valid pointer to
853 * a struct regmap.
854 */
3cfe7a74
NB
855#define regmap_init_spmi_ext(dev, config) \
856 __regmap_lockdep_wrapper(__regmap_init_spmi_ext, #config, \
857 dev, config)
1ed81114 858
cc5d0db3
AM
859/**
860 * regmap_init_w1() - Initialise register map
861 *
862 * @w1_dev: Device that will be interacted with
863 * @config: Configuration for register map
864 *
865 * The return value will be an ERR_PTR() on error or a valid pointer to
866 * a struct regmap.
867 */
868#define regmap_init_w1(w1_dev, config) \
869 __regmap_lockdep_wrapper(__regmap_init_w1, #config, \
870 w1_dev, config)
871
1ed81114 872/**
2cf8e2df 873 * regmap_init_mmio_clk() - Initialise register map with register clock
1ed81114
NB
874 *
875 * @dev: Device that will be interacted with
876 * @clk_id: register clock consumer ID
877 * @regs: Pointer to memory-mapped IO region
878 * @config: Configuration for register map
879 *
880 * The return value will be an ERR_PTR() on error or a valid pointer to
881 * a struct regmap.
882 */
3cfe7a74
NB
883#define regmap_init_mmio_clk(dev, clk_id, regs, config) \
884 __regmap_lockdep_wrapper(__regmap_init_mmio_clk, #config, \
885 dev, clk_id, regs, config)
878ec67b
PZ
886
887/**
2cf8e2df 888 * regmap_init_mmio() - Initialise register map
878ec67b
PZ
889 *
890 * @dev: Device that will be interacted with
891 * @regs: Pointer to memory-mapped IO region
892 * @config: Configuration for register map
893 *
894 * The return value will be an ERR_PTR() on error or a valid pointer to
895 * a struct regmap.
896 */
1ed81114
NB
897#define regmap_init_mmio(dev, regs, config) \
898 regmap_init_mmio_clk(dev, NULL, regs, config)
899
900/**
2cf8e2df 901 * regmap_init_ac97() - Initialise AC'97 register map
1ed81114
NB
902 *
903 * @ac97: Device that will be interacted with
904 * @config: Configuration for register map
905 *
906 * The return value will be an ERR_PTR() on error or a valid pointer to
907 * a struct regmap.
908 */
3cfe7a74
NB
909#define regmap_init_ac97(ac97, config) \
910 __regmap_lockdep_wrapper(__regmap_init_ac97, #config, \
911 ac97, config)
22853223 912bool regmap_ac97_default_volatile(struct device *dev, unsigned int reg);
878ec67b 913
7c22ce6e
VK
914/**
915 * regmap_init_sdw() - Initialise register map
916 *
917 * @sdw: Device that will be interacted with
918 * @config: Configuration for register map
919 *
920 * The return value will be an ERR_PTR() on error or a valid pointer to
921 * a struct regmap.
922 */
923#define regmap_init_sdw(sdw, config) \
924 __regmap_lockdep_wrapper(__regmap_init_sdw, #config, \
925 sdw, config)
926
fb5103f9
PLB
927/**
928 * regmap_init_sdw_mbq() - Initialise register map
929 *
930 * @sdw: Device that will be interacted with
931 * @config: Configuration for register map
932 *
933 * The return value will be an ERR_PTR() on error or a valid pointer to
934 * a struct regmap.
935 */
936#define regmap_init_sdw_mbq(sdw, config) \
937 __regmap_lockdep_wrapper(__regmap_init_sdw_mbq, #config, \
938 sdw, config)
939
7f9fb673
XY
940/**
941 * regmap_init_spi_avmm() - Initialize register map for Intel SPI Slave
942 * to AVMM Bus Bridge
943 *
944 * @spi: Device that will be interacted with
945 * @config: Configuration for register map
946 *
947 * The return value will be an ERR_PTR() on error or a valid pointer
948 * to a struct regmap.
949 */
950#define regmap_init_spi_avmm(spi, config) \
951 __regmap_lockdep_wrapper(__regmap_init_spi_avmm, #config, \
952 spi, config)
7c22ce6e 953
bf0d29fb
EJ
954/**
955 * regmap_init_fsi() - Initialise register map
956 *
957 * @fsi_dev: Device that will be interacted with
958 * @config: Configuration for register map
959 *
960 * The return value will be an ERR_PTR() on error or a valid pointer to
961 * a struct regmap.
962 */
963#define regmap_init_fsi(fsi_dev, config) \
964 __regmap_lockdep_wrapper(__regmap_init_fsi, #config, fsi_dev, \
965 config)
966
1ed81114 967/**
2cf8e2df 968 * devm_regmap_init() - Initialise managed register map
1ed81114
NB
969 *
970 * @dev: Device that will be interacted with
971 * @bus: Bus-specific callbacks to use with device
972 * @bus_context: Data passed to bus-specific callbacks
973 * @config: Configuration for register map
974 *
975 * The return value will be an ERR_PTR() on error or a valid pointer
976 * to a struct regmap. This function should generally not be called
977 * directly, it should be called by bus-specific init functions. The
978 * map will be automatically freed by the device management code.
979 */
3cfe7a74
NB
980#define devm_regmap_init(dev, bus, bus_context, config) \
981 __regmap_lockdep_wrapper(__devm_regmap_init, #config, \
982 dev, bus, bus_context, config)
1ed81114
NB
983
984/**
2cf8e2df 985 * devm_regmap_init_i2c() - Initialise managed register map
1ed81114
NB
986 *
987 * @i2c: Device that will be interacted with
988 * @config: Configuration for register map
989 *
990 * The return value will be an ERR_PTR() on error or a valid pointer
991 * to a struct regmap. The regmap will be automatically freed by the
992 * device management code.
993 */
3cfe7a74
NB
994#define devm_regmap_init_i2c(i2c, config) \
995 __regmap_lockdep_wrapper(__devm_regmap_init_i2c, #config, \
996 i2c, config)
1ed81114 997
1f89d2fe
SV
998/**
999 * devm_regmap_init_mdio() - Initialise managed register map
1000 *
1001 * @mdio_dev: Device that will be interacted with
1002 * @config: Configuration for register map
1003 *
1004 * The return value will be an ERR_PTR() on error or a valid pointer
1005 * to a struct regmap. The regmap will be automatically freed by the
1006 * device management code.
1007 */
1008#define devm_regmap_init_mdio(mdio_dev, config) \
1009 __regmap_lockdep_wrapper(__devm_regmap_init_mdio, #config, \
1010 mdio_dev, config)
1011
bcf7eac3
AM
1012/**
1013 * devm_regmap_init_sccb() - Initialise managed register map
1014 *
1015 * @i2c: Device that will be interacted with
1016 * @config: Configuration for register map
1017 *
1018 * The return value will be an ERR_PTR() on error or a valid pointer
1019 * to a struct regmap. The regmap will be automatically freed by the
1020 * device management code.
1021 */
1022#define devm_regmap_init_sccb(i2c, config) \
1023 __regmap_lockdep_wrapper(__devm_regmap_init_sccb, #config, \
1024 i2c, config)
1025
1ed81114 1026/**
2cf8e2df 1027 * devm_regmap_init_spi() - Initialise register map
1ed81114 1028 *
2cf8e2df 1029 * @dev: Device that will be interacted with
1ed81114
NB
1030 * @config: Configuration for register map
1031 *
1032 * The return value will be an ERR_PTR() on error or a valid pointer
1033 * to a struct regmap. The map will be automatically freed by the
1034 * device management code.
1035 */
3cfe7a74
NB
1036#define devm_regmap_init_spi(dev, config) \
1037 __regmap_lockdep_wrapper(__devm_regmap_init_spi, #config, \
1038 dev, config)
1ed81114
NB
1039
1040/**
2cf8e2df
CK
1041 * devm_regmap_init_spmi_base() - Create managed regmap for Base register space
1042 *
1043 * @dev: SPMI device that will be interacted with
1ed81114
NB
1044 * @config: Configuration for register map
1045 *
1046 * The return value will be an ERR_PTR() on error or a valid pointer
1047 * to a struct regmap. The regmap will be automatically freed by the
1048 * device management code.
1049 */
3cfe7a74
NB
1050#define devm_regmap_init_spmi_base(dev, config) \
1051 __regmap_lockdep_wrapper(__devm_regmap_init_spmi_base, #config, \
1052 dev, config)
1ed81114
NB
1053
1054/**
2cf8e2df
CK
1055 * devm_regmap_init_spmi_ext() - Create managed regmap for Ext register space
1056 *
1057 * @dev: SPMI device that will be interacted with
1ed81114
NB
1058 * @config: Configuration for register map
1059 *
1060 * The return value will be an ERR_PTR() on error or a valid pointer
1061 * to a struct regmap. The regmap will be automatically freed by the
1062 * device management code.
1063 */
3cfe7a74
NB
1064#define devm_regmap_init_spmi_ext(dev, config) \
1065 __regmap_lockdep_wrapper(__devm_regmap_init_spmi_ext, #config, \
1066 dev, config)
3cfe7a74 1067
cc5d0db3
AM
1068/**
1069 * devm_regmap_init_w1() - Initialise managed register map
1070 *
1071 * @w1_dev: Device that will be interacted with
1072 * @config: Configuration for register map
1073 *
1074 * The return value will be an ERR_PTR() on error or a valid pointer
1075 * to a struct regmap. The regmap will be automatically freed by the
1076 * device management code.
1077 */
1078#define devm_regmap_init_w1(w1_dev, config) \
1079 __regmap_lockdep_wrapper(__devm_regmap_init_w1, #config, \
1080 w1_dev, config)
878ec67b 1081/**
2cf8e2df 1082 * devm_regmap_init_mmio_clk() - Initialise managed register map with clock
878ec67b
PZ
1083 *
1084 * @dev: Device that will be interacted with
1ed81114 1085 * @clk_id: register clock consumer ID
878ec67b
PZ
1086 * @regs: Pointer to memory-mapped IO region
1087 * @config: Configuration for register map
1088 *
1ed81114
NB
1089 * The return value will be an ERR_PTR() on error or a valid pointer
1090 * to a struct regmap. The regmap will be automatically freed by the
1091 * device management code.
878ec67b 1092 */
1ed81114
NB
1093#define devm_regmap_init_mmio_clk(dev, clk_id, regs, config) \
1094 __regmap_lockdep_wrapper(__devm_regmap_init_mmio_clk, #config, \
1095 dev, clk_id, regs, config)
878ec67b
PZ
1096
1097/**
2cf8e2df 1098 * devm_regmap_init_mmio() - Initialise managed register map
878ec67b
PZ
1099 *
1100 * @dev: Device that will be interacted with
1101 * @regs: Pointer to memory-mapped IO region
1102 * @config: Configuration for register map
1103 *
1104 * The return value will be an ERR_PTR() on error or a valid pointer
1105 * to a struct regmap. The regmap will be automatically freed by the
1106 * device management code.
1107 */
3cfe7a74
NB
1108#define devm_regmap_init_mmio(dev, regs, config) \
1109 devm_regmap_init_mmio_clk(dev, NULL, regs, config)
c0eb4676 1110
1ed81114 1111/**
2cf8e2df 1112 * devm_regmap_init_ac97() - Initialise AC'97 register map
1ed81114
NB
1113 *
1114 * @ac97: Device that will be interacted with
1115 * @config: Configuration for register map
1116 *
1117 * The return value will be an ERR_PTR() on error or a valid pointer
1118 * to a struct regmap. The regmap will be automatically freed by the
1119 * device management code.
1120 */
1121#define devm_regmap_init_ac97(ac97, config) \
1122 __regmap_lockdep_wrapper(__devm_regmap_init_ac97, #config, \
1123 ac97, config)
c0eb4676 1124
7c22ce6e
VK
1125/**
1126 * devm_regmap_init_sdw() - Initialise managed register map
1127 *
1128 * @sdw: Device that will be interacted with
1129 * @config: Configuration for register map
1130 *
1131 * The return value will be an ERR_PTR() on error or a valid pointer
1132 * to a struct regmap. The regmap will be automatically freed by the
1133 * device management code.
1134 */
1135#define devm_regmap_init_sdw(sdw, config) \
1136 __regmap_lockdep_wrapper(__devm_regmap_init_sdw, #config, \
1137 sdw, config)
1138
fb5103f9
PLB
1139/**
1140 * devm_regmap_init_sdw_mbq() - Initialise managed register map
1141 *
1142 * @sdw: Device that will be interacted with
1143 * @config: Configuration for register map
1144 *
1145 * The return value will be an ERR_PTR() on error or a valid pointer
1146 * to a struct regmap. The regmap will be automatically freed by the
1147 * device management code.
1148 */
1149#define devm_regmap_init_sdw_mbq(sdw, config) \
1150 __regmap_lockdep_wrapper(__devm_regmap_init_sdw_mbq, #config, \
1151 sdw, config)
1152
ed24d568
SK
1153/**
1154 * devm_regmap_init_slimbus() - Initialise managed register map
1155 *
1156 * @slimbus: Device that will be interacted with
1157 * @config: Configuration for register map
1158 *
1159 * The return value will be an ERR_PTR() on error or a valid pointer
1160 * to a struct regmap. The regmap will be automatically freed by the
1161 * device management code.
1162 */
1163#define devm_regmap_init_slimbus(slimbus, config) \
1164 __regmap_lockdep_wrapper(__devm_regmap_init_slimbus, #config, \
1165 slimbus, config)
6445500b
VS
1166
1167/**
1168 * devm_regmap_init_i3c() - Initialise managed register map
1169 *
1170 * @i3c: Device that will be interacted with
1171 * @config: Configuration for register map
1172 *
1173 * The return value will be an ERR_PTR() on error or a valid pointer
1174 * to a struct regmap. The regmap will be automatically freed by the
1175 * device management code.
1176 */
1177#define devm_regmap_init_i3c(i3c, config) \
1178 __regmap_lockdep_wrapper(__devm_regmap_init_i3c, #config, \
1179 i3c, config)
1180
7f9fb673
XY
1181/**
1182 * devm_regmap_init_spi_avmm() - Initialize register map for Intel SPI Slave
1183 * to AVMM Bus Bridge
1184 *
1185 * @spi: Device that will be interacted with
1186 * @config: Configuration for register map
1187 *
1188 * The return value will be an ERR_PTR() on error or a valid pointer
1189 * to a struct regmap. The map will be automatically freed by the
1190 * device management code.
1191 */
1192#define devm_regmap_init_spi_avmm(spi, config) \
1193 __regmap_lockdep_wrapper(__devm_regmap_init_spi_avmm, #config, \
1194 spi, config)
1195
bf0d29fb
EJ
1196/**
1197 * devm_regmap_init_fsi() - Initialise managed register map
1198 *
1199 * @fsi_dev: Device that will be interacted with
1200 * @config: Configuration for register map
1201 *
1202 * The return value will be an ERR_PTR() on error or a valid pointer
1203 * to a struct regmap. The regmap will be automatically freed by the
1204 * device management code.
1205 */
1206#define devm_regmap_init_fsi(fsi_dev, config) \
1207 __regmap_lockdep_wrapper(__devm_regmap_init_fsi, #config, \
1208 fsi_dev, config)
1209
31895662
MR
1210int regmap_mmio_attach_clk(struct regmap *map, struct clk *clk);
1211void regmap_mmio_detach_clk(struct regmap *map);
b83a313b 1212void regmap_exit(struct regmap *map);
bf315173
MB
1213int regmap_reinit_cache(struct regmap *map,
1214 const struct regmap_config *config);
72b39f6f 1215struct regmap *dev_get_regmap(struct device *dev, const char *name);
8d7d3972 1216struct device *regmap_get_device(struct regmap *map);
b83a313b 1217int regmap_write(struct regmap *map, unsigned int reg, unsigned int val);
915f441b 1218int regmap_write_async(struct regmap *map, unsigned int reg, unsigned int val);
b83a313b
MB
1219int regmap_raw_write(struct regmap *map, unsigned int reg,
1220 const void *val, size_t val_len);
cdf6b11d
BW
1221int regmap_noinc_write(struct regmap *map, unsigned int reg,
1222 const void *val, size_t val_len);
8eaeb219
LD
1223int regmap_bulk_write(struct regmap *map, unsigned int reg, const void *val,
1224 size_t val_count);
8019ff6c 1225int regmap_multi_reg_write(struct regmap *map, const struct reg_sequence *regs,
e33fabd3 1226 int num_regs);
1d5b40bc 1227int regmap_multi_reg_write_bypassed(struct regmap *map,
8019ff6c 1228 const struct reg_sequence *regs,
1d5b40bc 1229 int num_regs);
0d509f2b
MB
1230int regmap_raw_write_async(struct regmap *map, unsigned int reg,
1231 const void *val, size_t val_len);
b83a313b 1232int regmap_read(struct regmap *map, unsigned int reg, unsigned int *val);
70ee853e 1233int regmap_read_bypassed(struct regmap *map, unsigned int reg, unsigned int *val);
b83a313b
MB
1234int regmap_raw_read(struct regmap *map, unsigned int reg,
1235 void *val, size_t val_len);
74fe7b55
LC
1236int regmap_noinc_read(struct regmap *map, unsigned int reg,
1237 void *val, size_t val_len);
b83a313b
MB
1238int regmap_bulk_read(struct regmap *map, unsigned int reg, void *val,
1239 size_t val_count);
91d31b9f
KM
1240int regmap_update_bits_base(struct regmap *map, unsigned int reg,
1241 unsigned int mask, unsigned int val,
1242 bool *change, bool async, bool force);
4b9e7edb
BG
1243
1244static inline int regmap_update_bits(struct regmap *map, unsigned int reg,
1245 unsigned int mask, unsigned int val)
1246{
1247 return regmap_update_bits_base(map, reg, mask, val, NULL, false, false);
1248}
1249
1250static inline int regmap_update_bits_async(struct regmap *map, unsigned int reg,
1251 unsigned int mask, unsigned int val)
1252{
1253 return regmap_update_bits_base(map, reg, mask, val, NULL, true, false);
1254}
1255
1256static inline int regmap_update_bits_check(struct regmap *map, unsigned int reg,
1257 unsigned int mask, unsigned int val,
1258 bool *change)
1259{
1260 return regmap_update_bits_base(map, reg, mask, val,
1261 change, false, false);
1262}
1263
1264static inline int
1265regmap_update_bits_check_async(struct regmap *map, unsigned int reg,
1266 unsigned int mask, unsigned int val,
1267 bool *change)
1268{
1269 return regmap_update_bits_base(map, reg, mask, val,
1270 change, true, false);
1271}
1272
1273static inline int regmap_write_bits(struct regmap *map, unsigned int reg,
1274 unsigned int mask, unsigned int val)
1275{
1276 return regmap_update_bits_base(map, reg, mask, val, NULL, false, true);
1277}
1278
a6539c32 1279int regmap_get_val_bytes(struct regmap *map);
668abc72 1280int regmap_get_max_register(struct regmap *map);
a2f776cb 1281int regmap_get_reg_stride(struct regmap *map);
a6d99022 1282bool regmap_might_sleep(struct regmap *map);
0d509f2b 1283int regmap_async_complete(struct regmap *map);
221ad7f2 1284bool regmap_can_raw_write(struct regmap *map);
f50c9eb4
MSP
1285size_t regmap_get_raw_read_max(struct regmap *map);
1286size_t regmap_get_raw_write_max(struct regmap *map);
b83a313b 1287
39a58439 1288int regcache_sync(struct regmap *map);
4d4cfd16
MB
1289int regcache_sync_region(struct regmap *map, unsigned int min,
1290 unsigned int max);
697e85bc
MB
1291int regcache_drop_region(struct regmap *map, unsigned int min,
1292 unsigned int max);
92afb286 1293void regcache_cache_only(struct regmap *map, bool enable);
6eb0f5e0 1294void regcache_cache_bypass(struct regmap *map, bool enable);
8ae0d7e8 1295void regcache_mark_dirty(struct regmap *map);
78908f45 1296bool regcache_reg_cached(struct regmap *map, unsigned int reg);
92afb286 1297
154881e5
MB
1298bool regmap_check_range_table(struct regmap *map, unsigned int reg,
1299 const struct regmap_access_table *table);
1300
8019ff6c 1301int regmap_register_patch(struct regmap *map, const struct reg_sequence *regs,
22f0d90a 1302 int num_regs);
13ff50c8
NC
1303int regmap_parse_val(struct regmap *map, const void *buf,
1304 unsigned int *val);
22f0d90a 1305
76aad392
DC
1306static inline bool regmap_reg_in_range(unsigned int reg,
1307 const struct regmap_range *range)
1308{
1309 return reg >= range->range_min && reg <= range->range_max;
1310}
1311
1312bool regmap_reg_in_ranges(unsigned int reg,
1313 const struct regmap_range *ranges,
1314 unsigned int nranges);
1315
aa2ff9db
BG
1316static inline int regmap_set_bits(struct regmap *map,
1317 unsigned int reg, unsigned int bits)
1318{
1319 return regmap_update_bits_base(map, reg, bits, bits,
1320 NULL, false, false);
1321}
1322
1323static inline int regmap_clear_bits(struct regmap *map,
1324 unsigned int reg, unsigned int bits)
1325{
1326 return regmap_update_bits_base(map, reg, bits, 0, NULL, false, false);
1327}
1328
1329int regmap_test_bits(struct regmap *map, unsigned int reg, unsigned int bits);
1330
67252287 1331/**
2cf8e2df 1332 * struct reg_field - Description of an register field
67252287
SK
1333 *
1334 * @reg: Offset of the register within the regmap bank
1335 * @lsb: lsb of the register field.
f27b37f5 1336 * @msb: msb of the register field.
a0102375
KM
1337 * @id_size: port size if it has some ports
1338 * @id_offset: address offset for each ports
67252287
SK
1339 */
1340struct reg_field {
1341 unsigned int reg;
1342 unsigned int lsb;
1343 unsigned int msb;
a0102375
KM
1344 unsigned int id_size;
1345 unsigned int id_offset;
67252287
SK
1346};
1347
1348#define REG_FIELD(_reg, _lsb, _msb) { \
1349 .reg = _reg, \
1350 .lsb = _lsb, \
1351 .msb = _msb, \
1352 }
1353
8baebfc2
VO
1354#define REG_FIELD_ID(_reg, _lsb, _msb, _size, _offset) { \
1355 .reg = _reg, \
1356 .lsb = _lsb, \
1357 .msb = _msb, \
1358 .id_size = _size, \
1359 .id_offset = _offset, \
1360 }
1361
67252287
SK
1362struct regmap_field *regmap_field_alloc(struct regmap *regmap,
1363 struct reg_field reg_field);
1364void regmap_field_free(struct regmap_field *field);
1365
1366struct regmap_field *devm_regmap_field_alloc(struct device *dev,
1367 struct regmap *regmap, struct reg_field reg_field);
1368void devm_regmap_field_free(struct device *dev, struct regmap_field *field);
1369
ea470b82
SK
1370int regmap_field_bulk_alloc(struct regmap *regmap,
1371 struct regmap_field **rm_field,
29c34975 1372 const struct reg_field *reg_field,
ea470b82
SK
1373 int num_fields);
1374void regmap_field_bulk_free(struct regmap_field *field);
1375int devm_regmap_field_bulk_alloc(struct device *dev, struct regmap *regmap,
1376 struct regmap_field **field,
29c34975
IZ
1377 const struct reg_field *reg_field,
1378 int num_fields);
ea470b82
SK
1379void devm_regmap_field_bulk_free(struct device *dev,
1380 struct regmap_field *field);
1381
67252287 1382int regmap_field_read(struct regmap_field *field, unsigned int *val);
28972eaa
KM
1383int regmap_field_update_bits_base(struct regmap_field *field,
1384 unsigned int mask, unsigned int val,
1385 bool *change, bool async, bool force);
a0102375
KM
1386int regmap_fields_read(struct regmap_field *field, unsigned int id,
1387 unsigned int *val);
e126edec
KM
1388int regmap_fields_update_bits_base(struct regmap_field *field, unsigned int id,
1389 unsigned int mask, unsigned int val,
1390 bool *change, bool async, bool force);
4b9e7edb
BG
1391
1392static inline int regmap_field_write(struct regmap_field *field,
1393 unsigned int val)
1394{
1395 return regmap_field_update_bits_base(field, ~0, val,
1396 NULL, false, false);
1397}
1398
1399static inline int regmap_field_force_write(struct regmap_field *field,
1400 unsigned int val)
1401{
1402 return regmap_field_update_bits_base(field, ~0, val, NULL, false, true);
1403}
1404
1405static inline int regmap_field_update_bits(struct regmap_field *field,
1406 unsigned int mask, unsigned int val)
1407{
1408 return regmap_field_update_bits_base(field, mask, val,
1409 NULL, false, false);
1410}
1411
f67be8b7
LC
1412static inline int regmap_field_set_bits(struct regmap_field *field,
1413 unsigned int bits)
1414{
1415 return regmap_field_update_bits_base(field, bits, bits, NULL, false,
1416 false);
1417}
1418
1419static inline int regmap_field_clear_bits(struct regmap_field *field,
1420 unsigned int bits)
1421{
1422 return regmap_field_update_bits_base(field, bits, 0, NULL, false,
1423 false);
1424}
1425
1426int regmap_field_test_bits(struct regmap_field *field, unsigned int bits);
1427
4b9e7edb
BG
1428static inline int
1429regmap_field_force_update_bits(struct regmap_field *field,
1430 unsigned int mask, unsigned int val)
1431{
1432 return regmap_field_update_bits_base(field, mask, val,
1433 NULL, false, true);
1434}
1435
1436static inline int regmap_fields_write(struct regmap_field *field,
1437 unsigned int id, unsigned int val)
1438{
1439 return regmap_fields_update_bits_base(field, id, ~0, val,
1440 NULL, false, false);
1441}
1442
1443static inline int regmap_fields_force_write(struct regmap_field *field,
1444 unsigned int id, unsigned int val)
1445{
1446 return regmap_fields_update_bits_base(field, id, ~0, val,
1447 NULL, false, true);
1448}
1449
1450static inline int
1451regmap_fields_update_bits(struct regmap_field *field, unsigned int id,
1452 unsigned int mask, unsigned int val)
1453{
1454 return regmap_fields_update_bits_base(field, id, mask, val,
1455 NULL, false, false);
1456}
1457
1458static inline int
1459regmap_fields_force_update_bits(struct regmap_field *field, unsigned int id,
1460 unsigned int mask, unsigned int val)
1461{
1462 return regmap_fields_update_bits_base(field, id, mask, val,
1463 NULL, false, true);
1464}
1465
1c2928e3
MV
1466/**
1467 * struct regmap_irq_type - IRQ type definitions.
1468 *
1469 * @type_reg_offset: Offset register for the irq type setting.
1470 * @type_rising_val: Register value to configure RISING type irq.
1471 * @type_falling_val: Register value to configure FALLING type irq.
1472 * @type_level_low_val: Register value to configure LEVEL_LOW type irq.
1473 * @type_level_high_val: Register value to configure LEVEL_HIGH type irq.
1474 * @types_supported: logical OR of IRQ_TYPE_* flags indicating supported types.
1475 */
1476struct regmap_irq_type {
1477 unsigned int type_reg_offset;
1478 unsigned int type_reg_mask;
1479 unsigned int type_rising_val;
1480 unsigned int type_falling_val;
1481 unsigned int type_level_low_val;
1482 unsigned int type_level_high_val;
1483 unsigned int types_supported;
1484};
76aad392 1485
f8beab2b 1486/**
2cf8e2df 1487 * struct regmap_irq - Description of an IRQ for the generic regmap irq_chip.
f8beab2b
MB
1488 *
1489 * @reg_offset: Offset of the status/mask register within the bank
1490 * @mask: Mask used to flag/control the register.
1c2928e3 1491 * @type: IRQ trigger type setting details if supported.
f8beab2b
MB
1492 */
1493struct regmap_irq {
1494 unsigned int reg_offset;
1495 unsigned int mask;
1c2928e3 1496 struct regmap_irq_type type;
f8beab2b
MB
1497};
1498
b4fe8ba7
QZ
1499#define REGMAP_IRQ_REG(_irq, _off, _mask) \
1500 [_irq] = { .reg_offset = (_off), .mask = (_mask) }
1501
43fac323
TX
1502#define REGMAP_IRQ_REG_LINE(_id, _reg_bits) \
1503 [_id] = { \
1504 .mask = BIT((_id) % (_reg_bits)), \
1505 .reg_offset = (_id) / (_reg_bits), \
1506 }
1507
a2d21848
MV
1508#define REGMAP_IRQ_MAIN_REG_OFFSET(arr) \
1509 { .num_regs = ARRAY_SIZE((arr)), .offset = &(arr)[0] }
1510
1511struct regmap_irq_sub_irq_map {
1512 unsigned int num_regs;
1513 unsigned int *offset;
1514};
1515
bdf9b86c
AM
1516struct regmap_irq_chip_data;
1517
f8beab2b 1518/**
2cf8e2df 1519 * struct regmap_irq_chip - Description of a generic regmap irq_chip.
f8beab2b
MB
1520 *
1521 * @name: Descriptive name for IRQ controller.
1522 *
a2d21848
MV
1523 * @main_status: Base main status register address. For chips which have
1524 * interrupts arranged in separate sub-irq blocks with own IRQ
1525 * registers and which have a main IRQ registers indicating
1526 * sub-irq blocks with unhandled interrupts. For such chips fill
1527 * sub-irq register information in status_base, mask_base and
1528 * ack_base.
1529 * @num_main_status_bits: Should be given to chips where number of meaningfull
1530 * main status bits differs from num_regs.
1531 * @sub_reg_offsets: arrays of mappings from main register bits to sub irq
1532 * registers. First item in array describes the registers
1533 * for first main status bit. Second array for second bit etc.
1534 * Offset is given as sub register status offset to
1535 * status_base. Should contain num_regs arrays.
1536 * Can be provided for chips with more complex mapping than
1537 * 1.st bit to 1.st sub-reg, 2.nd bit to 2.nd sub-reg, ...
1538 * @num_main_regs: Number of 'main status' irq registers for chips which have
1539 * main_status set.
1540 *
f8beab2b 1541 * @status_base: Base status register address.
e8ffb12e
AM
1542 * @mask_base: Base mask register address. Mask bits are set to 1 when an
1543 * interrupt is masked, 0 when unmasked.
1544 * @unmask_base: Base unmask register address. Unmask bits are set to 1 when
1545 * an interrupt is unmasked and 0 when masked.
d3233433
AS
1546 * @ack_base: Base ack address. If zero then the chip is clear on read.
1547 * Using zero value is possible with @use_ack bit.
a43fd50d 1548 * @wake_base: Base address for wake enables. If zero unsupported.
faa87ce9 1549 * @config_base: Base address for IRQ type config regs. If null unsupported.
022f926a 1550 * @irq_reg_stride: Stride to use for chips where registers are not contiguous.
2753e6f8 1551 * @init_ack_masked: Ack all masked interrupts once during initalization.
e8ffb12e
AM
1552 * @mask_unmask_non_inverted: Controls mask bit inversion for chips that set
1553 * both @mask_base and @unmask_base. If false, mask and unmask bits are
1554 * inverted (which is deprecated behavior); if true, bits will not be
1555 * inverted and the registers keep their normal behavior. Note that if
1556 * you use only one of @mask_base or @unmask_base, this flag has no
1557 * effect and is unnecessary. Any new drivers that set both @mask_base
1558 * and @unmask_base should set this to true to avoid relying on the
1559 * deprecated behavior.
d3233433 1560 * @use_ack: Use @ack register even if it is zero.
a650fdd9 1561 * @ack_invert: Inverted ack register: cleared bits for ack.
3a6f0fb7 1562 * @clear_ack: Use this to set 1 and 0 or vice-versa to clear interrupts.
9b400171 1563 * @status_invert: Inverted status register: cleared bits are active interrupts.
68622bdf 1564 * @wake_invert: Inverted wake register: cleared bits are wake enabled.
610fdd66
AM
1565 * @type_in_mask: Use the mask registers for controlling irq type. Use this if
1566 * the hardware provides separate bits for rising/falling edge
1567 * or low/high level interrupts and they should be combined into
1568 * a single logical interrupt. Use &struct regmap_irq_type data
1569 * to define the mask bit for each irq type.
c82ea33e
BG
1570 * @clear_on_unmask: For chips with interrupts cleared on read: read the status
1571 * registers before unmasking interrupts to clear any bits
1572 * set when they were masked.
9b400171 1573 * @runtime_pm: Hold a runtime PM lock on the device when accessing it.
4d60cac9 1574 * @no_status: No status register: all interrupts assumed generated by device.
f8beab2b
MB
1575 *
1576 * @num_regs: Number of registers in each control bank.
9b400171 1577 *
f8beab2b
MB
1578 * @irqs: Descriptors for individual IRQs. Interrupt numbers are
1579 * assigned based on the index in the array of the interrupt.
1580 * @num_irqs: Number of descriptors.
faa87ce9
AM
1581 * @num_config_bases: Number of config base registers.
1582 * @num_config_regs: Number of config registers for each config base register.
9b400171 1583 *
ccc12561
LD
1584 * @handle_pre_irq: Driver specific callback to handle interrupt from device
1585 * before regmap_irq_handler process the interrupts.
1586 * @handle_post_irq: Driver specific callback to handle interrupt from device
1587 * after handling the interrupts in regmap_irq_handler().
69af4bca
WBG
1588 * @handle_mask_sync: Callback used to handle IRQ mask syncs. The index will be
1589 * in the range [0, num_regs)
faa87ce9 1590 * @set_type_config: Callback used for configuring irq types.
bdf9b86c
AM
1591 * @get_irq_reg: Callback for mapping (base register, index) pairs to register
1592 * addresses. The base register will be one of @status_base,
1593 * @mask_base, etc., @main_status, or any of @config_base.
1594 * The index will be in the range [0, num_main_regs[ for the
212bc1ce 1595 * main status base, [0, num_config_regs[ for any config
bdf9b86c
AM
1596 * register base, and [0, num_regs[ for any other base.
1597 * If unspecified then regmap_irq_get_irq_reg_linear() is used.
ccc12561
LD
1598 * @irq_drv_data: Driver specific IRQ data which is passed as parameter when
1599 * driver specific pre/post interrupt handler is called.
2cf8e2df
CK
1600 *
1601 * This is not intended to handle every possible interrupt controller, but
1602 * it should handle a substantial proportion of those that are found in the
1603 * wild.
f8beab2b
MB
1604 */
1605struct regmap_irq_chip {
1606 const char *name;
1607
a2d21848
MV
1608 unsigned int main_status;
1609 unsigned int num_main_status_bits;
1610 struct regmap_irq_sub_irq_map *sub_reg_offsets;
1611 int num_main_regs;
1612
f8beab2b
MB
1613 unsigned int status_base;
1614 unsigned int mask_base;
7b7d1968 1615 unsigned int unmask_base;
f8beab2b 1616 unsigned int ack_base;
a43fd50d 1617 unsigned int wake_base;
faa87ce9 1618 const unsigned int *config_base;
022f926a 1619 unsigned int irq_reg_stride;
445cbd21 1620 unsigned int init_ack_masked:1;
e8ffb12e 1621 unsigned int mask_unmask_non_inverted:1;
445cbd21
AM
1622 unsigned int use_ack:1;
1623 unsigned int ack_invert:1;
1624 unsigned int clear_ack:1;
9b400171 1625 unsigned int status_invert:1;
445cbd21 1626 unsigned int wake_invert:1;
445cbd21
AM
1627 unsigned int type_in_mask:1;
1628 unsigned int clear_on_unmask:1;
9b400171 1629 unsigned int runtime_pm:1;
4d60cac9 1630 unsigned int no_status:1;
f8beab2b
MB
1631
1632 int num_regs;
1633
1634 const struct regmap_irq *irqs;
1635 int num_irqs;
7a78479f 1636
faa87ce9
AM
1637 int num_config_bases;
1638 int num_config_regs;
ccc12561
LD
1639
1640 int (*handle_pre_irq)(void *irq_drv_data);
1641 int (*handle_post_irq)(void *irq_drv_data);
69da5aa9 1642 int (*handle_mask_sync)(int index, unsigned int mask_buf_def,
69af4bca 1643 unsigned int mask_buf, void *irq_drv_data);
faa87ce9 1644 int (*set_type_config)(unsigned int **buf, unsigned int type,
7697c64b
WBG
1645 const struct regmap_irq *irq_data, int idx,
1646 void *irq_drv_data);
bdf9b86c
AM
1647 unsigned int (*get_irq_reg)(struct regmap_irq_chip_data *data,
1648 unsigned int base, int index);
ccc12561 1649 void *irq_drv_data;
f8beab2b
MB
1650};
1651
bdf9b86c
AM
1652unsigned int regmap_irq_get_irq_reg_linear(struct regmap_irq_chip_data *data,
1653 unsigned int base, int index);
faa87ce9 1654int regmap_irq_set_type_config_simple(unsigned int **buf, unsigned int type,
7697c64b
WBG
1655 const struct regmap_irq *irq_data,
1656 int idx, void *irq_drv_data);
faa87ce9 1657
f8beab2b 1658int regmap_add_irq_chip(struct regmap *map, int irq, int irq_flags,
b026ddbb 1659 int irq_base, const struct regmap_irq_chip *chip,
f8beab2b 1660 struct regmap_irq_chip_data **data);
5cc2013b
MW
1661int regmap_add_irq_chip_fwnode(struct fwnode_handle *fwnode,
1662 struct regmap *map, int irq,
1663 int irq_flags, int irq_base,
1664 const struct regmap_irq_chip *chip,
1665 struct regmap_irq_chip_data **data);
f8beab2b 1666void regmap_del_irq_chip(int irq, struct regmap_irq_chip_data *data);
045b9848
LD
1667
1668int devm_regmap_add_irq_chip(struct device *dev, struct regmap *map, int irq,
1669 int irq_flags, int irq_base,
1670 const struct regmap_irq_chip *chip,
1671 struct regmap_irq_chip_data **data);
5cc2013b
MW
1672int devm_regmap_add_irq_chip_fwnode(struct device *dev,
1673 struct fwnode_handle *fwnode,
1674 struct regmap *map, int irq,
1675 int irq_flags, int irq_base,
1676 const struct regmap_irq_chip *chip,
1677 struct regmap_irq_chip_data **data);
045b9848
LD
1678void devm_regmap_del_irq_chip(struct device *dev, int irq,
1679 struct regmap_irq_chip_data *data);
1680
209a6006 1681int regmap_irq_chip_get_base(struct regmap_irq_chip_data *data);
4af8be67 1682int regmap_irq_get_virq(struct regmap_irq_chip_data *data, int irq);
90f790d2 1683struct irq_domain *regmap_irq_get_domain(struct regmap_irq_chip_data *data);
92afb286 1684
9cde5fcd
MB
1685#else
1686
1687/*
1688 * These stubs should only ever be called by generic code which has
1689 * regmap based facilities, if they ever get called at runtime
1690 * something is going wrong and something probably needs to select
1691 * REGMAP.
1692 */
1693
1694static inline int regmap_write(struct regmap *map, unsigned int reg,
1695 unsigned int val)
1696{
1697 WARN_ONCE(1, "regmap API is disabled");
1698 return -EINVAL;
1699}
1700
915f441b
MB
1701static inline int regmap_write_async(struct regmap *map, unsigned int reg,
1702 unsigned int val)
1703{
1704 WARN_ONCE(1, "regmap API is disabled");
1705 return -EINVAL;
1706}
1707
9cde5fcd
MB
1708static inline int regmap_raw_write(struct regmap *map, unsigned int reg,
1709 const void *val, size_t val_len)
1710{
1711 WARN_ONCE(1, "regmap API is disabled");
1712 return -EINVAL;
1713}
1714
0d509f2b
MB
1715static inline int regmap_raw_write_async(struct regmap *map, unsigned int reg,
1716 const void *val, size_t val_len)
1717{
1718 WARN_ONCE(1, "regmap API is disabled");
1719 return -EINVAL;
1720}
1721
cdf6b11d
BW
1722static inline int regmap_noinc_write(struct regmap *map, unsigned int reg,
1723 const void *val, size_t val_len)
1724{
1725 WARN_ONCE(1, "regmap API is disabled");
1726 return -EINVAL;
1727}
1728
9cde5fcd
MB
1729static inline int regmap_bulk_write(struct regmap *map, unsigned int reg,
1730 const void *val, size_t val_count)
1731{
1732 WARN_ONCE(1, "regmap API is disabled");
1733 return -EINVAL;
1734}
1735
1736static inline int regmap_read(struct regmap *map, unsigned int reg,
1737 unsigned int *val)
1738{
1739 WARN_ONCE(1, "regmap API is disabled");
1740 return -EINVAL;
1741}
1742
70ee853e
RF
1743static inline int regmap_read_bypassed(struct regmap *map, unsigned int reg,
1744 unsigned int *val)
1745{
1746 WARN_ONCE(1, "regmap API is disabled");
1747 return -EINVAL;
1748}
1749
9cde5fcd
MB
1750static inline int regmap_raw_read(struct regmap *map, unsigned int reg,
1751 void *val, size_t val_len)
1752{
1753 WARN_ONCE(1, "regmap API is disabled");
1754 return -EINVAL;
1755}
1756
74fe7b55
LC
1757static inline int regmap_noinc_read(struct regmap *map, unsigned int reg,
1758 void *val, size_t val_len)
1759{
1760 WARN_ONCE(1, "regmap API is disabled");
1761 return -EINVAL;
1762}
1763
9cde5fcd
MB
1764static inline int regmap_bulk_read(struct regmap *map, unsigned int reg,
1765 void *val, size_t val_count)
1766{
1767 WARN_ONCE(1, "regmap API is disabled");
1768 return -EINVAL;
1769}
1770
91d31b9f
KM
1771static inline int regmap_update_bits_base(struct regmap *map, unsigned int reg,
1772 unsigned int mask, unsigned int val,
1773 bool *change, bool async, bool force)
fd4b7286
KM
1774{
1775 WARN_ONCE(1, "regmap API is disabled");
1776 return -EINVAL;
1777}
1778
aa2ff9db
BG
1779static inline int regmap_set_bits(struct regmap *map,
1780 unsigned int reg, unsigned int bits)
1781{
1782 WARN_ONCE(1, "regmap API is disabled");
1783 return -EINVAL;
1784}
1785
1786static inline int regmap_clear_bits(struct regmap *map,
1787 unsigned int reg, unsigned int bits)
1788{
1789 WARN_ONCE(1, "regmap API is disabled");
1790 return -EINVAL;
1791}
1792
1793static inline int regmap_test_bits(struct regmap *map,
1794 unsigned int reg, unsigned int bits)
1795{
1796 WARN_ONCE(1, "regmap API is disabled");
1797 return -EINVAL;
1798}
1799
28972eaa
KM
1800static inline int regmap_field_update_bits_base(struct regmap_field *field,
1801 unsigned int mask, unsigned int val,
1802 bool *change, bool async, bool force)
915f441b
MB
1803{
1804 WARN_ONCE(1, "regmap API is disabled");
1805 return -EINVAL;
1806}
1807
e126edec
KM
1808static inline int regmap_fields_update_bits_base(struct regmap_field *field,
1809 unsigned int id,
1810 unsigned int mask, unsigned int val,
1811 bool *change, bool async, bool force)
915f441b
MB
1812{
1813 WARN_ONCE(1, "regmap API is disabled");
1814 return -EINVAL;
1815}
1816
4b9e7edb
BG
1817static inline int regmap_update_bits(struct regmap *map, unsigned int reg,
1818 unsigned int mask, unsigned int val)
1819{
1820 WARN_ONCE(1, "regmap API is disabled");
1821 return -EINVAL;
1822}
1823
1824static inline int regmap_update_bits_async(struct regmap *map, unsigned int reg,
1825 unsigned int mask, unsigned int val)
1826{
1827 WARN_ONCE(1, "regmap API is disabled");
1828 return -EINVAL;
1829}
1830
1831static inline int regmap_update_bits_check(struct regmap *map, unsigned int reg,
1832 unsigned int mask, unsigned int val,
1833 bool *change)
1834{
1835 WARN_ONCE(1, "regmap API is disabled");
1836 return -EINVAL;
1837}
1838
1839static inline int
1840regmap_update_bits_check_async(struct regmap *map, unsigned int reg,
1841 unsigned int mask, unsigned int val,
1842 bool *change)
1843{
1844 WARN_ONCE(1, "regmap API is disabled");
1845 return -EINVAL;
1846}
1847
1848static inline int regmap_write_bits(struct regmap *map, unsigned int reg,
1849 unsigned int mask, unsigned int val)
1850{
1851 WARN_ONCE(1, "regmap API is disabled");
1852 return -EINVAL;
1853}
1854
1855static inline int regmap_field_write(struct regmap_field *field,
1856 unsigned int val)
1857{
1858 WARN_ONCE(1, "regmap API is disabled");
1859 return -EINVAL;
1860}
1861
1862static inline int regmap_field_force_write(struct regmap_field *field,
1863 unsigned int val)
1864{
1865 WARN_ONCE(1, "regmap API is disabled");
1866 return -EINVAL;
1867}
1868
1869static inline int regmap_field_update_bits(struct regmap_field *field,
1870 unsigned int mask, unsigned int val)
1871{
1872 WARN_ONCE(1, "regmap API is disabled");
1873 return -EINVAL;
1874}
1875
1876static inline int
1877regmap_field_force_update_bits(struct regmap_field *field,
1878 unsigned int mask, unsigned int val)
1879{
1880 WARN_ONCE(1, "regmap API is disabled");
1881 return -EINVAL;
1882}
1883
f67be8b7
LC
1884static inline int regmap_field_set_bits(struct regmap_field *field,
1885 unsigned int bits)
1886{
1887 WARN_ONCE(1, "regmap API is disabled");
1888 return -EINVAL;
1889}
1890
1891static inline int regmap_field_clear_bits(struct regmap_field *field,
1892 unsigned int bits)
1893{
1894 WARN_ONCE(1, "regmap API is disabled");
1895 return -EINVAL;
1896}
1897
1898static inline int regmap_field_test_bits(struct regmap_field *field,
1899 unsigned int bits)
1900{
1901 WARN_ONCE(1, "regmap API is disabled");
1902 return -EINVAL;
1903}
1904
4b9e7edb
BG
1905static inline int regmap_fields_write(struct regmap_field *field,
1906 unsigned int id, unsigned int val)
1907{
1908 WARN_ONCE(1, "regmap API is disabled");
1909 return -EINVAL;
1910}
1911
1912static inline int regmap_fields_force_write(struct regmap_field *field,
1913 unsigned int id, unsigned int val)
1914{
1915 WARN_ONCE(1, "regmap API is disabled");
1916 return -EINVAL;
1917}
1918
1919static inline int
1920regmap_fields_update_bits(struct regmap_field *field, unsigned int id,
1921 unsigned int mask, unsigned int val)
1922{
1923 WARN_ONCE(1, "regmap API is disabled");
1924 return -EINVAL;
1925}
1926
1927static inline int
1928regmap_fields_force_update_bits(struct regmap_field *field, unsigned int id,
1929 unsigned int mask, unsigned int val)
1930{
1931 WARN_ONCE(1, "regmap API is disabled");
1932 return -EINVAL;
1933}
1934
9cde5fcd
MB
1935static inline int regmap_get_val_bytes(struct regmap *map)
1936{
1937 WARN_ONCE(1, "regmap API is disabled");
1938 return -EINVAL;
1939}
1940
668abc72
SK
1941static inline int regmap_get_max_register(struct regmap *map)
1942{
1943 WARN_ONCE(1, "regmap API is disabled");
1944 return -EINVAL;
1945}
1946
a2f776cb
SK
1947static inline int regmap_get_reg_stride(struct regmap *map)
1948{
1949 WARN_ONCE(1, "regmap API is disabled");
1950 return -EINVAL;
1951}
1952
a6d99022
MW
1953static inline bool regmap_might_sleep(struct regmap *map)
1954{
1955 WARN_ONCE(1, "regmap API is disabled");
1956 return true;
1957}
1958
9cde5fcd
MB
1959static inline int regcache_sync(struct regmap *map)
1960{
1961 WARN_ONCE(1, "regmap API is disabled");
1962 return -EINVAL;
1963}
1964
a313f9f5
MB
1965static inline int regcache_sync_region(struct regmap *map, unsigned int min,
1966 unsigned int max)
1967{
1968 WARN_ONCE(1, "regmap API is disabled");
1969 return -EINVAL;
1970}
1971
697e85bc
MB
1972static inline int regcache_drop_region(struct regmap *map, unsigned int min,
1973 unsigned int max)
1974{
1975 WARN_ONCE(1, "regmap API is disabled");
1976 return -EINVAL;
1977}
1978
9cde5fcd
MB
1979static inline void regcache_cache_only(struct regmap *map, bool enable)
1980{
1981 WARN_ONCE(1, "regmap API is disabled");
1982}
1983
1984static inline void regcache_cache_bypass(struct regmap *map, bool enable)
1985{
1986 WARN_ONCE(1, "regmap API is disabled");
1987}
1988
1989static inline void regcache_mark_dirty(struct regmap *map)
1990{
1991 WARN_ONCE(1, "regmap API is disabled");
1992}
1993
0d509f2b
MB
1994static inline void regmap_async_complete(struct regmap *map)
1995{
1996 WARN_ONCE(1, "regmap API is disabled");
1997}
1998
9cde5fcd 1999static inline int regmap_register_patch(struct regmap *map,
a6baa3de 2000 const struct reg_sequence *regs,
9cde5fcd
MB
2001 int num_regs)
2002{
2003 WARN_ONCE(1, "regmap API is disabled");
2004 return -EINVAL;
2005}
2006
13ff50c8
NC
2007static inline int regmap_parse_val(struct regmap *map, const void *buf,
2008 unsigned int *val)
2009{
2010 WARN_ONCE(1, "regmap API is disabled");
2011 return -EINVAL;
2012}
2013
72b39f6f
MB
2014static inline struct regmap *dev_get_regmap(struct device *dev,
2015 const char *name)
2016{
72b39f6f
MB
2017 return NULL;
2018}
2019
8d7d3972
TT
2020static inline struct device *regmap_get_device(struct regmap *map)
2021{
2022 WARN_ONCE(1, "regmap API is disabled");
1d33dc6b 2023 return NULL;
8d7d3972
TT
2024}
2025
9cde5fcd
MB
2026#endif
2027
b83a313b 2028#endif