[thirdparty/kernel/linux.git] / scripts / Makefile.build

# ==========================================================================
# Building
# ==========================================================================

src := $(obj)

PHONY := __build
__build:

# Init all relevant variables used in kbuild files so
# 1) they have correct type
# 2) they do not inherit any value from the environment
obj-y :=
obj-m :=
lib-y :=
lib-m :=
always :=
targets :=
subdir-y :=
subdir-m :=
EXTRA_AFLAGS   :=
EXTRA_CFLAGS   :=
EXTRA_CPPFLAGS :=
EXTRA_LDFLAGS  :=

# Read .config if it exist, otherwise ignore
-include include/config/auto.conf

include scripts/Kbuild.include

# For backward compatibility check that these variables does not change
save-cflags := $(CFLAGS)

# The filename Kbuild has precedence over Makefile
kbuild-dir := $(if $(filter /%,$(src)),$(src),$(srctree)/$(src))
kbuild-file := $(if $(wildcard $(kbuild-dir)/Kbuild),$(kbuild-dir)/Kbuild,$(kbuild-dir)/Makefile)
include $(kbuild-file)

# If the save-* variables changed error out
ifeq ($(KBUILD_NOPEDANTIC),)
        ifneq ("$(save-cflags)","$(CFLAGS)")
                $(error CFLAGS was changed in "$(kbuild-file)". Fix it to use EXTRA_CFLAGS)
        endif
endif
include scripts/Makefile.lib

ifdef host-progs
ifneq ($(hostprogs-y),$(host-progs))
$(warning kbuild: $(obj)/Makefile - Usage of host-progs is deprecated. Please replace with hostprogs-y!)
hostprogs-y += $(host-progs)
endif
endif

# Do not include host rules unles needed
ifneq ($(hostprogs-y)$(hostprogs-m),)
include scripts/Makefile.host
endif

ifneq ($(KBUILD_SRC),)
# Create output directory if not already present
_dummy := $(shell [ -d $(obj) ] || mkdir -p $(obj))

# Create directories for object files if directory does not exist
# Needed when obj-y := dir/file.o syntax is used
_dummy := $(foreach d,$(obj-dirs), $(shell [ -d $(d) ] || mkdir -p $(d)))
endif

ifndef obj
$(warning kbuild: Makefile.build is included improperly)
endif

# ===========================================================================

ifneq ($(strip $(lib-y) $(lib-m) $(lib-n) $(lib-)),)
lib-target := $(obj)/lib.a
endif

ifneq ($(strip $(obj-y) $(obj-m) $(obj-n) $(obj-) $(lib-target)),)
builtin-target := $(obj)/built-in.o
endif

# We keep a list of all modules in $(MODVERDIR)

__build: $(if $(KBUILD_BUILTIN),$(builtin-target) $(lib-target) $(extra-y)) \
	 $(if $(KBUILD_MODULES),$(obj-m)) \
	 $(subdir-ym) $(always)
	@:

# Linus' kernel sanity checking tool
ifneq ($(KBUILD_CHECKSRC),0)
  ifeq ($(KBUILD_CHECKSRC),2)
    quiet_cmd_force_checksrc = CHECK   $<
          cmd_force_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
  else
      quiet_cmd_checksrc     = CHECK   $<
            cmd_checksrc     = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
  endif
endif


# Compile C sources (.c)
# ---------------------------------------------------------------------------

# Default is built-in, unless we know otherwise
modkern_cflags := $(CFLAGS_KERNEL)
quiet_modtag := $(empty)   $(empty)

$(real-objs-m)        : modkern_cflags := $(CFLAGS_MODULE)
$(real-objs-m:.o=.i)  : modkern_cflags := $(CFLAGS_MODULE)
$(real-objs-m:.o=.s)  : modkern_cflags := $(CFLAGS_MODULE)
$(real-objs-m:.o=.lst): modkern_cflags := $(CFLAGS_MODULE)

$(real-objs-m)        : quiet_modtag := [M]
$(real-objs-m:.o=.i)  : quiet_modtag := [M]
$(real-objs-m:.o=.s)  : quiet_modtag := [M]
$(real-objs-m:.o=.lst): quiet_modtag := [M]

$(obj-m)              : quiet_modtag := [M]

# Default for not multi-part modules
modname = $(basetarget)

$(multi-objs-m)         : modname = $(modname-multi)
$(multi-objs-m:.o=.i)   : modname = $(modname-multi)
$(multi-objs-m:.o=.s)   : modname = $(modname-multi)
$(multi-objs-m:.o=.lst) : modname = $(modname-multi)
$(multi-objs-y)         : modname = $(modname-multi)
$(multi-objs-y:.o=.i)   : modname = $(modname-multi)
$(multi-objs-y:.o=.s)   : modname = $(modname-multi)
$(multi-objs-y:.o=.lst) : modname = $(modname-multi)

quiet_cmd_cc_s_c = CC $(quiet_modtag)  $@
cmd_cc_s_c       = $(CC) $(c_flags) -fverbose-asm -S -o $@ $<

$(obj)/%.s: $(src)/%.c FORCE
	$(call if_changed_dep,cc_s_c)

quiet_cmd_cc_i_c = CPP $(quiet_modtag) $@
cmd_cc_i_c       = $(CPP) $(c_flags)   -o $@ $<

$(obj)/%.i: $(src)/%.c FORCE
	$(call if_changed_dep,cc_i_c)

quiet_cmd_cc_symtypes_c = SYM $(quiet_modtag) $@
cmd_cc_symtypes_c	   = \
		$(CPP) -D__GENKSYMS__ $(c_flags) $<			\
		| $(GENKSYMS) -T $@ >/dev/null;				\
		test -s $@ || rm -f $@

$(obj)/%.symtypes : $(src)/%.c FORCE
	$(call if_changed_dep,cc_symtypes_c)

# C (.c) files
# The C file is compiled and updated dependency information is generated.
# (See cmd_cc_o_c + relevant part of rule_cc_o_c)

quiet_cmd_cc_o_c = CC $(quiet_modtag)  $@

ifndef CONFIG_MODVERSIONS
cmd_cc_o_c = $(CC) $(c_flags) -c -o $@ $<

else
# When module versioning is enabled the following steps are executed:
# o compile a .tmp_<file>.o from <file>.c
# o if .tmp_<file>.o doesn't contain a __ksymtab version, i.e. does
#   not export symbols, we just rename .tmp_<file>.o to <file>.o and
#   are done.
# o otherwise, we calculate symbol versions using the good old
#   genksyms on the preprocessed source and postprocess them in a way
#   that they are usable as a linker script
# o generate <file>.o from .tmp_<file>.o using the linker to
#   replace the unresolved symbols __crc_exported_symbol with
#   the actual value of the checksum generated by genksyms

cmd_cc_o_c = $(CC) $(c_flags) -c -o $(@D)/.tmp_$(@F) $<
cmd_modversions =							\
	if $(OBJDUMP) -h $(@D)/.tmp_$(@F) | grep -q __ksymtab; then	\
		$(CPP) -D__GENKSYMS__ $(c_flags) $<			\
		| $(GENKSYMS) $(if $(KBUILD_SYMTYPES),			\
			      -T $(@D)/$(@F:.o=.symtypes)) -a $(ARCH)	\
		> $(@D)/.tmp_$(@F:.o=.ver);				\
									\
		$(LD) $(LDFLAGS) -r -o $@ $(@D)/.tmp_$(@F) 		\
			-T $(@D)/.tmp_$(@F:.o=.ver);			\
		rm -f $(@D)/.tmp_$(@F) $(@D)/.tmp_$(@F:.o=.ver);	\
	else								\
		mv -f $(@D)/.tmp_$(@F) $@;				\
	fi;
endif

define rule_cc_o_c
	$(call echo-cmd,checksrc) $(cmd_checksrc)			  \
	$(call echo-cmd,cc_o_c) $(cmd_cc_o_c);				  \
	$(cmd_modversions)						  \
	scripts/basic/fixdep $(depfile) $@ '$(call make-cmd,cc_o_c)' >    \
	                                              $(dot-target).tmp;  \
	rm -f $(depfile);						  \
	mv -f $(dot-target).tmp $(dot-target).cmd
endef

# Built-in and composite module parts
$(obj)/%.o: $(src)/%.c FORCE
	$(call cmd,force_checksrc)
	$(call if_changed_rule,cc_o_c)

# Single-part modules are special since we need to mark them in $(MODVERDIR)

$(single-used-m): $(obj)/%.o: $(src)/%.c FORCE
	$(call cmd,force_checksrc)
	$(call if_changed_rule,cc_o_c)
	@{ echo $(@:.o=.ko); echo $@; } > $(MODVERDIR)/$(@F:.o=.mod)

quiet_cmd_cc_lst_c = MKLST   $@
      cmd_cc_lst_c = $(CC) $(c_flags) -g -c -o $*.o $< && \
		     $(CONFIG_SHELL) $(srctree)/scripts/makelst $*.o \
				     System.map $(OBJDUMP) > $@

$(obj)/%.lst: $(src)/%.c FORCE
	$(call if_changed_dep,cc_lst_c)

# Compile assembler sources (.S)
# ---------------------------------------------------------------------------

modkern_aflags := $(AFLAGS_KERNEL)

$(real-objs-m)      : modkern_aflags := $(AFLAGS_MODULE)
$(real-objs-m:.o=.s): modkern_aflags := $(AFLAGS_MODULE)

quiet_cmd_as_s_S = CPP $(quiet_modtag) $@
cmd_as_s_S       = $(CPP) $(a_flags)   -o $@ $< 

$(obj)/%.s: $(src)/%.S FORCE
	$(call if_changed_dep,as_s_S)

quiet_cmd_as_o_S = AS $(quiet_modtag)  $@
cmd_as_o_S       = $(CC) $(a_flags) -c -o $@ $<

$(obj)/%.o: $(src)/%.S FORCE
	$(call if_changed_dep,as_o_S)

targets += $(real-objs-y) $(real-objs-m) $(lib-y)
targets += $(extra-y) $(MAKECMDGOALS) $(always)

# Linker scripts preprocessor (.lds.S -> .lds)
# ---------------------------------------------------------------------------
quiet_cmd_cpp_lds_S = LDS     $@
      cmd_cpp_lds_S = $(CPP) $(cpp_flags) -D__ASSEMBLY__ -o $@ $<

$(obj)/%.lds: $(src)/%.lds.S FORCE
	$(call if_changed_dep,cpp_lds_S)

# Build the compiled-in targets
# ---------------------------------------------------------------------------

# To build objects in subdirs, we need to descend into the directories
$(sort $(subdir-obj-y)): $(subdir-ym) ;

#
# Rule to compile a set of .o files into one .o file
#
ifdef builtin-target
quiet_cmd_link_o_target = LD      $@
# If the list of objects to link is empty, just create an empty built-in.o
cmd_link_o_target = $(if $(strip $(obj-y)),\
		      $(LD) $(ld_flags) -r -o $@ $(filter $(obj-y), $^),\
		      rm -f $@; $(AR) rcs $@)

$(builtin-target): $(obj-y) FORCE
	$(call if_changed,link_o_target)

targets += $(builtin-target)
endif # builtin-target

#
# Rule to compile a set of .o files into one .a file
#
ifdef lib-target
quiet_cmd_link_l_target = AR      $@
cmd_link_l_target = rm -f $@; $(AR) rcs $@ $(lib-y)

$(lib-target): $(lib-y) FORCE
	$(call if_changed,link_l_target)

targets += $(lib-target)
endif

#
# Rule to link composite objects
#
#  Composite objects are specified in kbuild makefile as follows:
#    <composite-object>-objs := <list of .o files>
#  or
#    <composite-object>-y    := <list of .o files>
link_multi_deps =                     \
$(filter $(addprefix $(obj)/,         \
$($(subst $(obj)/,,$(@:.o=-objs)))    \
$($(subst $(obj)/,,$(@:.o=-y)))), $^)
 
quiet_cmd_link_multi-y = LD      $@
cmd_link_multi-y = $(LD) $(ld_flags) -r -o $@ $(link_multi_deps)

quiet_cmd_link_multi-m = LD [M]  $@
cmd_link_multi-m = $(cmd_link_multi-y)

# We would rather have a list of rules like
# 	foo.o: $(foo-objs)
# but that's not so easy, so we rather make all composite objects depend
# on the set of all their parts
$(multi-used-y) : %.o: $(multi-objs-y) FORCE
	$(call if_changed,link_multi-y)

$(multi-used-m) : %.o: $(multi-objs-m) FORCE
	$(call if_changed,link_multi-m)
	@{ echo $(@:.o=.ko); echo $(link_multi_deps); } > $(MODVERDIR)/$(@F:.o=.mod)

targets += $(multi-used-y) $(multi-used-m)


# Descending
# ---------------------------------------------------------------------------

PHONY += $(subdir-ym)
$(subdir-ym):
	$(Q)$(MAKE) $(build)=$@

# Add FORCE to the prequisites of a target to force it to be always rebuilt.
# ---------------------------------------------------------------------------

PHONY += FORCE

FORCE:

# Read all saved command lines and dependencies for the $(targets) we
# may be building above, using $(if_changed{,_dep}). As an
# optimization, we don't need to read them if the target does not
# exist, we will rebuild anyway in that case.

targets := $(wildcard $(sort $(targets)))
cmd_files := $(wildcard $(foreach f,$(targets),$(dir $(f)).$(notdir $(f)).cmd))

ifneq ($(cmd_files),)
  include $(cmd_files)
endif


# Declare the contents of the .PHONY variable as phony.  We keep that
# information in a variable se we can use it in if_changed and friends.

.PHONY: $(PHONY)
Commit	Line	Data
1da177e4 LT	1	# ==========================================================================
	2	# Building
	3	# ==========================================================================
	4
	5	src := $(obj)
	6
4f193362	7	PHONY := __build
1da177e4 LT	8	__build:
1da177e4 LT	9
d72e5edb SR	10	# Init all relevant variables used in kbuild files so
	11	# 1) they have correct type
	12	# 2) they do not inherit any value from the environment
	13	obj-y :=
	14	obj-m :=
	15	lib-y :=
	16	lib-m :=
	17	always :=
	18	targets :=
	19	subdir-y :=
	20	subdir-m :=
	21	EXTRA_AFLAGS :=
	22	EXTRA_CFLAGS :=
	23	EXTRA_CPPFLAGS :=
	24	EXTRA_LDFLAGS :=
	25
1da177e4	26	# Read .config if it exist, otherwise ignore
c955ccaf	27	-include include/config/auto.conf
1da177e4	28
20a468b5 SR	29	include scripts/Kbuild.include
20a468b5 SR	30
0c53c8e6 SR	31	# For backward compatibility check that these variables does not change
	32	save-cflags := $(CFLAGS)
	33
2a691470	34	# The filename Kbuild has precedence over Makefile
db8c1a7b	35	kbuild-dir := $(if $(filter /%,$(src)),$(src),$(srctree)/$(src))
0c53c8e6 SR	36	kbuild-file := $(if $(wildcard $(kbuild-dir)/Kbuild),$(kbuild-dir)/Kbuild,$(kbuild-dir)/Makefile)
	37	include $(kbuild-file)
	38
	39	# If the save-* variables changed error out
	40	ifeq ($(KBUILD_NOPEDANTIC),)
	41	ifneq ("$(save-cflags)","$(CFLAGS)")
	42	$(error CFLAGS was changed in "$(kbuild-file)". Fix it to use EXTRA_CFLAGS)
	43	endif
	44	endif
1da177e4 LT	45	include scripts/Makefile.lib
	46
	47	ifdef host-progs
	48	ifneq ($(hostprogs-y),$(host-progs))
	49	$(warning kbuild: $(obj)/Makefile - Usage of host-progs is deprecated. Please replace with hostprogs-y!)
	50	hostprogs-y += $(host-progs)
	51	endif
	52	endif
	53
	54	# Do not include host rules unles needed
	55	ifneq ($(hostprogs-y)$(hostprogs-m),)
	56	include scripts/Makefile.host
	57	endif
	58
	59	ifneq ($(KBUILD_SRC),)
	60	# Create output directory if not already present
	61	_dummy := $(shell [ -d $(obj) ] \|\| mkdir -p $(obj))
	62
	63	# Create directories for object files if directory does not exist
	64	# Needed when obj-y := dir/file.o syntax is used
	65	_dummy := $(foreach d,$(obj-dirs), $(shell [ -d $(d) ] \|\| mkdir -p $(d)))
	66	endif
	67
1da177e4 LT	68	ifndef obj
	69	$(warning kbuild: Makefile.build is included improperly)
	70	endif
	71
	72	# ===========================================================================
	73
	74	ifneq ($(strip $(lib-y) $(lib-m) $(lib-n) $(lib-)),)
	75	lib-target := $(obj)/lib.a
	76	endif
	77
	78	ifneq ($(strip $(obj-y) $(obj-m) $(obj-n) $(obj-) $(lib-target)),)
	79	builtin-target := $(obj)/built-in.o
	80	endif
	81
	82	# We keep a list of all modules in $(MODVERDIR)
	83
	84	__build: $(if $(KBUILD_BUILTIN),$(builtin-target) $(lib-target) $(extra-y)) \
	85	$(if $(KBUILD_MODULES),$(obj-m)) \
	86	$(subdir-ym) $(always)
	87	@:
	88
	89	# Linus' kernel sanity checking tool
	90	ifneq ($(KBUILD_CHECKSRC),0)
	91	ifeq ($(KBUILD_CHECKSRC),2)
	92	quiet_cmd_force_checksrc = CHECK $<
	93	cmd_force_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
	94	else
	95	quiet_cmd_checksrc = CHECK $<
	96	cmd_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
	97	endif
	98	endif
	99
	100
	101	# Compile C sources (.c)
	102	# ---------------------------------------------------------------------------
	103
	104	# Default is built-in, unless we know otherwise
	105	modkern_cflags := $(CFLAGS_KERNEL)
	106	quiet_modtag := $(empty) $(empty)
	107
	108	$(real-objs-m) : modkern_cflags := $(CFLAGS_MODULE)
	109	$(real-objs-m:.o=.i) : modkern_cflags := $(CFLAGS_MODULE)
	110	$(real-objs-m:.o=.s) : modkern_cflags := $(CFLAGS_MODULE)
	111	$(real-objs-m:.o=.lst): modkern_cflags := $(CFLAGS_MODULE)
	112
	113	$(real-objs-m) : quiet_modtag := [M]
	114	$(real-objs-m:.o=.i) : quiet_modtag := [M]
	115	$(real-objs-m:.o=.s) : quiet_modtag := [M]
	116	$(real-objs-m:.o=.lst): quiet_modtag := [M]
	117
	118	$(obj-m) : quiet_modtag := [M]
	119
	120	# Default for not multi-part modules
5e8d780d	121	modname = $(basetarget)
1da177e4 LT	122
	123	$(multi-objs-m) : modname = $(modname-multi)
	124	$(multi-objs-m:.o=.i) : modname = $(modname-multi)
	125	$(multi-objs-m:.o=.s) : modname = $(modname-multi)
	126	$(multi-objs-m:.o=.lst) : modname = $(modname-multi)
	127	$(multi-objs-y) : modname = $(modname-multi)
	128	$(multi-objs-y:.o=.i) : modname = $(modname-multi)
	129	$(multi-objs-y:.o=.s) : modname = $(modname-multi)
	130	$(multi-objs-y:.o=.lst) : modname = $(modname-multi)
	131
	132	quiet_cmd_cc_s_c = CC $(quiet_modtag) $@
7d185983	133	cmd_cc_s_c = $(CC) $(c_flags) -fverbose-asm -S -o $@ $<
1da177e4	134
767e581d	135	$(obj)/%.s: $(src)/%.c FORCE
1da177e4 LT	136	$(call if_changed_dep,cc_s_c)
	137
	138	quiet_cmd_cc_i_c = CPP $(quiet_modtag) $@
	139	cmd_cc_i_c = $(CPP) $(c_flags) -o $@ $<
	140
767e581d	141	$(obj)/%.i: $(src)/%.c FORCE
1da177e4 LT	142	$(call if_changed_dep,cc_i_c)
1da177e4 LT	143
15fde675 AG	144	quiet_cmd_cc_symtypes_c = SYM $(quiet_modtag) $@
	145	cmd_cc_symtypes_c = \
	146	$(CPP) -D__GENKSYMS__ $(c_flags) $< \
	147	\| $(GENKSYMS) -T $@ >/dev/null; \
	148	test -s $@ \|\| rm -f $@
	149
767e581d	150	$(obj)/%.symtypes : $(src)/%.c FORCE
15fde675 AG	151	$(call if_changed_dep,cc_symtypes_c)
15fde675 AG	152
1da177e4 LT	153	# C (.c) files
	154	# The C file is compiled and updated dependency information is generated.
	155	# (See cmd_cc_o_c + relevant part of rule_cc_o_c)
	156
	157	quiet_cmd_cc_o_c = CC $(quiet_modtag) $@
	158
	159	ifndef CONFIG_MODVERSIONS
	160	cmd_cc_o_c = $(CC) $(c_flags) -c -o $@ $<
	161
	162	else
	163	# When module versioning is enabled the following steps are executed:
	164	# o compile a .tmp_<file>.o from <file>.c
	165	# o if .tmp_<file>.o doesn't contain a __ksymtab version, i.e. does
	166	# not export symbols, we just rename .tmp_<file>.o to <file>.o and
	167	# are done.
	168	# o otherwise, we calculate symbol versions using the good old
	169	# genksyms on the preprocessed source and postprocess them in a way
	170	# that they are usable as a linker script
	171	# o generate <file>.o from .tmp_<file>.o using the linker to
	172	# replace the unresolved symbols __crc_exported_symbol with
	173	# the actual value of the checksum generated by genksyms
	174
	175	cmd_cc_o_c = $(CC) $(c_flags) -c -o $(@D)/.tmp_$(@F) $<
	176	cmd_modversions = \
	177	if $(OBJDUMP) -h $(@D)/.tmp_$(@F) \| grep -q __ksymtab; then \
	178	$(CPP) -D__GENKSYMS__ $(c_flags) $< \
15fde675 AG	179	\| $(GENKSYMS) $(if $(KBUILD_SYMTYPES), \
15fde675 AG	180	-T $(@D)/$(@F:.o=.symtypes)) -a $(ARCH) \
1da177e4 LT	181	> $(@D)/.tmp_$(@F:.o=.ver); \
	182	\
	183	$(LD) $(LDFLAGS) -r -o $@ $(@D)/.tmp_$(@F) \
	184	-T $(@D)/.tmp_$(@F:.o=.ver); \
	185	rm -f $(@D)/.tmp_$(@F) $(@D)/.tmp_$(@F:.o=.ver); \
	186	else \
cfca82f2	187	mv -f $(@D)/.tmp_$(@F) $@; \
1da177e4 LT	188	fi;
	189	endif
	190
	191	define rule_cc_o_c
6176aa9a JB	192	$(call echo-cmd,checksrc) $(cmd_checksrc) \
6176aa9a JB	193	$(call echo-cmd,cc_o_c) $(cmd_cc_o_c); \
1da177e4	194	$(cmd_modversions) \
48f1f058 SR	195	scripts/basic/fixdep $(depfile) $@ '$(call make-cmd,cc_o_c)' > \
48f1f058 SR	196	$(dot-target).tmp; \
1da177e4	197	rm -f $(depfile); \
48f1f058	198	mv -f $(dot-target).tmp $(dot-target).cmd
1da177e4 LT	199	endef
	200
	201	# Built-in and composite module parts
767e581d	202	$(obj)/%.o: $(src)/%.c FORCE
1da177e4 LT	203	$(call cmd,force_checksrc)
	204	$(call if_changed_rule,cc_o_c)
	205
	206	# Single-part modules are special since we need to mark them in $(MODVERDIR)
	207
767e581d	208	$(single-used-m): $(obj)/%.o: $(src)/%.c FORCE
1da177e4 LT	209	$(call cmd,force_checksrc)
	210	$(call if_changed_rule,cc_o_c)
	211	@{ echo $(@:.o=.ko); echo $@; } > $(MODVERDIR)/$(@F:.o=.mod)
	212
	213	quiet_cmd_cc_lst_c = MKLST $@
	214	cmd_cc_lst_c = $(CC) $(c_flags) -g -c -o $*.o $< && \
	215	$(CONFIG_SHELL) $(srctree)/scripts/makelst $*.o \
	216	System.map $(OBJDUMP) > $@
	217
767e581d	218	$(obj)/%.lst: $(src)/%.c FORCE
1da177e4 LT	219	$(call if_changed_dep,cc_lst_c)
	220
	221	# Compile assembler sources (.S)
	222	# ---------------------------------------------------------------------------
	223
	224	modkern_aflags := $(AFLAGS_KERNEL)
	225
	226	$(real-objs-m) : modkern_aflags := $(AFLAGS_MODULE)
	227	$(real-objs-m:.o=.s): modkern_aflags := $(AFLAGS_MODULE)
	228
	229	quiet_cmd_as_s_S = CPP $(quiet_modtag) $@
	230	cmd_as_s_S = $(CPP) $(a_flags) -o $@ $<
	231
767e581d	232	$(obj)/%.s: $(src)/%.S FORCE
1da177e4 LT	233	$(call if_changed_dep,as_s_S)
	234
	235	quiet_cmd_as_o_S = AS $(quiet_modtag) $@
	236	cmd_as_o_S = $(CC) $(a_flags) -c -o $@ $<
	237
767e581d	238	$(obj)/%.o: $(src)/%.S FORCE
1da177e4 LT	239	$(call if_changed_dep,as_o_S)
	240
	241	targets += $(real-objs-y) $(real-objs-m) $(lib-y)
	242	targets += $(extra-y) $(MAKECMDGOALS) $(always)
	243
	244	# Linker scripts preprocessor (.lds.S -> .lds)
	245	# ---------------------------------------------------------------------------
	246	quiet_cmd_cpp_lds_S = LDS $@
	247	cmd_cpp_lds_S = $(CPP) $(cpp_flags) -D__ASSEMBLY__ -o $@ $<
	248
767e581d	249	$(obj)/%.lds: $(src)/%.lds.S FORCE
1da177e4 LT	250	$(call if_changed_dep,cpp_lds_S)
	251
	252	# Build the compiled-in targets
	253	# ---------------------------------------------------------------------------
	254
	255	# To build objects in subdirs, we need to descend into the directories
	256	$(sort $(subdir-obj-y)): $(subdir-ym) ;
	257
	258	#
	259	# Rule to compile a set of .o files into one .o file
	260	#
	261	ifdef builtin-target
	262	quiet_cmd_link_o_target = LD $@
	263	# If the list of objects to link is empty, just create an empty built-in.o
	264	cmd_link_o_target = $(if $(strip $(obj-y)),\
	265	$(LD) $(ld_flags) -r -o $@ $(filter $(obj-y), $^),\
	266	rm -f $@; $(AR) rcs $@)
	267
	268	$(builtin-target): $(obj-y) FORCE
	269	$(call if_changed,link_o_target)
	270
	271	targets += $(builtin-target)
	272	endif # builtin-target
	273
	274	#
	275	# Rule to compile a set of .o files into one .a file
	276	#
	277	ifdef lib-target
	278	quiet_cmd_link_l_target = AR $@
5e54d5e5	279	cmd_link_l_target = rm -f $@; $(AR) rcs $@ $(lib-y)
1da177e4 LT	280
	281	$(lib-target): $(lib-y) FORCE
	282	$(call if_changed,link_l_target)
	283
	284	targets += $(lib-target)
	285	endif
	286
	287	#
	288	# Rule to link composite objects
	289	#
	290	# Composite objects are specified in kbuild makefile as follows:
	291	# <composite-object>-objs := <list of .o files>
	292	# or
	293	# <composite-object>-y := <list of .o files>
	294	link_multi_deps = \
	295	$(filter $(addprefix $(obj)/, \
	296	$($(subst $(obj)/,,$(@:.o=-objs))) \
	297	$($(subst $(obj)/,,$(@:.o=-y)))), $^)
	298
	299	quiet_cmd_link_multi-y = LD $@
	300	cmd_link_multi-y = $(LD) $(ld_flags) -r -o $@ $(link_multi_deps)
	301
	302	quiet_cmd_link_multi-m = LD [M] $@
114f5157	303	cmd_link_multi-m = $(cmd_link_multi-y)
1da177e4 LT	304
	305	# We would rather have a list of rules like
	306	# foo.o: $(foo-objs)
	307	# but that's not so easy, so we rather make all composite objects depend
	308	# on the set of all their parts
	309	$(multi-used-y) : %.o: $(multi-objs-y) FORCE
	310	$(call if_changed,link_multi-y)
	311
	312	$(multi-used-m) : %.o: $(multi-objs-m) FORCE
	313	$(call if_changed,link_multi-m)
	314	@{ echo $(@:.o=.ko); echo $(link_multi_deps); } > $(MODVERDIR)/$(@F:.o=.mod)
	315
	316	targets += $(multi-used-y) $(multi-used-m)
	317
	318
	319	# Descending
	320	# ---------------------------------------------------------------------------
	321
4f193362	322	PHONY += $(subdir-ym)
1da177e4 LT	323	$(subdir-ym):
	324	$(Q)$(MAKE) $(build)=$@
	325
	326	# Add FORCE to the prequisites of a target to force it to be always rebuilt.
	327	# ---------------------------------------------------------------------------
	328
4f193362	329	PHONY += FORCE
1da177e4 LT	330
	331	FORCE:
	332
	333	# Read all saved command lines and dependencies for the $(targets) we
	334	# may be building above, using $(if_changed{,_dep}). As an
	335	# optimization, we don't need to read them if the target does not
	336	# exist, we will rebuild anyway in that case.
	337
	338	targets := $(wildcard $(sort $(targets)))
	339	cmd_files := $(wildcard $(foreach f,$(targets),$(dir $(f)).$(notdir $(f)).cmd))
	340
	341	ifneq ($(cmd_files),)
	342	include $(cmd_files)
	343	endif
4f193362 PS	344
	345
	346	# Declare the contents of the .PHONY variable as phony. We keep that
	347	# information in a variable se we can use it in if_changed and friends.
	348
	349	.PHONY: $(PHONY)