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Commit | Line | Data |
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37554d48 SL |
1 | From faf9b1cbbc6a7f67a102be827a55e6789deb7553 Mon Sep 17 00:00:00 2001 |
2 | From: Kishon Vijay Abraham I <kishon@ti.com> | |
3 | Date: Mon, 25 Mar 2019 15:09:45 +0530 | |
4 | Subject: PCI: designware-ep: Use aligned ATU window for raising MSI interrupts | |
5 | ||
6 | [ Upstream commit 6b7330303a8186fb211357e6d379237fe9d2ece1 ] | |
7 | ||
8 | Certain platforms like K2G reguires the outbound ATU window to be | |
9 | aligned. The alignment size is already present in mem->page_size. | |
10 | Use the alignment size present in mem->page_size to configure an | |
11 | aligned ATU window. In order to raise an interrupt, CPU has to write | |
12 | to address offset from the start of the window unlike before where | |
13 | writes were always to the beginning of the ATU window. | |
14 | ||
15 | Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> | |
16 | Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> | |
17 | Signed-off-by: Sasha Levin <sashal@kernel.org> | |
18 | --- | |
19 | drivers/pci/controller/dwc/pcie-designware-ep.c | 7 +++++-- | |
20 | 1 file changed, 5 insertions(+), 2 deletions(-) | |
21 | ||
22 | diff --git a/drivers/pci/controller/dwc/pcie-designware-ep.c b/drivers/pci/controller/dwc/pcie-designware-ep.c | |
23 | index de8635af4cde..739d97080d3b 100644 | |
24 | --- a/drivers/pci/controller/dwc/pcie-designware-ep.c | |
25 | +++ b/drivers/pci/controller/dwc/pcie-designware-ep.c | |
26 | @@ -385,6 +385,7 @@ int dw_pcie_ep_raise_msi_irq(struct dw_pcie_ep *ep, u8 func_no, | |
27 | { | |
28 | struct dw_pcie *pci = to_dw_pcie_from_ep(ep); | |
29 | struct pci_epc *epc = ep->epc; | |
30 | + unsigned int aligned_offset; | |
31 | u16 msg_ctrl, msg_data; | |
32 | u32 msg_addr_lower, msg_addr_upper, reg; | |
33 | u64 msg_addr; | |
34 | @@ -410,13 +411,15 @@ int dw_pcie_ep_raise_msi_irq(struct dw_pcie_ep *ep, u8 func_no, | |
35 | reg = ep->msi_cap + PCI_MSI_DATA_32; | |
36 | msg_data = dw_pcie_readw_dbi(pci, reg); | |
37 | } | |
38 | - msg_addr = ((u64) msg_addr_upper) << 32 | msg_addr_lower; | |
39 | + aligned_offset = msg_addr_lower & (epc->mem->page_size - 1); | |
40 | + msg_addr = ((u64)msg_addr_upper) << 32 | | |
41 | + (msg_addr_lower & ~aligned_offset); | |
42 | ret = dw_pcie_ep_map_addr(epc, func_no, ep->msi_mem_phys, msg_addr, | |
43 | epc->mem->page_size); | |
44 | if (ret) | |
45 | return ret; | |
46 | ||
47 | - writel(msg_data | (interrupt_num - 1), ep->msi_mem); | |
48 | + writel(msg_data | (interrupt_num - 1), ep->msi_mem + aligned_offset); | |
49 | ||
50 | dw_pcie_ep_unmap_addr(epc, func_no, ep->msi_mem_phys); | |
51 | ||
52 | -- | |
53 | 2.20.1 | |
54 |