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[thirdparty/kernel/stable-queue.git] / releases / 4.19.51 / arm-dts-imx6qdl-specify-imx6qdl_clk_ipg-as-ipg-clock.patch
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1From 9ab0c828c495d6d625ce63acb151810ac4bd49a7 Mon Sep 17 00:00:00 2001
2From: Andrey Smirnov <andrew.smirnov@gmail.com>
3Date: Thu, 28 Mar 2019 23:49:16 -0700
4Subject: ARM: dts: imx6qdl: Specify IMX6QDL_CLK_IPG as "ipg" clock to SDMA
5
6[ Upstream commit b14c872eebc501b9640b04f4a152df51d6eaf2fc ]
7
8Since 25aaa75df1e6 SDMA driver uses clock rates of "ipg" and "ahb"
9clock to determine if it needs to configure the IP block as operating
10at 1:1 or 1:2 clock ratio (ACR bit in SDMAARM_CONFIG). Specifying both
11clocks as IMX6QDL_CLK_SDMA results in driver incorrectly thinking that
12ratio is 1:1 which results in broken SDMA funtionality(this at least
13breaks RAVE SP serdev driver on RDU2). Fix the code to specify
14IMX6QDL_CLK_IPG as "ipg" clock for SDMA, to avoid detecting incorrect
15clock ratio.
16
17Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
18Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
19Cc: Angus Ainslie (Purism) <angus@akkea.ca>
20Cc: Chris Healy <cphealy@gmail.com>
21Cc: Lucas Stach <l.stach@pengutronix.de>
22Cc: Fabio Estevam <fabio.estevam@nxp.com>
23Cc: Shawn Guo <shawnguo@kernel.org>
24Cc: linux-arm-kernel@lists.infradead.org
25Cc: linux-kernel@vger.kernel.org
26Tested-by: Adam Ford <aford173@gmail.com>
27Signed-off-by: Shawn Guo <shawnguo@kernel.org>
28Signed-off-by: Sasha Levin <sashal@kernel.org>
29---
30 arch/arm/boot/dts/imx6qdl.dtsi | 2 +-
31 1 file changed, 1 insertion(+), 1 deletion(-)
32
33diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi
34index 61d2d26afbf4..00d44a60972f 100644
35--- a/arch/arm/boot/dts/imx6qdl.dtsi
36+++ b/arch/arm/boot/dts/imx6qdl.dtsi
37@@ -905,7 +905,7 @@
38 compatible = "fsl,imx6q-sdma", "fsl,imx35-sdma";
39 reg = <0x020ec000 0x4000>;
40 interrupts = <0 2 IRQ_TYPE_LEVEL_HIGH>;
41- clocks = <&clks IMX6QDL_CLK_SDMA>,
42+ clocks = <&clks IMX6QDL_CLK_IPG>,
43 <&clks IMX6QDL_CLK_SDMA>;
44 clock-names = "ipg", "ahb";
45 #dma-cells = <3>;
46--
472.20.1
48