projects / thirdparty / kernel / stable-queue.git / blame
| Commit | Line | Data |
|---|---|---|
| 37554d48 SL |
1 | From ee05823d6ced8878e7e91c5ca82c0f4eeb96aec6 Mon Sep 17 00:00:00 2001 |
| 2 | From: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> | |
| 3 | Date: Thu, 14 Mar 2019 13:46:44 -0400 | |
| 4 | Subject: drm/amd/display: Use plane->color_space for dpp if specified | |
| 5 | ||
| 6 | [ Upstream commit a1e07ba89d49581471d64c48152dbe03b42bd025 ] | |
| 7 | ||
| 8 | [Why] | |
| 9 | The input color space for the plane was previously ignored even if it | |
| 10 | was set. | |
| 11 | ||
| 12 | If a limited range YUV format was given to DC then the | |
| 13 | wrong color transformation matrix was being used since DC assumed that | |
| 14 | it was full range instead. | |
| 15 | ||
| 16 | [How] | |
| 17 | Respect the given color_space format for the plane if it isn't | |
| 18 | COLOR_SPACE_UNKNOWN. Otherwise, use the implicit default since DM | |
| 19 | didn't specify. | |
| 20 | ||
| 21 | Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> | |
| 22 | Reviewed-by: Sun peng Li <Sunpeng.Li@amd.com> | |
| 23 | Acked-by: Aric Cyr <Aric.Cyr@amd.com> | |
| 24 | Acked-by: Leo Li <sunpeng.li@amd.com> | |
| 25 | Signed-off-by: Alex Deucher <alexander.deucher@amd.com> | |
| 26 | Signed-off-by: Sasha Levin <sashal@kernel.org> | |
| 27 | --- | |
| 28 | drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.c | 6 +++++- | |
| 29 | drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c | 2 +- | |
| 30 | 2 files changed, 6 insertions(+), 2 deletions(-) | |
| 31 | ||
| 32 | diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.c | |
| 33 | index bf8b68f8db4f..bce5741f2952 100644 | |
| 34 | --- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.c | |
| 35 | +++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.c | |
| 36 | @@ -388,6 +388,10 @@ void dpp1_cnv_setup ( | |
| 37 | default: | |
| 38 | break; | |
| 39 | } | |
| 40 | + | |
| 41 | + /* Set default color space based on format if none is given. */ | |
| 42 | + color_space = input_color_space ? input_color_space : color_space; | |
| 43 | + | |
| 44 | REG_SET(CNVC_SURFACE_PIXEL_FORMAT, 0, | |
| 45 | CNVC_SURFACE_PIXEL_FORMAT, pixel_format); | |
| 46 | REG_UPDATE(FORMAT_CONTROL, FORMAT_CONTROL__ALPHA_EN, alpha_en); | |
| 47 | @@ -399,7 +403,7 @@ void dpp1_cnv_setup ( | |
| 48 | for (i = 0; i < 12; i++) | |
| 49 | tbl_entry.regval[i] = input_csc_color_matrix.matrix[i]; | |
| 50 | ||
| 51 | - tbl_entry.color_space = input_color_space; | |
| 52 | + tbl_entry.color_space = color_space; | |
| 53 | ||
| 54 | if (color_space >= COLOR_SPACE_YCBCR601) | |
| 55 | select = INPUT_CSC_SELECT_ICSC; | |
| 56 | diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c | |
| 57 | index a0355709abd1..7736ef123e9b 100644 | |
| 58 | --- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c | |
| 59 | +++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c | |
| 60 | @@ -1890,7 +1890,7 @@ static void update_dpp(struct dpp *dpp, struct dc_plane_state *plane_state) | |
| 61 | plane_state->format, | |
| 62 | EXPANSION_MODE_ZERO, | |
| 63 | plane_state->input_csc_color_matrix, | |
| 64 | - COLOR_SPACE_YCBCR601_LIMITED); | |
| 65 | + plane_state->color_space); | |
| 66 | ||
| 67 | //set scale and bias registers | |
| 68 | build_prescale_params(&bns_params, plane_state); | |
| 69 | -- | |
| 70 | 2.20.1 | |
| 71 |