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37554d48 SL |
1 | From 64cffee13379c02c1e0f90f30dda7a5b7d9c6606 Mon Sep 17 00:00:00 2001 |
2 | From: Douglas Anderson <dianders@chromium.org> | |
3 | Date: Tue, 9 Apr 2019 13:49:05 -0700 | |
4 | Subject: soc: rockchip: Set the proper PWM for rk3288 | |
5 | ||
6 | [ Upstream commit bbdc00a7de24cc90315b1775fb74841373fe12f7 ] | |
7 | ||
8 | The rk3288 SoC has two PWM implementations available, the "old" | |
9 | implementation and the "new" one. You can switch between the two of | |
10 | them by flipping a bit in the grf. | |
11 | ||
12 | The "old" implementation is the default at chip power up but isn't the | |
13 | one that's officially supposed to be used. ...and, in fact, the | |
14 | driver that gets selected in Linux using the rk3288 device tree only | |
15 | supports the "new" implementation. | |
16 | ||
17 | Long ago I tried to get a switch to the right IP block landed in the | |
18 | PWM driver (search for "rk3288: Switch to use the proper PWM IP") but | |
19 | that got rejected. In the mean time the grf has grown a full-fledged | |
20 | driver that already sets other random bits like this. That means we | |
21 | can now get the fix landed. | |
22 | ||
23 | For those wondering how things could have possibly worked for the last | |
24 | 4.5 years, folks have mostly been relying on the bootloader to set | |
25 | this bit. ...but occasionally folks have pointed back to my old patch | |
26 | series [1] in downstream kernels. | |
27 | ||
28 | [1] https://www.mail-archive.com/linux-kernel@vger.kernel.org/msg1391597.html | |
29 | ||
30 | Signed-off-by: Douglas Anderson <dianders@chromium.org> | |
31 | Signed-off-by: Heiko Stuebner <heiko@sntech.de> | |
32 | Signed-off-by: Sasha Levin <sashal@kernel.org> | |
33 | --- | |
34 | drivers/soc/rockchip/grf.c | 2 ++ | |
35 | 1 file changed, 2 insertions(+) | |
36 | ||
37 | diff --git a/drivers/soc/rockchip/grf.c b/drivers/soc/rockchip/grf.c | |
38 | index 96882ffde67e..3b81e1d75a97 100644 | |
39 | --- a/drivers/soc/rockchip/grf.c | |
40 | +++ b/drivers/soc/rockchip/grf.c | |
41 | @@ -66,9 +66,11 @@ static const struct rockchip_grf_info rk3228_grf __initconst = { | |
42 | }; | |
43 | ||
44 | #define RK3288_GRF_SOC_CON0 0x244 | |
45 | +#define RK3288_GRF_SOC_CON2 0x24c | |
46 | ||
47 | static const struct rockchip_grf_value rk3288_defaults[] __initconst = { | |
48 | { "jtag switching", RK3288_GRF_SOC_CON0, HIWORD_UPDATE(0, 1, 12) }, | |
49 | + { "pwm select", RK3288_GRF_SOC_CON2, HIWORD_UPDATE(1, 1, 0) }, | |
50 | }; | |
51 | ||
52 | static const struct rockchip_grf_info rk3288_grf __initconst = { | |
53 | -- | |
54 | 2.20.1 | |
55 |