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[thirdparty/kernel/stable.git] / arch / x86 / xen / mmu_pv.c
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1// SPDX-License-Identifier: GPL-2.0
2
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3/*
4 * Xen mmu operations
5 *
6 * This file contains the various mmu fetch and update operations.
7 * The most important job they must perform is the mapping between the
8 * domain's pfn and the overall machine mfns.
9 *
10 * Xen allows guests to directly update the pagetable, in a controlled
11 * fashion. In other words, the guest modifies the same pagetable
12 * that the CPU actually uses, which eliminates the overhead of having
13 * a separate shadow pagetable.
14 *
15 * In order to allow this, it falls on the guest domain to map its
16 * notion of a "physical" pfn - which is just a domain-local linear
17 * address - into a real "machine address" which the CPU's MMU can
18 * use.
19 *
20 * A pgd_t/pmd_t/pte_t will typically contain an mfn, and so can be
21 * inserted directly into the pagetable. When creating a new
22 * pte/pmd/pgd, it converts the passed pfn into an mfn. Conversely,
23 * when reading the content back with __(pgd|pmd|pte)_val, it converts
24 * the mfn back into a pfn.
25 *
26 * The other constraint is that all pages which make up a pagetable
27 * must be mapped read-only in the guest. This prevents uncontrolled
28 * guest updates to the pagetable. Xen strictly enforces this, and
29 * will disallow any pagetable update which will end up mapping a
30 * pagetable page RW, and will disallow using any writable page as a
31 * pagetable.
32 *
33 * Naively, when loading %cr3 with the base of a new pagetable, Xen
34 * would need to validate the whole pagetable before going on.
35 * Naturally, this is quite slow. The solution is to "pin" a
36 * pagetable, which enforces all the constraints on the pagetable even
37 * when it is not actively in use. This menas that Xen can be assured
38 * that it is still valid when you do load it into %cr3, and doesn't
39 * need to revalidate it.
40 *
41 * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
42 */
43#include <linux/sched/mm.h>
44#include <linux/highmem.h>
45#include <linux/debugfs.h>
46#include <linux/bug.h>
47#include <linux/vmalloc.h>
48#include <linux/export.h>
49#include <linux/init.h>
50#include <linux/gfp.h>
51#include <linux/memblock.h>
52#include <linux/seq_file.h>
53#include <linux/crash_dump.h>
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54#ifdef CONFIG_KEXEC_CORE
55#include <linux/kexec.h>
56#endif
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57
58#include <trace/events/xen.h>
59
60#include <asm/pgtable.h>
61#include <asm/tlbflush.h>
62#include <asm/fixmap.h>
63#include <asm/mmu_context.h>
64#include <asm/setup.h>
65#include <asm/paravirt.h>
66#include <asm/e820/api.h>
67#include <asm/linkage.h>
68#include <asm/page.h>
69#include <asm/init.h>
70#include <asm/pat.h>
71#include <asm/smp.h>
48a8b97c 72#include <asm/tlb.h>
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73
74#include <asm/xen/hypercall.h>
75#include <asm/xen/hypervisor.h>
76
77#include <xen/xen.h>
78#include <xen/page.h>
79#include <xen/interface/xen.h>
80#include <xen/interface/hvm/hvm_op.h>
81#include <xen/interface/version.h>
82#include <xen/interface/memory.h>
83#include <xen/hvc-console.h>
84
85#include "multicalls.h"
86#include "mmu.h"
87#include "debugfs.h"
88
89#ifdef CONFIG_X86_32
90/*
91 * Identity map, in addition to plain kernel map. This needs to be
92 * large enough to allocate page table pages to allocate the rest.
93 * Each page can map 2MB.
94 */
95#define LEVEL1_IDENT_ENTRIES (PTRS_PER_PTE * 4)
96static RESERVE_BRK_ARRAY(pte_t, level1_ident_pgt, LEVEL1_IDENT_ENTRIES);
97#endif
98#ifdef CONFIG_X86_64
99/* l3 pud for userspace vsyscall mapping */
100static pud_t level3_user_vsyscall[PTRS_PER_PUD] __page_aligned_bss;
101#endif /* CONFIG_X86_64 */
102
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103/*
104 * Protects atomic reservation decrease/increase against concurrent increases.
105 * Also protects non-atomic updates of current_pages and balloon lists.
106 */
4f2d7af7 107static DEFINE_SPINLOCK(xen_reservation_lock);
f030aade 108
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109/*
110 * Note about cr3 (pagetable base) values:
111 *
112 * xen_cr3 contains the current logical cr3 value; it contains the
113 * last set cr3. This may not be the current effective cr3, because
114 * its update may be being lazily deferred. However, a vcpu looking
115 * at its own cr3 can use this value knowing that it everything will
116 * be self-consistent.
117 *
118 * xen_current_cr3 contains the actual vcpu cr3; it is set once the
119 * hypercall to set the vcpu cr3 is complete (so it may be a little
120 * out of date, but it will never be set early). If one vcpu is
121 * looking at another vcpu's cr3 value, it should use this variable.
122 */
123DEFINE_PER_CPU(unsigned long, xen_cr3); /* cr3 stored as physaddr */
124DEFINE_PER_CPU(unsigned long, xen_current_cr3); /* actual vcpu cr3 */
125
126static phys_addr_t xen_pt_base, xen_pt_size __initdata;
127
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128static DEFINE_STATIC_KEY_FALSE(xen_struct_pages_ready);
129
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130/*
131 * Just beyond the highest usermode address. STACK_TOP_MAX has a
132 * redzone above it, so round it up to a PGD boundary.
133 */
134#define USER_LIMIT ((STACK_TOP_MAX + PGDIR_SIZE - 1) & PGDIR_MASK)
135
136void make_lowmem_page_readonly(void *vaddr)
137{
138 pte_t *pte, ptev;
139 unsigned long address = (unsigned long)vaddr;
140 unsigned int level;
141
142 pte = lookup_address(address, &level);
143 if (pte == NULL)
144 return; /* vaddr missing */
145
146 ptev = pte_wrprotect(*pte);
147
148 if (HYPERVISOR_update_va_mapping(address, ptev, 0))
149 BUG();
150}
151
152void make_lowmem_page_readwrite(void *vaddr)
153{
154 pte_t *pte, ptev;
155 unsigned long address = (unsigned long)vaddr;
156 unsigned int level;
157
158 pte = lookup_address(address, &level);
159 if (pte == NULL)
160 return; /* vaddr missing */
161
162 ptev = pte_mkwrite(*pte);
163
164 if (HYPERVISOR_update_va_mapping(address, ptev, 0))
165 BUG();
166}
167
168
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169/*
170 * During early boot all page table pages are pinned, but we do not have struct
171 * pages, so return true until struct pages are ready.
172 */
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173static bool xen_page_pinned(void *ptr)
174{
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175 if (static_branch_likely(&xen_struct_pages_ready)) {
176 struct page *page = virt_to_page(ptr);
7e0563de 177
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178 return PagePinned(page);
179 }
180 return true;
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181}
182
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183static void xen_extend_mmu_update(const struct mmu_update *update)
184{
185 struct multicall_space mcs;
186 struct mmu_update *u;
187
188 mcs = xen_mc_extend_args(__HYPERVISOR_mmu_update, sizeof(*u));
189
190 if (mcs.mc != NULL) {
191 mcs.mc->args[1]++;
192 } else {
193 mcs = __xen_mc_entry(sizeof(*u));
194 MULTI_mmu_update(mcs.mc, mcs.args, 1, NULL, DOMID_SELF);
195 }
196
197 u = mcs.args;
198 *u = *update;
199}
200
201static void xen_extend_mmuext_op(const struct mmuext_op *op)
202{
203 struct multicall_space mcs;
204 struct mmuext_op *u;
205
206 mcs = xen_mc_extend_args(__HYPERVISOR_mmuext_op, sizeof(*u));
207
208 if (mcs.mc != NULL) {
209 mcs.mc->args[1]++;
210 } else {
211 mcs = __xen_mc_entry(sizeof(*u));
212 MULTI_mmuext_op(mcs.mc, mcs.args, 1, NULL, DOMID_SELF);
213 }
214
215 u = mcs.args;
216 *u = *op;
217}
218
219static void xen_set_pmd_hyper(pmd_t *ptr, pmd_t val)
220{
221 struct mmu_update u;
222
223 preempt_disable();
224
225 xen_mc_batch();
226
227 /* ptr may be ioremapped for 64-bit pagetable setup */
228 u.ptr = arbitrary_virt_to_machine(ptr).maddr;
229 u.val = pmd_val_ma(val);
230 xen_extend_mmu_update(&u);
231
232 xen_mc_issue(PARAVIRT_LAZY_MMU);
233
234 preempt_enable();
235}
236
237static void xen_set_pmd(pmd_t *ptr, pmd_t val)
238{
239 trace_xen_mmu_set_pmd(ptr, val);
240
241 /* If page is not pinned, we can just update the entry
242 directly */
243 if (!xen_page_pinned(ptr)) {
244 *ptr = val;
245 return;
246 }
247
248 xen_set_pmd_hyper(ptr, val);
249}
250
251/*
252 * Associate a virtual page frame with a given physical page frame
253 * and protection flags for that frame.
254 */
255void set_pte_mfn(unsigned long vaddr, unsigned long mfn, pgprot_t flags)
256{
257 set_pte_vaddr(vaddr, mfn_pte(mfn, flags));
258}
259
260static bool xen_batched_set_pte(pte_t *ptep, pte_t pteval)
261{
262 struct mmu_update u;
263
264 if (paravirt_get_lazy_mode() != PARAVIRT_LAZY_MMU)
265 return false;
266
267 xen_mc_batch();
268
269 u.ptr = virt_to_machine(ptep).maddr | MMU_NORMAL_PT_UPDATE;
270 u.val = pte_val_ma(pteval);
271 xen_extend_mmu_update(&u);
272
273 xen_mc_issue(PARAVIRT_LAZY_MMU);
274
275 return true;
276}
277
278static inline void __xen_set_pte(pte_t *ptep, pte_t pteval)
279{
280 if (!xen_batched_set_pte(ptep, pteval)) {
281 /*
282 * Could call native_set_pte() here and trap and
283 * emulate the PTE write but with 32-bit guests this
284 * needs two traps (one for each of the two 32-bit
285 * words in the PTE) so do one hypercall directly
286 * instead.
287 */
288 struct mmu_update u;
289
290 u.ptr = virt_to_machine(ptep).maddr | MMU_NORMAL_PT_UPDATE;
291 u.val = pte_val_ma(pteval);
292 HYPERVISOR_mmu_update(&u, 1, NULL, DOMID_SELF);
293 }
294}
295
296static void xen_set_pte(pte_t *ptep, pte_t pteval)
297{
298 trace_xen_mmu_set_pte(ptep, pteval);
299 __xen_set_pte(ptep, pteval);
300}
301
302static void xen_set_pte_at(struct mm_struct *mm, unsigned long addr,
303 pte_t *ptep, pte_t pteval)
304{
305 trace_xen_mmu_set_pte_at(mm, addr, ptep, pteval);
306 __xen_set_pte(ptep, pteval);
307}
308
309pte_t xen_ptep_modify_prot_start(struct mm_struct *mm,
310 unsigned long addr, pte_t *ptep)
311{
312 /* Just return the pte as-is. We preserve the bits on commit */
313 trace_xen_mmu_ptep_modify_prot_start(mm, addr, ptep, *ptep);
314 return *ptep;
315}
316
317void xen_ptep_modify_prot_commit(struct mm_struct *mm, unsigned long addr,
318 pte_t *ptep, pte_t pte)
319{
320 struct mmu_update u;
321
322 trace_xen_mmu_ptep_modify_prot_commit(mm, addr, ptep, pte);
323 xen_mc_batch();
324
325 u.ptr = virt_to_machine(ptep).maddr | MMU_PT_UPDATE_PRESERVE_AD;
326 u.val = pte_val_ma(pte);
327 xen_extend_mmu_update(&u);
328
329 xen_mc_issue(PARAVIRT_LAZY_MMU);
330}
331
332/* Assume pteval_t is equivalent to all the other *val_t types. */
333static pteval_t pte_mfn_to_pfn(pteval_t val)
334{
335 if (val & _PAGE_PRESENT) {
6f0e8bf1 336 unsigned long mfn = (val & XEN_PTE_MFN_MASK) >> PAGE_SHIFT;
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337 unsigned long pfn = mfn_to_pfn(mfn);
338
339 pteval_t flags = val & PTE_FLAGS_MASK;
340 if (unlikely(pfn == ~0))
341 val = flags & ~_PAGE_PRESENT;
342 else
343 val = ((pteval_t)pfn << PAGE_SHIFT) | flags;
344 }
345
346 return val;
347}
348
349static pteval_t pte_pfn_to_mfn(pteval_t val)
350{
351 if (val & _PAGE_PRESENT) {
352 unsigned long pfn = (val & PTE_PFN_MASK) >> PAGE_SHIFT;
353 pteval_t flags = val & PTE_FLAGS_MASK;
354 unsigned long mfn;
355
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356 mfn = __pfn_to_mfn(pfn);
357
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358 /*
359 * If there's no mfn for the pfn, then just create an
360 * empty non-present pte. Unfortunately this loses
361 * information about the original pfn, so
362 * pte_mfn_to_pfn is asymmetric.
363 */
364 if (unlikely(mfn == INVALID_P2M_ENTRY)) {
365 mfn = 0;
366 flags = 0;
367 } else
368 mfn &= ~(FOREIGN_FRAME_BIT | IDENTITY_FRAME_BIT);
369 val = ((pteval_t)mfn << PAGE_SHIFT) | flags;
370 }
371
372 return val;
373}
374
375__visible pteval_t xen_pte_val(pte_t pte)
376{
377 pteval_t pteval = pte.pte;
378
379 return pte_mfn_to_pfn(pteval);
380}
381PV_CALLEE_SAVE_REGS_THUNK(xen_pte_val);
382
383__visible pgdval_t xen_pgd_val(pgd_t pgd)
384{
385 return pte_mfn_to_pfn(pgd.pgd);
386}
387PV_CALLEE_SAVE_REGS_THUNK(xen_pgd_val);
388
389__visible pte_t xen_make_pte(pteval_t pte)
390{
391 pte = pte_pfn_to_mfn(pte);
392
393 return native_make_pte(pte);
394}
395PV_CALLEE_SAVE_REGS_THUNK(xen_make_pte);
396
397__visible pgd_t xen_make_pgd(pgdval_t pgd)
398{
399 pgd = pte_pfn_to_mfn(pgd);
400 return native_make_pgd(pgd);
401}
402PV_CALLEE_SAVE_REGS_THUNK(xen_make_pgd);
403
404__visible pmdval_t xen_pmd_val(pmd_t pmd)
405{
406 return pte_mfn_to_pfn(pmd.pmd);
407}
408PV_CALLEE_SAVE_REGS_THUNK(xen_pmd_val);
409
410static void xen_set_pud_hyper(pud_t *ptr, pud_t val)
411{
412 struct mmu_update u;
413
414 preempt_disable();
415
416 xen_mc_batch();
417
418 /* ptr may be ioremapped for 64-bit pagetable setup */
419 u.ptr = arbitrary_virt_to_machine(ptr).maddr;
420 u.val = pud_val_ma(val);
421 xen_extend_mmu_update(&u);
422
423 xen_mc_issue(PARAVIRT_LAZY_MMU);
424
425 preempt_enable();
426}
427
428static void xen_set_pud(pud_t *ptr, pud_t val)
429{
430 trace_xen_mmu_set_pud(ptr, val);
431
432 /* If page is not pinned, we can just update the entry
433 directly */
434 if (!xen_page_pinned(ptr)) {
435 *ptr = val;
436 return;
437 }
438
439 xen_set_pud_hyper(ptr, val);
440}
441
442#ifdef CONFIG_X86_PAE
443static void xen_set_pte_atomic(pte_t *ptep, pte_t pte)
444{
445 trace_xen_mmu_set_pte_atomic(ptep, pte);
f7c90c2a 446 __xen_set_pte(ptep, pte);
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447}
448
449static void xen_pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
450{
451 trace_xen_mmu_pte_clear(mm, addr, ptep);
f7c90c2a 452 __xen_set_pte(ptep, native_make_pte(0));
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453}
454
455static void xen_pmd_clear(pmd_t *pmdp)
456{
457 trace_xen_mmu_pmd_clear(pmdp);
458 set_pmd(pmdp, __pmd(0));
459}
460#endif /* CONFIG_X86_PAE */
461
462__visible pmd_t xen_make_pmd(pmdval_t pmd)
463{
464 pmd = pte_pfn_to_mfn(pmd);
465 return native_make_pmd(pmd);
466}
467PV_CALLEE_SAVE_REGS_THUNK(xen_make_pmd);
468
773dd2fc 469#ifdef CONFIG_X86_64
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470__visible pudval_t xen_pud_val(pud_t pud)
471{
472 return pte_mfn_to_pfn(pud.pud);
473}
474PV_CALLEE_SAVE_REGS_THUNK(xen_pud_val);
475
476__visible pud_t xen_make_pud(pudval_t pud)
477{
478 pud = pte_pfn_to_mfn(pud);
479
480 return native_make_pud(pud);
481}
482PV_CALLEE_SAVE_REGS_THUNK(xen_make_pud);
483
484static pgd_t *xen_get_user_pgd(pgd_t *pgd)
485{
486 pgd_t *pgd_page = (pgd_t *)(((unsigned long)pgd) & PAGE_MASK);
487 unsigned offset = pgd - pgd_page;
488 pgd_t *user_ptr = NULL;
489
490 if (offset < pgd_index(USER_LIMIT)) {
491 struct page *page = virt_to_page(pgd_page);
492 user_ptr = (pgd_t *)page->private;
493 if (user_ptr)
494 user_ptr += offset;
495 }
496
497 return user_ptr;
498}
499
500static void __xen_set_p4d_hyper(p4d_t *ptr, p4d_t val)
501{
502 struct mmu_update u;
503
504 u.ptr = virt_to_machine(ptr).maddr;
505 u.val = p4d_val_ma(val);
506 xen_extend_mmu_update(&u);
507}
508
509/*
510 * Raw hypercall-based set_p4d, intended for in early boot before
511 * there's a page structure. This implies:
512 * 1. The only existing pagetable is the kernel's
513 * 2. It is always pinned
514 * 3. It has no user pagetable attached to it
515 */
516static void __init xen_set_p4d_hyper(p4d_t *ptr, p4d_t val)
517{
518 preempt_disable();
519
520 xen_mc_batch();
521
522 __xen_set_p4d_hyper(ptr, val);
523
524 xen_mc_issue(PARAVIRT_LAZY_MMU);
525
526 preempt_enable();
527}
528
529static void xen_set_p4d(p4d_t *ptr, p4d_t val)
530{
531 pgd_t *user_ptr = xen_get_user_pgd((pgd_t *)ptr);
532 pgd_t pgd_val;
533
534 trace_xen_mmu_set_p4d(ptr, (p4d_t *)user_ptr, val);
535
536 /* If page is not pinned, we can just update the entry
537 directly */
538 if (!xen_page_pinned(ptr)) {
539 *ptr = val;
540 if (user_ptr) {
541 WARN_ON(xen_page_pinned(user_ptr));
542 pgd_val.pgd = p4d_val_ma(val);
543 *user_ptr = pgd_val;
544 }
545 return;
546 }
547
548 /* If it's pinned, then we can at least batch the kernel and
549 user updates together. */
550 xen_mc_batch();
551
552 __xen_set_p4d_hyper(ptr, val);
553 if (user_ptr)
554 __xen_set_p4d_hyper((p4d_t *)user_ptr, val);
555
556 xen_mc_issue(PARAVIRT_LAZY_MMU);
557}
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558
559#if CONFIG_PGTABLE_LEVELS >= 5
560__visible p4dval_t xen_p4d_val(p4d_t p4d)
561{
562 return pte_mfn_to_pfn(p4d.p4d);
563}
564PV_CALLEE_SAVE_REGS_THUNK(xen_p4d_val);
565
566__visible p4d_t xen_make_p4d(p4dval_t p4d)
567{
568 p4d = pte_pfn_to_mfn(p4d);
569
570 return native_make_p4d(p4d);
571}
572PV_CALLEE_SAVE_REGS_THUNK(xen_make_p4d);
573#endif /* CONFIG_PGTABLE_LEVELS >= 5 */
773dd2fc 574#endif /* CONFIG_X86_64 */
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575
576static int xen_pmd_walk(struct mm_struct *mm, pmd_t *pmd,
577 int (*func)(struct mm_struct *mm, struct page *, enum pt_level),
578 bool last, unsigned long limit)
579{
580 int i, nr, flush = 0;
581
582 nr = last ? pmd_index(limit) + 1 : PTRS_PER_PMD;
583 for (i = 0; i < nr; i++) {
584 if (!pmd_none(pmd[i]))
585 flush |= (*func)(mm, pmd_page(pmd[i]), PT_PTE);
586 }
587 return flush;
588}
589
590static int xen_pud_walk(struct mm_struct *mm, pud_t *pud,
591 int (*func)(struct mm_struct *mm, struct page *, enum pt_level),
592 bool last, unsigned long limit)
593{
594 int i, nr, flush = 0;
595
596 nr = last ? pud_index(limit) + 1 : PTRS_PER_PUD;
597 for (i = 0; i < nr; i++) {
598 pmd_t *pmd;
599
600 if (pud_none(pud[i]))
601 continue;
602
603 pmd = pmd_offset(&pud[i], 0);
604 if (PTRS_PER_PMD > 1)
605 flush |= (*func)(mm, virt_to_page(pmd), PT_PMD);
606 flush |= xen_pmd_walk(mm, pmd, func,
607 last && i == nr - 1, limit);
608 }
609 return flush;
610}
611
612static int xen_p4d_walk(struct mm_struct *mm, p4d_t *p4d,
613 int (*func)(struct mm_struct *mm, struct page *, enum pt_level),
614 bool last, unsigned long limit)
615{
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616 int flush = 0;
617 pud_t *pud;
7e0563de 618
7e0563de 619
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620 if (p4d_none(*p4d))
621 return flush;
7e0563de 622
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623 pud = pud_offset(p4d, 0);
624 if (PTRS_PER_PUD > 1)
625 flush |= (*func)(mm, virt_to_page(pud), PT_PUD);
626 flush |= xen_pud_walk(mm, pud, func, last, limit);
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627 return flush;
628}
629
630/*
631 * (Yet another) pagetable walker. This one is intended for pinning a
632 * pagetable. This means that it walks a pagetable and calls the
633 * callback function on each page it finds making up the page table,
634 * at every level. It walks the entire pagetable, but it only bothers
635 * pinning pte pages which are below limit. In the normal case this
636 * will be STACK_TOP_MAX, but at boot we need to pin up to
637 * FIXADDR_TOP.
638 *
639 * For 32-bit the important bit is that we don't pin beyond there,
640 * because then we start getting into Xen's ptes.
641 *
642 * For 64-bit, we must skip the Xen hole in the middle of the address
643 * space, just after the big x86-64 virtual hole.
644 */
645static int __xen_pgd_walk(struct mm_struct *mm, pgd_t *pgd,
646 int (*func)(struct mm_struct *mm, struct page *,
647 enum pt_level),
648 unsigned long limit)
649{
650 int i, nr, flush = 0;
651 unsigned hole_low, hole_high;
652
653 /* The limit is the last byte to be touched */
654 limit--;
655 BUG_ON(limit >= FIXADDR_TOP);
656
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657 /*
658 * 64-bit has a great big hole in the middle of the address
659 * space, which contains the Xen mappings. On 32-bit these
660 * will end up making a zero-sized hole and so is a no-op.
661 */
662 hole_low = pgd_index(USER_LIMIT);
663 hole_high = pgd_index(PAGE_OFFSET);
664
665 nr = pgd_index(limit) + 1;
666 for (i = 0; i < nr; i++) {
667 p4d_t *p4d;
668
669 if (i >= hole_low && i < hole_high)
670 continue;
671
672 if (pgd_none(pgd[i]))
673 continue;
674
675 p4d = p4d_offset(&pgd[i], 0);
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676 flush |= xen_p4d_walk(mm, p4d, func, i == nr - 1, limit);
677 }
678
679 /* Do the top level last, so that the callbacks can use it as
680 a cue to do final things like tlb flushes. */
681 flush |= (*func)(mm, virt_to_page(pgd), PT_PGD);
682
683 return flush;
684}
685
686static int xen_pgd_walk(struct mm_struct *mm,
687 int (*func)(struct mm_struct *mm, struct page *,
688 enum pt_level),
689 unsigned long limit)
690{
691 return __xen_pgd_walk(mm, mm->pgd, func, limit);
692}
693
694/* If we're using split pte locks, then take the page's lock and
695 return a pointer to it. Otherwise return NULL. */
696static spinlock_t *xen_pte_lock(struct page *page, struct mm_struct *mm)
697{
698 spinlock_t *ptl = NULL;
699
700#if USE_SPLIT_PTE_PTLOCKS
701 ptl = ptlock_ptr(page);
702 spin_lock_nest_lock(ptl, &mm->page_table_lock);
703#endif
704
705 return ptl;
706}
707
708static void xen_pte_unlock(void *v)
709{
710 spinlock_t *ptl = v;
711 spin_unlock(ptl);
712}
713
714static void xen_do_pin(unsigned level, unsigned long pfn)
715{
716 struct mmuext_op op;
717
718 op.cmd = level;
719 op.arg1.mfn = pfn_to_mfn(pfn);
720
721 xen_extend_mmuext_op(&op);
722}
723
724static int xen_pin_page(struct mm_struct *mm, struct page *page,
725 enum pt_level level)
726{
727 unsigned pgfl = TestSetPagePinned(page);
728 int flush;
729
730 if (pgfl)
731 flush = 0; /* already pinned */
732 else if (PageHighMem(page))
733 /* kmaps need flushing if we found an unpinned
734 highpage */
735 flush = 1;
736 else {
737 void *pt = lowmem_page_address(page);
738 unsigned long pfn = page_to_pfn(page);
739 struct multicall_space mcs = __xen_mc_entry(0);
740 spinlock_t *ptl;
741
742 flush = 0;
743
744 /*
745 * We need to hold the pagetable lock between the time
746 * we make the pagetable RO and when we actually pin
747 * it. If we don't, then other users may come in and
748 * attempt to update the pagetable by writing it,
749 * which will fail because the memory is RO but not
750 * pinned, so Xen won't do the trap'n'emulate.
751 *
752 * If we're using split pte locks, we can't hold the
753 * entire pagetable's worth of locks during the
754 * traverse, because we may wrap the preempt count (8
755 * bits). The solution is to mark RO and pin each PTE
756 * page while holding the lock. This means the number
757 * of locks we end up holding is never more than a
758 * batch size (~32 entries, at present).
759 *
760 * If we're not using split pte locks, we needn't pin
761 * the PTE pages independently, because we're
762 * protected by the overall pagetable lock.
763 */
764 ptl = NULL;
765 if (level == PT_PTE)
766 ptl = xen_pte_lock(page, mm);
767
768 MULTI_update_va_mapping(mcs.mc, (unsigned long)pt,
769 pfn_pte(pfn, PAGE_KERNEL_RO),
770 level == PT_PGD ? UVMF_TLB_FLUSH : 0);
771
772 if (ptl) {
773 xen_do_pin(MMUEXT_PIN_L1_TABLE, pfn);
774
775 /* Queue a deferred unlock for when this batch
776 is completed. */
777 xen_mc_callback(xen_pte_unlock, ptl);
778 }
779 }
780
781 return flush;
782}
783
784/* This is called just after a mm has been created, but it has not
785 been used yet. We need to make sure that its pagetable is all
786 read-only, and can be pinned. */
787static void __xen_pgd_pin(struct mm_struct *mm, pgd_t *pgd)
788{
789 trace_xen_mmu_pgd_pin(mm, pgd);
790
791 xen_mc_batch();
792
793 if (__xen_pgd_walk(mm, pgd, xen_pin_page, USER_LIMIT)) {
794 /* re-enable interrupts for flushing */
795 xen_mc_issue(0);
796
797 kmap_flush_unused();
798
799 xen_mc_batch();
800 }
801
802#ifdef CONFIG_X86_64
803 {
804 pgd_t *user_pgd = xen_get_user_pgd(pgd);
805
806 xen_do_pin(MMUEXT_PIN_L4_TABLE, PFN_DOWN(__pa(pgd)));
807
808 if (user_pgd) {
809 xen_pin_page(mm, virt_to_page(user_pgd), PT_PGD);
810 xen_do_pin(MMUEXT_PIN_L4_TABLE,
811 PFN_DOWN(__pa(user_pgd)));
812 }
813 }
814#else /* CONFIG_X86_32 */
815#ifdef CONFIG_X86_PAE
816 /* Need to make sure unshared kernel PMD is pinnable */
817 xen_pin_page(mm, pgd_page(pgd[pgd_index(TASK_SIZE)]),
818 PT_PMD);
819#endif
820 xen_do_pin(MMUEXT_PIN_L3_TABLE, PFN_DOWN(__pa(pgd)));
821#endif /* CONFIG_X86_64 */
822 xen_mc_issue(0);
823}
824
825static void xen_pgd_pin(struct mm_struct *mm)
826{
827 __xen_pgd_pin(mm, mm->pgd);
828}
829
830/*
831 * On save, we need to pin all pagetables to make sure they get their
832 * mfns turned into pfns. Search the list for any unpinned pgds and pin
833 * them (unpinned pgds are not currently in use, probably because the
834 * process is under construction or destruction).
835 *
836 * Expected to be called in stop_machine() ("equivalent to taking
837 * every spinlock in the system"), so the locking doesn't really
838 * matter all that much.
839 */
840void xen_mm_pin_all(void)
841{
842 struct page *page;
843
844 spin_lock(&pgd_lock);
845
846 list_for_each_entry(page, &pgd_list, lru) {
847 if (!PagePinned(page)) {
848 __xen_pgd_pin(&init_mm, (pgd_t *)page_address(page));
849 SetPageSavePinned(page);
850 }
851 }
852
853 spin_unlock(&pgd_lock);
854}
855
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856static int __init xen_mark_pinned(struct mm_struct *mm, struct page *page,
857 enum pt_level level)
858{
859 SetPagePinned(page);
860 return 0;
861}
862
6f84f8d1
PT
863/*
864 * The init_mm pagetable is really pinned as soon as its created, but
865 * that's before we have page structures to store the bits. So do all
866 * the book-keeping now once struct pages for allocated pages are
c6ffc5ca 867 * initialized. This happens only after memblock_free_all() is called.
6f84f8d1
PT
868 */
869static void __init xen_after_bootmem(void)
7e0563de 870{
6f84f8d1
PT
871 static_branch_enable(&xen_struct_pages_ready);
872#ifdef CONFIG_X86_64
873 SetPagePinned(virt_to_page(level3_user_vsyscall));
874#endif
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875 xen_pgd_walk(&init_mm, xen_mark_pinned, FIXADDR_TOP);
876}
877
878static int xen_unpin_page(struct mm_struct *mm, struct page *page,
879 enum pt_level level)
880{
881 unsigned pgfl = TestClearPagePinned(page);
882
883 if (pgfl && !PageHighMem(page)) {
884 void *pt = lowmem_page_address(page);
885 unsigned long pfn = page_to_pfn(page);
886 spinlock_t *ptl = NULL;
887 struct multicall_space mcs;
888
889 /*
890 * Do the converse to pin_page. If we're using split
891 * pte locks, we must be holding the lock for while
892 * the pte page is unpinned but still RO to prevent
893 * concurrent updates from seeing it in this
894 * partially-pinned state.
895 */
896 if (level == PT_PTE) {
897 ptl = xen_pte_lock(page, mm);
898
899 if (ptl)
900 xen_do_pin(MMUEXT_UNPIN_TABLE, pfn);
901 }
902
903 mcs = __xen_mc_entry(0);
904
905 MULTI_update_va_mapping(mcs.mc, (unsigned long)pt,
906 pfn_pte(pfn, PAGE_KERNEL),
907 level == PT_PGD ? UVMF_TLB_FLUSH : 0);
908
909 if (ptl) {
910 /* unlock when batch completed */
911 xen_mc_callback(xen_pte_unlock, ptl);
912 }
913 }
914
915 return 0; /* never need to flush on unpin */
916}
917
918/* Release a pagetables pages back as normal RW */
919static void __xen_pgd_unpin(struct mm_struct *mm, pgd_t *pgd)
920{
921 trace_xen_mmu_pgd_unpin(mm, pgd);
922
923 xen_mc_batch();
924
925 xen_do_pin(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
926
927#ifdef CONFIG_X86_64
928 {
929 pgd_t *user_pgd = xen_get_user_pgd(pgd);
930
931 if (user_pgd) {
932 xen_do_pin(MMUEXT_UNPIN_TABLE,
933 PFN_DOWN(__pa(user_pgd)));
934 xen_unpin_page(mm, virt_to_page(user_pgd), PT_PGD);
935 }
936 }
937#endif
938
939#ifdef CONFIG_X86_PAE
940 /* Need to make sure unshared kernel PMD is unpinned */
941 xen_unpin_page(mm, pgd_page(pgd[pgd_index(TASK_SIZE)]),
942 PT_PMD);
943#endif
944
945 __xen_pgd_walk(mm, pgd, xen_unpin_page, USER_LIMIT);
946
947 xen_mc_issue(0);
948}
949
950static void xen_pgd_unpin(struct mm_struct *mm)
951{
952 __xen_pgd_unpin(mm, mm->pgd);
953}
954
955/*
956 * On resume, undo any pinning done at save, so that the rest of the
957 * kernel doesn't see any unexpected pinned pagetables.
958 */
959void xen_mm_unpin_all(void)
960{
961 struct page *page;
962
963 spin_lock(&pgd_lock);
964
965 list_for_each_entry(page, &pgd_list, lru) {
966 if (PageSavePinned(page)) {
967 BUG_ON(!PagePinned(page));
968 __xen_pgd_unpin(&init_mm, (pgd_t *)page_address(page));
969 ClearPageSavePinned(page);
970 }
971 }
972
973 spin_unlock(&pgd_lock);
974}
975
976static void xen_activate_mm(struct mm_struct *prev, struct mm_struct *next)
977{
978 spin_lock(&next->page_table_lock);
979 xen_pgd_pin(next);
980 spin_unlock(&next->page_table_lock);
981}
982
983static void xen_dup_mmap(struct mm_struct *oldmm, struct mm_struct *mm)
984{
985 spin_lock(&mm->page_table_lock);
986 xen_pgd_pin(mm);
987 spin_unlock(&mm->page_table_lock);
988}
989
3d28ebce 990static void drop_mm_ref_this_cpu(void *info)
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991{
992 struct mm_struct *mm = info;
7e0563de 993
3d28ebce 994 if (this_cpu_read(cpu_tlbstate.loaded_mm) == mm)
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995 leave_mm(smp_processor_id());
996
3d28ebce
AL
997 /*
998 * If this cpu still has a stale cr3 reference, then make sure
999 * it has been flushed.
1000 */
7e0563de 1001 if (this_cpu_read(xen_current_cr3) == __pa(mm->pgd))
3d28ebce 1002 xen_mc_flush();
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1003}
1004
3d28ebce
AL
1005#ifdef CONFIG_SMP
1006/*
1007 * Another cpu may still have their %cr3 pointing at the pagetable, so
1008 * we need to repoint it somewhere else before we can unpin it.
1009 */
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1010static void xen_drop_mm_ref(struct mm_struct *mm)
1011{
1012 cpumask_var_t mask;
1013 unsigned cpu;
1014
3d28ebce 1015 drop_mm_ref_this_cpu(mm);
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1016
1017 /* Get the "official" set of cpus referring to our pagetable. */
1018 if (!alloc_cpumask_var(&mask, GFP_ATOMIC)) {
1019 for_each_online_cpu(cpu) {
94b1b03b 1020 if (per_cpu(xen_current_cr3, cpu) != __pa(mm->pgd))
7e0563de 1021 continue;
3d28ebce 1022 smp_call_function_single(cpu, drop_mm_ref_this_cpu, mm, 1);
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1023 }
1024 return;
1025 }
7e0563de 1026
3d28ebce
AL
1027 /*
1028 * It's possible that a vcpu may have a stale reference to our
1029 * cr3, because its in lazy mode, and it hasn't yet flushed
1030 * its set of pending hypercalls yet. In this case, we can
1031 * look at its actual current cr3 value, and force it to flush
1032 * if needed.
1033 */
94b1b03b 1034 cpumask_clear(mask);
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1035 for_each_online_cpu(cpu) {
1036 if (per_cpu(xen_current_cr3, cpu) == __pa(mm->pgd))
1037 cpumask_set_cpu(cpu, mask);
1038 }
1039
3d28ebce 1040 smp_call_function_many(mask, drop_mm_ref_this_cpu, mm, 1);
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1041 free_cpumask_var(mask);
1042}
1043#else
1044static void xen_drop_mm_ref(struct mm_struct *mm)
1045{
3d28ebce 1046 drop_mm_ref_this_cpu(mm);
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1047}
1048#endif
1049
1050/*
1051 * While a process runs, Xen pins its pagetables, which means that the
1052 * hypervisor forces it to be read-only, and it controls all updates
1053 * to it. This means that all pagetable updates have to go via the
1054 * hypervisor, which is moderately expensive.
1055 *
1056 * Since we're pulling the pagetable down, we switch to use init_mm,
1057 * unpin old process pagetable and mark it all read-write, which
1058 * allows further operations on it to be simple memory accesses.
1059 *
1060 * The only subtle point is that another CPU may be still using the
1061 * pagetable because of lazy tlb flushing. This means we need need to
1062 * switch all CPUs off this pagetable before we can unpin it.
1063 */
1064static void xen_exit_mmap(struct mm_struct *mm)
1065{
1066 get_cpu(); /* make sure we don't move around */
1067 xen_drop_mm_ref(mm);
1068 put_cpu();
1069
1070 spin_lock(&mm->page_table_lock);
1071
1072 /* pgd may not be pinned in the error exit path of execve */
1073 if (xen_page_pinned(mm->pgd))
1074 xen_pgd_unpin(mm);
1075
1076 spin_unlock(&mm->page_table_lock);
1077}
1078
1079static void xen_post_allocator_init(void);
1080
1081static void __init pin_pagetable_pfn(unsigned cmd, unsigned long pfn)
1082{
1083 struct mmuext_op op;
1084
1085 op.cmd = cmd;
1086 op.arg1.mfn = pfn_to_mfn(pfn);
1087 if (HYPERVISOR_mmuext_op(&op, 1, NULL, DOMID_SELF))
1088 BUG();
1089}
1090
1091#ifdef CONFIG_X86_64
1092static void __init xen_cleanhighmap(unsigned long vaddr,
1093 unsigned long vaddr_end)
1094{
1095 unsigned long kernel_end = roundup((unsigned long)_brk_end, PMD_SIZE) - 1;
1096 pmd_t *pmd = level2_kernel_pgt + pmd_index(vaddr);
1097
1098 /* NOTE: The loop is more greedy than the cleanup_highmap variant.
1099 * We include the PMD passed in on _both_ boundaries. */
1100 for (; vaddr <= vaddr_end && (pmd < (level2_kernel_pgt + PTRS_PER_PMD));
1101 pmd++, vaddr += PMD_SIZE) {
1102 if (pmd_none(*pmd))
1103 continue;
1104 if (vaddr < (unsigned long) _text || vaddr > kernel_end)
1105 set_pmd(pmd, __pmd(0));
1106 }
1107 /* In case we did something silly, we should crash in this function
1108 * instead of somewhere later and be confusing. */
1109 xen_mc_flush();
1110}
1111
1112/*
1113 * Make a page range writeable and free it.
1114 */
1115static void __init xen_free_ro_pages(unsigned long paddr, unsigned long size)
1116{
1117 void *vaddr = __va(paddr);
1118 void *vaddr_end = vaddr + size;
1119
1120 for (; vaddr < vaddr_end; vaddr += PAGE_SIZE)
1121 make_lowmem_page_readwrite(vaddr);
1122
1123 memblock_free(paddr, size);
1124}
1125
1126static void __init xen_cleanmfnmap_free_pgtbl(void *pgtbl, bool unpin)
1127{
1128 unsigned long pa = __pa(pgtbl) & PHYSICAL_PAGE_MASK;
1129
1130 if (unpin)
1131 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(pa));
1132 ClearPagePinned(virt_to_page(__va(pa)));
1133 xen_free_ro_pages(pa, PAGE_SIZE);
1134}
1135
1136static void __init xen_cleanmfnmap_pmd(pmd_t *pmd, bool unpin)
1137{
1138 unsigned long pa;
1139 pte_t *pte_tbl;
1140 int i;
1141
1142 if (pmd_large(*pmd)) {
1143 pa = pmd_val(*pmd) & PHYSICAL_PAGE_MASK;
1144 xen_free_ro_pages(pa, PMD_SIZE);
1145 return;
1146 }
1147
1148 pte_tbl = pte_offset_kernel(pmd, 0);
1149 for (i = 0; i < PTRS_PER_PTE; i++) {
1150 if (pte_none(pte_tbl[i]))
1151 continue;
1152 pa = pte_pfn(pte_tbl[i]) << PAGE_SHIFT;
1153 xen_free_ro_pages(pa, PAGE_SIZE);
1154 }
1155 set_pmd(pmd, __pmd(0));
1156 xen_cleanmfnmap_free_pgtbl(pte_tbl, unpin);
1157}
1158
1159static void __init xen_cleanmfnmap_pud(pud_t *pud, bool unpin)
1160{
1161 unsigned long pa;
1162 pmd_t *pmd_tbl;
1163 int i;
1164
1165 if (pud_large(*pud)) {
1166 pa = pud_val(*pud) & PHYSICAL_PAGE_MASK;
1167 xen_free_ro_pages(pa, PUD_SIZE);
1168 return;
1169 }
1170
1171 pmd_tbl = pmd_offset(pud, 0);
1172 for (i = 0; i < PTRS_PER_PMD; i++) {
1173 if (pmd_none(pmd_tbl[i]))
1174 continue;
1175 xen_cleanmfnmap_pmd(pmd_tbl + i, unpin);
1176 }
1177 set_pud(pud, __pud(0));
1178 xen_cleanmfnmap_free_pgtbl(pmd_tbl, unpin);
1179}
1180
1181static void __init xen_cleanmfnmap_p4d(p4d_t *p4d, bool unpin)
1182{
1183 unsigned long pa;
1184 pud_t *pud_tbl;
1185 int i;
1186
1187 if (p4d_large(*p4d)) {
1188 pa = p4d_val(*p4d) & PHYSICAL_PAGE_MASK;
1189 xen_free_ro_pages(pa, P4D_SIZE);
1190 return;
1191 }
1192
1193 pud_tbl = pud_offset(p4d, 0);
1194 for (i = 0; i < PTRS_PER_PUD; i++) {
1195 if (pud_none(pud_tbl[i]))
1196 continue;
1197 xen_cleanmfnmap_pud(pud_tbl + i, unpin);
1198 }
1199 set_p4d(p4d, __p4d(0));
1200 xen_cleanmfnmap_free_pgtbl(pud_tbl, unpin);
1201}
1202
1203/*
1204 * Since it is well isolated we can (and since it is perhaps large we should)
1205 * also free the page tables mapping the initial P->M table.
1206 */
1207static void __init xen_cleanmfnmap(unsigned long vaddr)
1208{
1209 pgd_t *pgd;
1210 p4d_t *p4d;
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1211 bool unpin;
1212
1213 unpin = (vaddr == 2 * PGDIR_SIZE);
1214 vaddr &= PMD_MASK;
1215 pgd = pgd_offset_k(vaddr);
1216 p4d = p4d_offset(pgd, 0);
773dd2fc
KS
1217 if (!p4d_none(*p4d))
1218 xen_cleanmfnmap_p4d(p4d, unpin);
7e0563de
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1219}
1220
1221static void __init xen_pagetable_p2m_free(void)
1222{
1223 unsigned long size;
1224 unsigned long addr;
1225
1226 size = PAGE_ALIGN(xen_start_info->nr_pages * sizeof(unsigned long));
1227
1228 /* No memory or already called. */
1229 if ((unsigned long)xen_p2m_addr == xen_start_info->mfn_list)
1230 return;
1231
1232 /* using __ka address and sticking INVALID_P2M_ENTRY! */
1233 memset((void *)xen_start_info->mfn_list, 0xff, size);
1234
1235 addr = xen_start_info->mfn_list;
1236 /*
1237 * We could be in __ka space.
1238 * We roundup to the PMD, which means that if anybody at this stage is
1239 * using the __ka address of xen_start_info or
1240 * xen_start_info->shared_info they are in going to crash. Fortunatly
7b25b9cb 1241 * we have already revectored in xen_setup_kernel_pagetable.
7e0563de
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1242 */
1243 size = roundup(size, PMD_SIZE);
1244
1245 if (addr >= __START_KERNEL_map) {
1246 xen_cleanhighmap(addr, addr + size);
1247 size = PAGE_ALIGN(xen_start_info->nr_pages *
1248 sizeof(unsigned long));
1249 memblock_free(__pa(addr), size);
1250 } else {
1251 xen_cleanmfnmap(addr);
1252 }
1253}
1254
1255static void __init xen_pagetable_cleanhighmap(void)
1256{
1257 unsigned long size;
1258 unsigned long addr;
1259
1260 /* At this stage, cleanup_highmap has already cleaned __ka space
1261 * from _brk_limit way up to the max_pfn_mapped (which is the end of
1262 * the ramdisk). We continue on, erasing PMD entries that point to page
1263 * tables - do note that they are accessible at this stage via __va.
0d805ee7
ZD
1264 * As Xen is aligning the memory end to a 4MB boundary, for good
1265 * measure we also round up to PMD_SIZE * 2 - which means that if
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1266 * anybody is using __ka address to the initial boot-stack - and try
1267 * to use it - they are going to crash. The xen_start_info has been
1268 * taken care of already in xen_setup_kernel_pagetable. */
1269 addr = xen_start_info->pt_base;
0d805ee7 1270 size = xen_start_info->nr_pt_frames * PAGE_SIZE;
7e0563de 1271
0d805ee7 1272 xen_cleanhighmap(addr, roundup(addr + size, PMD_SIZE * 2));
7e0563de 1273 xen_start_info->pt_base = (unsigned long)__va(__pa(xen_start_info->pt_base));
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1274}
1275#endif
1276
1277static void __init xen_pagetable_p2m_setup(void)
1278{
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1279 xen_vmalloc_p2m_tree();
1280
1281#ifdef CONFIG_X86_64
1282 xen_pagetable_p2m_free();
1283
1284 xen_pagetable_cleanhighmap();
1285#endif
1286 /* And revector! Bye bye old array */
1287 xen_start_info->mfn_list = (unsigned long)xen_p2m_addr;
1288}
1289
1290static void __init xen_pagetable_init(void)
1291{
1292 paging_init();
1293 xen_post_allocator_init();
1294
1295 xen_pagetable_p2m_setup();
1296
1297 /* Allocate and initialize top and mid mfn levels for p2m structure */
1298 xen_build_mfn_list_list();
1299
1300 /* Remap memory freed due to conflicts with E820 map */
989513a7 1301 xen_remap_memory();
7b25b9cb 1302 xen_setup_mfn_list_list();
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1303}
1304static void xen_write_cr2(unsigned long cr2)
1305{
1306 this_cpu_read(xen_vcpu)->arch.cr2 = cr2;
1307}
1308
1309static unsigned long xen_read_cr2(void)
1310{
1311 return this_cpu_read(xen_vcpu)->arch.cr2;
1312}
1313
1314unsigned long xen_read_cr2_direct(void)
1315{
1316 return this_cpu_read(xen_vcpu_info.arch.cr2);
1317}
1318
45dd9b06 1319static noinline void xen_flush_tlb(void)
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1320{
1321 struct mmuext_op *op;
1322 struct multicall_space mcs;
1323
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1324 preempt_disable();
1325
1326 mcs = xen_mc_entry(sizeof(*op));
1327
1328 op = mcs.args;
1329 op->cmd = MMUEXT_TLB_FLUSH_LOCAL;
1330 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
1331
1332 xen_mc_issue(PARAVIRT_LAZY_MMU);
1333
1334 preempt_enable();
1335}
1336
1299ef1d 1337static void xen_flush_tlb_one_user(unsigned long addr)
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1338{
1339 struct mmuext_op *op;
1340 struct multicall_space mcs;
1341
1299ef1d 1342 trace_xen_mmu_flush_tlb_one_user(addr);
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1343
1344 preempt_disable();
1345
1346 mcs = xen_mc_entry(sizeof(*op));
1347 op = mcs.args;
1348 op->cmd = MMUEXT_INVLPG_LOCAL;
1349 op->arg1.linear_addr = addr & PAGE_MASK;
1350 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
1351
1352 xen_mc_issue(PARAVIRT_LAZY_MMU);
1353
1354 preempt_enable();
1355}
1356
1357static void xen_flush_tlb_others(const struct cpumask *cpus,
a2055abe 1358 const struct flush_tlb_info *info)
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1359{
1360 struct {
1361 struct mmuext_op op;
7e0563de 1362 DECLARE_BITMAP(mask, NR_CPUS);
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1363 } *args;
1364 struct multicall_space mcs;
66a640e7
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1365 const size_t mc_entry_size = sizeof(args->op) +
1366 sizeof(args->mask[0]) * BITS_TO_LONGS(num_possible_cpus());
7e0563de 1367
a2055abe 1368 trace_xen_mmu_flush_tlb_others(cpus, info->mm, info->start, info->end);
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1369
1370 if (cpumask_empty(cpus))
1371 return; /* nothing to do */
1372
66a640e7 1373 mcs = xen_mc_entry(mc_entry_size);
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1374 args = mcs.args;
1375 args->op.arg2.vcpumask = to_cpumask(args->mask);
1376
1377 /* Remove us, and any offline CPUS. */
1378 cpumask_and(to_cpumask(args->mask), cpus, cpu_online_mask);
1379 cpumask_clear_cpu(smp_processor_id(), to_cpumask(args->mask));
1380
1381 args->op.cmd = MMUEXT_TLB_FLUSH_MULTI;
a2055abe
AL
1382 if (info->end != TLB_FLUSH_ALL &&
1383 (info->end - info->start) <= PAGE_SIZE) {
7e0563de 1384 args->op.cmd = MMUEXT_INVLPG_MULTI;
a2055abe 1385 args->op.arg1.linear_addr = info->start;
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1386 }
1387
1388 MULTI_mmuext_op(mcs.mc, &args->op, 1, NULL, DOMID_SELF);
1389
1390 xen_mc_issue(PARAVIRT_LAZY_MMU);
1391}
1392
1393static unsigned long xen_read_cr3(void)
1394{
1395 return this_cpu_read(xen_cr3);
1396}
1397
1398static void set_current_cr3(void *v)
1399{
1400 this_cpu_write(xen_current_cr3, (unsigned long)v);
1401}
1402
1403static void __xen_write_cr3(bool kernel, unsigned long cr3)
1404{
1405 struct mmuext_op op;
1406 unsigned long mfn;
1407
1408 trace_xen_mmu_write_cr3(kernel, cr3);
1409
1410 if (cr3)
1411 mfn = pfn_to_mfn(PFN_DOWN(cr3));
1412 else
1413 mfn = 0;
1414
1415 WARN_ON(mfn == 0 && kernel);
1416
1417 op.cmd = kernel ? MMUEXT_NEW_BASEPTR : MMUEXT_NEW_USER_BASEPTR;
1418 op.arg1.mfn = mfn;
1419
1420 xen_extend_mmuext_op(&op);
1421
1422 if (kernel) {
1423 this_cpu_write(xen_cr3, cr3);
1424
1425 /* Update xen_current_cr3 once the batch has actually
1426 been submitted. */
1427 xen_mc_callback(set_current_cr3, (void *)cr3);
1428 }
1429}
1430static void xen_write_cr3(unsigned long cr3)
1431{
1432 BUG_ON(preemptible());
1433
1434 xen_mc_batch(); /* disables interrupts */
1435
1436 /* Update while interrupts are disabled, so its atomic with
1437 respect to ipis */
1438 this_cpu_write(xen_cr3, cr3);
1439
1440 __xen_write_cr3(true, cr3);
1441
1442#ifdef CONFIG_X86_64
1443 {
1444 pgd_t *user_pgd = xen_get_user_pgd(__va(cr3));
1445 if (user_pgd)
1446 __xen_write_cr3(false, __pa(user_pgd));
1447 else
1448 __xen_write_cr3(false, 0);
1449 }
1450#endif
1451
1452 xen_mc_issue(PARAVIRT_LAZY_CPU); /* interrupts restored */
1453}
1454
1455#ifdef CONFIG_X86_64
1456/*
1457 * At the start of the day - when Xen launches a guest, it has already
1458 * built pagetables for the guest. We diligently look over them
1459 * in xen_setup_kernel_pagetable and graft as appropriate them in the
65ade2f8
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1460 * init_top_pgt and its friends. Then when we are happy we load
1461 * the new init_top_pgt - and continue on.
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1462 *
1463 * The generic code starts (start_kernel) and 'init_mem_mapping' sets
1464 * up the rest of the pagetables. When it has completed it loads the cr3.
1465 * N.B. that baremetal would start at 'start_kernel' (and the early
1466 * #PF handler would create bootstrap pagetables) - so we are running
1467 * with the same assumptions as what to do when write_cr3 is executed
1468 * at this point.
1469 *
1470 * Since there are no user-page tables at all, we have two variants
1471 * of xen_write_cr3 - the early bootup (this one), and the late one
1472 * (xen_write_cr3). The reason we have to do that is that in 64-bit
1473 * the Linux kernel and user-space are both in ring 3 while the
1474 * hypervisor is in ring 0.
1475 */
1476static void __init xen_write_cr3_init(unsigned long cr3)
1477{
1478 BUG_ON(preemptible());
1479
1480 xen_mc_batch(); /* disables interrupts */
1481
1482 /* Update while interrupts are disabled, so its atomic with
1483 respect to ipis */
1484 this_cpu_write(xen_cr3, cr3);
1485
1486 __xen_write_cr3(true, cr3);
1487
1488 xen_mc_issue(PARAVIRT_LAZY_CPU); /* interrupts restored */
1489}
1490#endif
1491
1492static int xen_pgd_alloc(struct mm_struct *mm)
1493{
1494 pgd_t *pgd = mm->pgd;
1495 int ret = 0;
1496
1497 BUG_ON(PagePinned(virt_to_page(pgd)));
1498
1499#ifdef CONFIG_X86_64
1500 {
1501 struct page *page = virt_to_page(pgd);
1502 pgd_t *user_pgd;
1503
1504 BUG_ON(page->private != 0);
1505
1506 ret = -ENOMEM;
1507
1508 user_pgd = (pgd_t *)__get_free_page(GFP_KERNEL | __GFP_ZERO);
1509 page->private = (unsigned long)user_pgd;
1510
1511 if (user_pgd != NULL) {
1512#ifdef CONFIG_X86_VSYSCALL_EMULATION
1513 user_pgd[pgd_index(VSYSCALL_ADDR)] =
1514 __pgd(__pa(level3_user_vsyscall) | _PAGE_TABLE);
1515#endif
1516 ret = 0;
1517 }
1518
1519 BUG_ON(PagePinned(virt_to_page(xen_get_user_pgd(pgd))));
1520 }
1521#endif
1522 return ret;
1523}
1524
1525static void xen_pgd_free(struct mm_struct *mm, pgd_t *pgd)
1526{
1527#ifdef CONFIG_X86_64
1528 pgd_t *user_pgd = xen_get_user_pgd(pgd);
1529
1530 if (user_pgd)
1531 free_page((unsigned long)user_pgd);
1532#endif
1533}
1534
1535/*
1536 * Init-time set_pte while constructing initial pagetables, which
1537 * doesn't allow RO page table pages to be remapped RW.
1538 *
1539 * If there is no MFN for this PFN then this page is initially
1540 * ballooned out so clear the PTE (as in decrease_reservation() in
1541 * drivers/xen/balloon.c).
1542 *
1543 * Many of these PTE updates are done on unpinned and writable pages
1544 * and doing a hypercall for these is unnecessary and expensive. At
1545 * this point it is not possible to tell if a page is pinned or not,
1546 * so always write the PTE directly and rely on Xen trapping and
1547 * emulating any updates as necessary.
1548 */
1549__visible pte_t xen_make_pte_init(pteval_t pte)
1550{
1551#ifdef CONFIG_X86_64
1552 unsigned long pfn;
1553
1554 /*
1555 * Pages belonging to the initial p2m list mapped outside the default
1556 * address range must be mapped read-only. This region contains the
1557 * page tables for mapping the p2m list, too, and page tables MUST be
1558 * mapped read-only.
1559 */
1560 pfn = (pte & PTE_PFN_MASK) >> PAGE_SHIFT;
1561 if (xen_start_info->mfn_list < __START_KERNEL_map &&
1562 pfn >= xen_start_info->first_p2m_pfn &&
1563 pfn < xen_start_info->first_p2m_pfn + xen_start_info->nr_p2m_frames)
1564 pte &= ~_PAGE_RW;
1565#endif
1566 pte = pte_pfn_to_mfn(pte);
1567 return native_make_pte(pte);
1568}
1569PV_CALLEE_SAVE_REGS_THUNK(xen_make_pte_init);
1570
1571static void __init xen_set_pte_init(pte_t *ptep, pte_t pte)
1572{
1573#ifdef CONFIG_X86_32
1574 /* If there's an existing pte, then don't allow _PAGE_RW to be set */
1575 if (pte_mfn(pte) != INVALID_P2M_ENTRY
1576 && pte_val_ma(*ptep) & _PAGE_PRESENT)
1577 pte = __pte_ma(((pte_val_ma(*ptep) & _PAGE_RW) | ~_PAGE_RW) &
1578 pte_val_ma(pte));
1579#endif
f7c90c2a 1580 __xen_set_pte(ptep, pte);
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1581}
1582
1583/* Early in boot, while setting up the initial pagetable, assume
1584 everything is pinned. */
1585static void __init xen_alloc_pte_init(struct mm_struct *mm, unsigned long pfn)
1586{
1587#ifdef CONFIG_FLATMEM
1588 BUG_ON(mem_map); /* should only be used early */
1589#endif
1590 make_lowmem_page_readonly(__va(PFN_PHYS(pfn)));
1591 pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE, pfn);
1592}
1593
1594/* Used for pmd and pud */
1595static void __init xen_alloc_pmd_init(struct mm_struct *mm, unsigned long pfn)
1596{
1597#ifdef CONFIG_FLATMEM
1598 BUG_ON(mem_map); /* should only be used early */
1599#endif
1600 make_lowmem_page_readonly(__va(PFN_PHYS(pfn)));
1601}
1602
1603/* Early release_pte assumes that all pts are pinned, since there's
1604 only init_mm and anything attached to that is pinned. */
1605static void __init xen_release_pte_init(unsigned long pfn)
1606{
1607 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, pfn);
1608 make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
1609}
1610
1611static void __init xen_release_pmd_init(unsigned long pfn)
1612{
1613 make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
1614}
1615
1616static inline void __pin_pagetable_pfn(unsigned cmd, unsigned long pfn)
1617{
1618 struct multicall_space mcs;
1619 struct mmuext_op *op;
1620
1621 mcs = __xen_mc_entry(sizeof(*op));
1622 op = mcs.args;
1623 op->cmd = cmd;
1624 op->arg1.mfn = pfn_to_mfn(pfn);
1625
1626 MULTI_mmuext_op(mcs.mc, mcs.args, 1, NULL, DOMID_SELF);
1627}
1628
1629static inline void __set_pfn_prot(unsigned long pfn, pgprot_t prot)
1630{
1631 struct multicall_space mcs;
1632 unsigned long addr = (unsigned long)__va(pfn << PAGE_SHIFT);
1633
1634 mcs = __xen_mc_entry(0);
1635 MULTI_update_va_mapping(mcs.mc, (unsigned long)addr,
1636 pfn_pte(pfn, prot), 0);
1637}
1638
1639/* This needs to make sure the new pte page is pinned iff its being
1640 attached to a pinned pagetable. */
1641static inline void xen_alloc_ptpage(struct mm_struct *mm, unsigned long pfn,
1642 unsigned level)
1643{
6f84f8d1 1644 bool pinned = xen_page_pinned(mm->pgd);
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1645
1646 trace_xen_mmu_alloc_ptpage(mm, pfn, level, pinned);
1647
1648 if (pinned) {
1649 struct page *page = pfn_to_page(pfn);
1650
6f84f8d1
PT
1651 if (static_branch_likely(&xen_struct_pages_ready))
1652 SetPagePinned(page);
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1653
1654 if (!PageHighMem(page)) {
1655 xen_mc_batch();
1656
1657 __set_pfn_prot(pfn, PAGE_KERNEL_RO);
1658
1659 if (level == PT_PTE && USE_SPLIT_PTE_PTLOCKS)
1660 __pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE, pfn);
1661
1662 xen_mc_issue(PARAVIRT_LAZY_MMU);
1663 } else {
1664 /* make sure there are no stray mappings of
1665 this page */
1666 kmap_flush_unused();
1667 }
1668 }
1669}
1670
1671static void xen_alloc_pte(struct mm_struct *mm, unsigned long pfn)
1672{
1673 xen_alloc_ptpage(mm, pfn, PT_PTE);
1674}
1675
1676static void xen_alloc_pmd(struct mm_struct *mm, unsigned long pfn)
1677{
1678 xen_alloc_ptpage(mm, pfn, PT_PMD);
1679}
1680
1681/* This should never happen until we're OK to use struct page */
1682static inline void xen_release_ptpage(unsigned long pfn, unsigned level)
1683{
1684 struct page *page = pfn_to_page(pfn);
1685 bool pinned = PagePinned(page);
1686
1687 trace_xen_mmu_release_ptpage(pfn, level, pinned);
1688
1689 if (pinned) {
1690 if (!PageHighMem(page)) {
1691 xen_mc_batch();
1692
1693 if (level == PT_PTE && USE_SPLIT_PTE_PTLOCKS)
1694 __pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, pfn);
1695
1696 __set_pfn_prot(pfn, PAGE_KERNEL);
1697
1698 xen_mc_issue(PARAVIRT_LAZY_MMU);
1699 }
1700 ClearPagePinned(page);
1701 }
1702}
1703
1704static void xen_release_pte(unsigned long pfn)
1705{
1706 xen_release_ptpage(pfn, PT_PTE);
1707}
1708
1709static void xen_release_pmd(unsigned long pfn)
1710{
1711 xen_release_ptpage(pfn, PT_PMD);
1712}
1713
773dd2fc 1714#ifdef CONFIG_X86_64
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1715static void xen_alloc_pud(struct mm_struct *mm, unsigned long pfn)
1716{
1717 xen_alloc_ptpage(mm, pfn, PT_PUD);
1718}
1719
1720static void xen_release_pud(unsigned long pfn)
1721{
1722 xen_release_ptpage(pfn, PT_PUD);
1723}
1724#endif
1725
1726void __init xen_reserve_top(void)
1727{
1728#ifdef CONFIG_X86_32
1729 unsigned long top = HYPERVISOR_VIRT_START;
1730 struct xen_platform_parameters pp;
1731
1732 if (HYPERVISOR_xen_version(XENVER_platform_parameters, &pp) == 0)
1733 top = pp.virt_start;
1734
1735 reserve_top_address(-top);
1736#endif /* CONFIG_X86_32 */
1737}
1738
1739/*
1740 * Like __va(), but returns address in the kernel mapping (which is
1741 * all we have until the physical memory mapping has been set up.
1742 */
1743static void * __init __ka(phys_addr_t paddr)
1744{
1745#ifdef CONFIG_X86_64
1746 return (void *)(paddr + __START_KERNEL_map);
1747#else
1748 return __va(paddr);
1749#endif
1750}
1751
1752/* Convert a machine address to physical address */
1753static unsigned long __init m2p(phys_addr_t maddr)
1754{
1755 phys_addr_t paddr;
1756
6f0e8bf1 1757 maddr &= XEN_PTE_MFN_MASK;
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1758 paddr = mfn_to_pfn(maddr >> PAGE_SHIFT) << PAGE_SHIFT;
1759
1760 return paddr;
1761}
1762
1763/* Convert a machine address to kernel virtual */
1764static void * __init m2v(phys_addr_t maddr)
1765{
1766 return __ka(m2p(maddr));
1767}
1768
1769/* Set the page permissions on an identity-mapped pages */
1770static void __init set_page_prot_flags(void *addr, pgprot_t prot,
1771 unsigned long flags)
1772{
1773 unsigned long pfn = __pa(addr) >> PAGE_SHIFT;
1774 pte_t pte = pfn_pte(pfn, prot);
1775
1776 if (HYPERVISOR_update_va_mapping((unsigned long)addr, pte, flags))
1777 BUG();
1778}
1779static void __init set_page_prot(void *addr, pgprot_t prot)
1780{
1781 return set_page_prot_flags(addr, prot, UVMF_NONE);
1782}
1783#ifdef CONFIG_X86_32
1784static void __init xen_map_identity_early(pmd_t *pmd, unsigned long max_pfn)
1785{
1786 unsigned pmdidx, pteidx;
1787 unsigned ident_pte;
1788 unsigned long pfn;
1789
1790 level1_ident_pgt = extend_brk(sizeof(pte_t) * LEVEL1_IDENT_ENTRIES,
1791 PAGE_SIZE);
1792
1793 ident_pte = 0;
1794 pfn = 0;
1795 for (pmdidx = 0; pmdidx < PTRS_PER_PMD && pfn < max_pfn; pmdidx++) {
1796 pte_t *pte_page;
1797
1798 /* Reuse or allocate a page of ptes */
1799 if (pmd_present(pmd[pmdidx]))
1800 pte_page = m2v(pmd[pmdidx].pmd);
1801 else {
1802 /* Check for free pte pages */
1803 if (ident_pte == LEVEL1_IDENT_ENTRIES)
1804 break;
1805
1806 pte_page = &level1_ident_pgt[ident_pte];
1807 ident_pte += PTRS_PER_PTE;
1808
1809 pmd[pmdidx] = __pmd(__pa(pte_page) | _PAGE_TABLE);
1810 }
1811
1812 /* Install mappings */
1813 for (pteidx = 0; pteidx < PTRS_PER_PTE; pteidx++, pfn++) {
1814 pte_t pte;
1815
1816 if (pfn > max_pfn_mapped)
1817 max_pfn_mapped = pfn;
1818
1819 if (!pte_none(pte_page[pteidx]))
1820 continue;
1821
1822 pte = pfn_pte(pfn, PAGE_KERNEL_EXEC);
1823 pte_page[pteidx] = pte;
1824 }
1825 }
1826
1827 for (pteidx = 0; pteidx < ident_pte; pteidx += PTRS_PER_PTE)
1828 set_page_prot(&level1_ident_pgt[pteidx], PAGE_KERNEL_RO);
1829
1830 set_page_prot(pmd, PAGE_KERNEL_RO);
1831}
1832#endif
1833void __init xen_setup_machphys_mapping(void)
1834{
1835 struct xen_machphys_mapping mapping;
1836
1837 if (HYPERVISOR_memory_op(XENMEM_machphys_mapping, &mapping) == 0) {
1838 machine_to_phys_mapping = (unsigned long *)mapping.v_start;
1839 machine_to_phys_nr = mapping.max_mfn + 1;
1840 } else {
1841 machine_to_phys_nr = MACH2PHYS_NR_ENTRIES;
1842 }
1843#ifdef CONFIG_X86_32
1844 WARN_ON((machine_to_phys_mapping + (machine_to_phys_nr - 1))
1845 < machine_to_phys_mapping);
1846#endif
1847}
1848
1849#ifdef CONFIG_X86_64
1850static void __init convert_pfn_mfn(void *v)
1851{
1852 pte_t *pte = v;
1853 int i;
1854
1855 /* All levels are converted the same way, so just treat them
1856 as ptes. */
1857 for (i = 0; i < PTRS_PER_PTE; i++)
1858 pte[i] = xen_make_pte(pte[i].pte);
1859}
1860static void __init check_pt_base(unsigned long *pt_base, unsigned long *pt_end,
1861 unsigned long addr)
1862{
1863 if (*pt_base == PFN_DOWN(__pa(addr))) {
1864 set_page_prot_flags((void *)addr, PAGE_KERNEL, UVMF_INVLPG);
1865 clear_page((void *)addr);
1866 (*pt_base)++;
1867 }
1868 if (*pt_end == PFN_DOWN(__pa(addr))) {
1869 set_page_prot_flags((void *)addr, PAGE_KERNEL, UVMF_INVLPG);
1870 clear_page((void *)addr);
1871 (*pt_end)--;
1872 }
1873}
1874/*
1875 * Set up the initial kernel pagetable.
1876 *
1877 * We can construct this by grafting the Xen provided pagetable into
1878 * head_64.S's preconstructed pagetables. We copy the Xen L2's into
1879 * level2_ident_pgt, and level2_kernel_pgt. This means that only the
1880 * kernel has a physical mapping to start with - but that's enough to
1881 * get __va working. We need to fill in the rest of the physical
1882 * mapping once some sort of allocator has been set up.
1883 */
1884void __init xen_setup_kernel_pagetable(pgd_t *pgd, unsigned long max_pfn)
1885{
1886 pud_t *l3;
1887 pmd_t *l2;
1888 unsigned long addr[3];
1889 unsigned long pt_base, pt_end;
1890 unsigned i;
1891
1892 /* max_pfn_mapped is the last pfn mapped in the initial memory
1893 * mappings. Considering that on Xen after the kernel mappings we
1894 * have the mappings of some pages that don't exist in pfn space, we
1895 * set max_pfn_mapped to the last real pfn mapped. */
1896 if (xen_start_info->mfn_list < __START_KERNEL_map)
1897 max_pfn_mapped = xen_start_info->first_p2m_pfn;
1898 else
1899 max_pfn_mapped = PFN_DOWN(__pa(xen_start_info->mfn_list));
1900
1901 pt_base = PFN_DOWN(__pa(xen_start_info->pt_base));
1902 pt_end = pt_base + xen_start_info->nr_pt_frames;
1903
1904 /* Zap identity mapping */
65ade2f8 1905 init_top_pgt[0] = __pgd(0);
7e0563de 1906
989513a7 1907 /* Pre-constructed entries are in pfn, so convert to mfn */
d52888aa 1908 /* L4[273] -> level3_ident_pgt */
989513a7 1909 /* L4[511] -> level3_kernel_pgt */
65ade2f8 1910 convert_pfn_mfn(init_top_pgt);
7e0563de 1911
989513a7
JG
1912 /* L3_i[0] -> level2_ident_pgt */
1913 convert_pfn_mfn(level3_ident_pgt);
1914 /* L3_k[510] -> level2_kernel_pgt */
1915 /* L3_k[511] -> level2_fixmap_pgt */
1916 convert_pfn_mfn(level3_kernel_pgt);
1917
05ab1d8a 1918 /* L3_k[511][508-FIXMAP_PMD_NUM ... 507] -> level1_fixmap_pgt */
989513a7 1919 convert_pfn_mfn(level2_fixmap_pgt);
7e0563de 1920
7e0563de
VK
1921 /* We get [511][511] and have Xen's version of level2_kernel_pgt */
1922 l3 = m2v(pgd[pgd_index(__START_KERNEL_map)].pgd);
1923 l2 = m2v(l3[pud_index(__START_KERNEL_map)].pud);
1924
1925 addr[0] = (unsigned long)pgd;
1926 addr[1] = (unsigned long)l3;
1927 addr[2] = (unsigned long)l2;
d52888aa
KS
1928 /* Graft it onto L4[273][0]. Note that we creating an aliasing problem:
1929 * Both L4[273][0] and L4[511][510] have entries that point to the same
7e0563de
VK
1930 * L2 (PMD) tables. Meaning that if you modify it in __va space
1931 * it will be also modified in the __ka space! (But if you just
1932 * modify the PMD table to point to other PTE's or none, then you
1933 * are OK - which is what cleanup_highmap does) */
1934 copy_page(level2_ident_pgt, l2);
1935 /* Graft it onto L4[511][510] */
1936 copy_page(level2_kernel_pgt, l2);
1937
2cc42bac
JB
1938 /*
1939 * Zap execute permission from the ident map. Due to the sharing of
1940 * L1 entries we need to do this in the L2.
1941 */
1942 if (__supported_pte_mask & _PAGE_NX) {
1943 for (i = 0; i < PTRS_PER_PMD; ++i) {
1944 if (pmd_none(level2_ident_pgt[i]))
1945 continue;
1946 level2_ident_pgt[i] = pmd_set_flags(level2_ident_pgt[i], _PAGE_NX);
1947 }
1948 }
1949
7e0563de
VK
1950 /* Copy the initial P->M table mappings if necessary. */
1951 i = pgd_index(xen_start_info->mfn_list);
1952 if (i && i < pgd_index(__START_KERNEL_map))
65ade2f8 1953 init_top_pgt[i] = ((pgd_t *)xen_start_info->pt_base)[i];
7e0563de 1954
989513a7 1955 /* Make pagetable pieces RO */
65ade2f8 1956 set_page_prot(init_top_pgt, PAGE_KERNEL_RO);
989513a7
JG
1957 set_page_prot(level3_ident_pgt, PAGE_KERNEL_RO);
1958 set_page_prot(level3_kernel_pgt, PAGE_KERNEL_RO);
1959 set_page_prot(level3_user_vsyscall, PAGE_KERNEL_RO);
1960 set_page_prot(level2_ident_pgt, PAGE_KERNEL_RO);
1961 set_page_prot(level2_kernel_pgt, PAGE_KERNEL_RO);
1962 set_page_prot(level2_fixmap_pgt, PAGE_KERNEL_RO);
05ab1d8a
FT
1963
1964 for (i = 0; i < FIXMAP_PMD_NUM; i++) {
1965 set_page_prot(level1_fixmap_pgt + i * PTRS_PER_PTE,
1966 PAGE_KERNEL_RO);
1967 }
989513a7
JG
1968
1969 /* Pin down new L4 */
1970 pin_pagetable_pfn(MMUEXT_PIN_L4_TABLE,
65ade2f8 1971 PFN_DOWN(__pa_symbol(init_top_pgt)));
989513a7
JG
1972
1973 /* Unpin Xen-provided one */
1974 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
7e0563de 1975
989513a7
JG
1976 /*
1977 * At this stage there can be no user pgd, and no page structure to
1978 * attach it to, so make sure we just set kernel pgd.
1979 */
1980 xen_mc_batch();
65ade2f8 1981 __xen_write_cr3(true, __pa(init_top_pgt));
989513a7 1982 xen_mc_issue(PARAVIRT_LAZY_CPU);
7e0563de
VK
1983
1984 /* We can't that easily rip out L3 and L2, as the Xen pagetables are
1985 * set out this way: [L4], [L1], [L2], [L3], [L1], [L1] ... for
1986 * the initial domain. For guests using the toolstack, they are in:
1987 * [L4], [L3], [L2], [L1], [L1], order .. So for dom0 we can only
1988 * rip out the [L4] (pgd), but for guests we shave off three pages.
1989 */
1990 for (i = 0; i < ARRAY_SIZE(addr); i++)
1991 check_pt_base(&pt_base, &pt_end, addr[i]);
1992
1993 /* Our (by three pages) smaller Xen pagetable that we are using */
1994 xen_pt_base = PFN_PHYS(pt_base);
1995 xen_pt_size = (pt_end - pt_base) * PAGE_SIZE;
1996 memblock_reserve(xen_pt_base, xen_pt_size);
1997
1998 /* Revector the xen_start_info */
1999 xen_start_info = (struct start_info *)__va(__pa(xen_start_info));
2000}
2001
2002/*
2003 * Read a value from a physical address.
2004 */
2005static unsigned long __init xen_read_phys_ulong(phys_addr_t addr)
2006{
2007 unsigned long *vaddr;
2008 unsigned long val;
2009
2010 vaddr = early_memremap_ro(addr, sizeof(val));
2011 val = *vaddr;
2012 early_memunmap(vaddr, sizeof(val));
2013 return val;
2014}
2015
2016/*
2017 * Translate a virtual address to a physical one without relying on mapped
69861e0a
JG
2018 * page tables. Don't rely on big pages being aligned in (guest) physical
2019 * space!
7e0563de
VK
2020 */
2021static phys_addr_t __init xen_early_virt_to_phys(unsigned long vaddr)
2022{
2023 phys_addr_t pa;
2024 pgd_t pgd;
2025 pud_t pud;
2026 pmd_t pmd;
2027 pte_t pte;
2028
6c690ee1 2029 pa = read_cr3_pa();
7e0563de
VK
2030 pgd = native_make_pgd(xen_read_phys_ulong(pa + pgd_index(vaddr) *
2031 sizeof(pgd)));
2032 if (!pgd_present(pgd))
2033 return 0;
2034
2035 pa = pgd_val(pgd) & PTE_PFN_MASK;
2036 pud = native_make_pud(xen_read_phys_ulong(pa + pud_index(vaddr) *
2037 sizeof(pud)));
2038 if (!pud_present(pud))
2039 return 0;
69861e0a 2040 pa = pud_val(pud) & PTE_PFN_MASK;
7e0563de
VK
2041 if (pud_large(pud))
2042 return pa + (vaddr & ~PUD_MASK);
2043
2044 pmd = native_make_pmd(xen_read_phys_ulong(pa + pmd_index(vaddr) *
2045 sizeof(pmd)));
2046 if (!pmd_present(pmd))
2047 return 0;
69861e0a 2048 pa = pmd_val(pmd) & PTE_PFN_MASK;
7e0563de
VK
2049 if (pmd_large(pmd))
2050 return pa + (vaddr & ~PMD_MASK);
2051
2052 pte = native_make_pte(xen_read_phys_ulong(pa + pte_index(vaddr) *
2053 sizeof(pte)));
2054 if (!pte_present(pte))
2055 return 0;
2056 pa = pte_pfn(pte) << PAGE_SHIFT;
2057
2058 return pa | (vaddr & ~PAGE_MASK);
2059}
2060
2061/*
2062 * Find a new area for the hypervisor supplied p2m list and relocate the p2m to
2063 * this area.
2064 */
2065void __init xen_relocate_p2m(void)
2066{
773dd2fc 2067 phys_addr_t size, new_area, pt_phys, pmd_phys, pud_phys;
7e0563de 2068 unsigned long p2m_pfn, p2m_pfn_end, n_frames, pfn, pfn_end;
773dd2fc 2069 int n_pte, n_pt, n_pmd, n_pud, idx_pte, idx_pt, idx_pmd, idx_pud;
7e0563de
VK
2070 pte_t *pt;
2071 pmd_t *pmd;
2072 pud_t *pud;
7e0563de
VK
2073 pgd_t *pgd;
2074 unsigned long *new_p2m;
7e0563de
VK
2075
2076 size = PAGE_ALIGN(xen_start_info->nr_pages * sizeof(unsigned long));
2077 n_pte = roundup(size, PAGE_SIZE) >> PAGE_SHIFT;
2078 n_pt = roundup(size, PMD_SIZE) >> PMD_SHIFT;
2079 n_pmd = roundup(size, PUD_SIZE) >> PUD_SHIFT;
2080 n_pud = roundup(size, P4D_SIZE) >> P4D_SHIFT;
773dd2fc 2081 n_frames = n_pte + n_pt + n_pmd + n_pud;
7e0563de
VK
2082
2083 new_area = xen_find_free_area(PFN_PHYS(n_frames));
2084 if (!new_area) {
2085 xen_raw_console_write("Can't find new memory area for p2m needed due to E820 map conflict\n");
2086 BUG();
2087 }
2088
2089 /*
2090 * Setup the page tables for addressing the new p2m list.
2091 * We have asked the hypervisor to map the p2m list at the user address
2092 * PUD_SIZE. It may have done so, or it may have used a kernel space
2093 * address depending on the Xen version.
2094 * To avoid any possible virtual address collision, just use
2095 * 2 * PUD_SIZE for the new area.
2096 */
773dd2fc 2097 pud_phys = new_area;
7e0563de
VK
2098 pmd_phys = pud_phys + PFN_PHYS(n_pud);
2099 pt_phys = pmd_phys + PFN_PHYS(n_pmd);
2100 p2m_pfn = PFN_DOWN(pt_phys) + n_pt;
2101
6c690ee1 2102 pgd = __va(read_cr3_pa());
7e0563de 2103 new_p2m = (unsigned long *)(2 * PGDIR_SIZE);
773dd2fc
KS
2104 for (idx_pud = 0; idx_pud < n_pud; idx_pud++) {
2105 pud = early_memremap(pud_phys, PAGE_SIZE);
2106 clear_page(pud);
2107 for (idx_pmd = 0; idx_pmd < min(n_pmd, PTRS_PER_PUD);
2108 idx_pmd++) {
2109 pmd = early_memremap(pmd_phys, PAGE_SIZE);
2110 clear_page(pmd);
2111 for (idx_pt = 0; idx_pt < min(n_pt, PTRS_PER_PMD);
2112 idx_pt++) {
2113 pt = early_memremap(pt_phys, PAGE_SIZE);
2114 clear_page(pt);
2115 for (idx_pte = 0;
2116 idx_pte < min(n_pte, PTRS_PER_PTE);
2117 idx_pte++) {
2118 set_pte(pt + idx_pte,
2119 pfn_pte(p2m_pfn, PAGE_KERNEL));
2120 p2m_pfn++;
7e0563de 2121 }
773dd2fc
KS
2122 n_pte -= PTRS_PER_PTE;
2123 early_memunmap(pt, PAGE_SIZE);
2124 make_lowmem_page_readonly(__va(pt_phys));
2125 pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE,
2126 PFN_DOWN(pt_phys));
2127 set_pmd(pmd + idx_pt,
2128 __pmd(_PAGE_TABLE | pt_phys));
2129 pt_phys += PAGE_SIZE;
7e0563de 2130 }
773dd2fc
KS
2131 n_pt -= PTRS_PER_PMD;
2132 early_memunmap(pmd, PAGE_SIZE);
2133 make_lowmem_page_readonly(__va(pmd_phys));
2134 pin_pagetable_pfn(MMUEXT_PIN_L2_TABLE,
2135 PFN_DOWN(pmd_phys));
2136 set_pud(pud + idx_pmd, __pud(_PAGE_TABLE | pmd_phys));
2137 pmd_phys += PAGE_SIZE;
7e0563de 2138 }
773dd2fc
KS
2139 n_pmd -= PTRS_PER_PUD;
2140 early_memunmap(pud, PAGE_SIZE);
2141 make_lowmem_page_readonly(__va(pud_phys));
2142 pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE, PFN_DOWN(pud_phys));
2143 set_pgd(pgd + 2 + idx_pud, __pgd(_PAGE_TABLE | pud_phys));
2144 pud_phys += PAGE_SIZE;
2145 }
7e0563de
VK
2146
2147 /* Now copy the old p2m info to the new area. */
2148 memcpy(new_p2m, xen_p2m_addr, size);
2149 xen_p2m_addr = new_p2m;
2150
2151 /* Release the old p2m list and set new list info. */
2152 p2m_pfn = PFN_DOWN(xen_early_virt_to_phys(xen_start_info->mfn_list));
2153 BUG_ON(!p2m_pfn);
2154 p2m_pfn_end = p2m_pfn + PFN_DOWN(size);
2155
2156 if (xen_start_info->mfn_list < __START_KERNEL_map) {
2157 pfn = xen_start_info->first_p2m_pfn;
2158 pfn_end = xen_start_info->first_p2m_pfn +
2159 xen_start_info->nr_p2m_frames;
2160 set_pgd(pgd + 1, __pgd(0));
2161 } else {
2162 pfn = p2m_pfn;
2163 pfn_end = p2m_pfn_end;
2164 }
2165
2166 memblock_free(PFN_PHYS(pfn), PAGE_SIZE * (pfn_end - pfn));
2167 while (pfn < pfn_end) {
2168 if (pfn == p2m_pfn) {
2169 pfn = p2m_pfn_end;
2170 continue;
2171 }
2172 make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
2173 pfn++;
2174 }
2175
2176 xen_start_info->mfn_list = (unsigned long)xen_p2m_addr;
2177 xen_start_info->first_p2m_pfn = PFN_DOWN(new_area);
2178 xen_start_info->nr_p2m_frames = n_frames;
2179}
2180
2181#else /* !CONFIG_X86_64 */
2182static RESERVE_BRK_ARRAY(pmd_t, initial_kernel_pmd, PTRS_PER_PMD);
2183static RESERVE_BRK_ARRAY(pmd_t, swapper_kernel_pmd, PTRS_PER_PMD);
75f2d3a0
JG
2184RESERVE_BRK(fixup_kernel_pmd, PAGE_SIZE);
2185RESERVE_BRK(fixup_kernel_pte, PAGE_SIZE);
7e0563de
VK
2186
2187static void __init xen_write_cr3_init(unsigned long cr3)
2188{
2189 unsigned long pfn = PFN_DOWN(__pa(swapper_pg_dir));
2190
6c690ee1 2191 BUG_ON(read_cr3_pa() != __pa(initial_page_table));
7e0563de
VK
2192 BUG_ON(cr3 != __pa(swapper_pg_dir));
2193
2194 /*
2195 * We are switching to swapper_pg_dir for the first time (from
2196 * initial_page_table) and therefore need to mark that page
2197 * read-only and then pin it.
2198 *
2199 * Xen disallows sharing of kernel PMDs for PAE
2200 * guests. Therefore we must copy the kernel PMD from
2201 * initial_page_table into a new kernel PMD to be used in
2202 * swapper_pg_dir.
2203 */
2204 swapper_kernel_pmd =
2205 extend_brk(sizeof(pmd_t) * PTRS_PER_PMD, PAGE_SIZE);
2206 copy_page(swapper_kernel_pmd, initial_kernel_pmd);
2207 swapper_pg_dir[KERNEL_PGD_BOUNDARY] =
2208 __pgd(__pa(swapper_kernel_pmd) | _PAGE_PRESENT);
2209 set_page_prot(swapper_kernel_pmd, PAGE_KERNEL_RO);
2210
2211 set_page_prot(swapper_pg_dir, PAGE_KERNEL_RO);
2212 xen_write_cr3(cr3);
2213 pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE, pfn);
2214
2215 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE,
2216 PFN_DOWN(__pa(initial_page_table)));
2217 set_page_prot(initial_page_table, PAGE_KERNEL);
2218 set_page_prot(initial_kernel_pmd, PAGE_KERNEL);
2219
5c83511b 2220 pv_ops.mmu.write_cr3 = &xen_write_cr3;
7e0563de
VK
2221}
2222
2223/*
2224 * For 32 bit domains xen_start_info->pt_base is the pgd address which might be
2225 * not the first page table in the page table pool.
2226 * Iterate through the initial page tables to find the real page table base.
2227 */
51ae2538 2228static phys_addr_t __init xen_find_pt_base(pmd_t *pmd)
7e0563de
VK
2229{
2230 phys_addr_t pt_base, paddr;
2231 unsigned pmdidx;
2232
2233 pt_base = min(__pa(xen_start_info->pt_base), __pa(pmd));
2234
2235 for (pmdidx = 0; pmdidx < PTRS_PER_PMD; pmdidx++)
2236 if (pmd_present(pmd[pmdidx]) && !pmd_large(pmd[pmdidx])) {
2237 paddr = m2p(pmd[pmdidx].pmd);
2238 pt_base = min(pt_base, paddr);
2239 }
2240
2241 return pt_base;
2242}
2243
2244void __init xen_setup_kernel_pagetable(pgd_t *pgd, unsigned long max_pfn)
2245{
2246 pmd_t *kernel_pmd;
2247
2248 kernel_pmd = m2v(pgd[KERNEL_PGD_BOUNDARY].pgd);
2249
2250 xen_pt_base = xen_find_pt_base(kernel_pmd);
2251 xen_pt_size = xen_start_info->nr_pt_frames * PAGE_SIZE;
2252
2253 initial_kernel_pmd =
2254 extend_brk(sizeof(pmd_t) * PTRS_PER_PMD, PAGE_SIZE);
2255
2256 max_pfn_mapped = PFN_DOWN(xen_pt_base + xen_pt_size + 512 * 1024);
2257
2258 copy_page(initial_kernel_pmd, kernel_pmd);
2259
2260 xen_map_identity_early(initial_kernel_pmd, max_pfn);
2261
2262 copy_page(initial_page_table, pgd);
2263 initial_page_table[KERNEL_PGD_BOUNDARY] =
2264 __pgd(__pa(initial_kernel_pmd) | _PAGE_PRESENT);
2265
2266 set_page_prot(initial_kernel_pmd, PAGE_KERNEL_RO);
2267 set_page_prot(initial_page_table, PAGE_KERNEL_RO);
2268 set_page_prot(empty_zero_page, PAGE_KERNEL_RO);
2269
2270 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
2271
2272 pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE,
2273 PFN_DOWN(__pa(initial_page_table)));
2274 xen_write_cr3(__pa(initial_page_table));
2275
2276 memblock_reserve(xen_pt_base, xen_pt_size);
2277}
2278#endif /* CONFIG_X86_64 */
2279
2280void __init xen_reserve_special_pages(void)
2281{
2282 phys_addr_t paddr;
2283
2284 memblock_reserve(__pa(xen_start_info), PAGE_SIZE);
2285 if (xen_start_info->store_mfn) {
2286 paddr = PFN_PHYS(mfn_to_pfn(xen_start_info->store_mfn));
2287 memblock_reserve(paddr, PAGE_SIZE);
2288 }
2289 if (!xen_initial_domain()) {
2290 paddr = PFN_PHYS(mfn_to_pfn(xen_start_info->console.domU.mfn));
2291 memblock_reserve(paddr, PAGE_SIZE);
2292 }
2293}
2294
2295void __init xen_pt_check_e820(void)
2296{
2297 if (xen_is_e820_reserved(xen_pt_base, xen_pt_size)) {
2298 xen_raw_console_write("Xen hypervisor allocated page table memory conflicts with E820 map\n");
2299 BUG();
2300 }
2301}
2302
2303static unsigned char dummy_mapping[PAGE_SIZE] __page_aligned_bss;
2304
2305static void xen_set_fixmap(unsigned idx, phys_addr_t phys, pgprot_t prot)
2306{
2307 pte_t pte;
2308
2309 phys >>= PAGE_SHIFT;
2310
2311 switch (idx) {
2312 case FIX_BTMAP_END ... FIX_BTMAP_BEGIN:
7e0563de
VK
2313#ifdef CONFIG_X86_32
2314 case FIX_WP_TEST:
2315# ifdef CONFIG_HIGHMEM
2316 case FIX_KMAP_BEGIN ... FIX_KMAP_END:
2317# endif
2318#elif defined(CONFIG_X86_VSYSCALL_EMULATION)
2319 case VSYSCALL_PAGE:
2320#endif
2321 case FIX_TEXT_POKE0:
2322 case FIX_TEXT_POKE1:
7e0563de
VK
2323 /* All local page mappings */
2324 pte = pfn_pte(phys, prot);
2325 break;
2326
2327#ifdef CONFIG_X86_LOCAL_APIC
2328 case FIX_APIC_BASE: /* maps dummy local APIC */
2329 pte = pfn_pte(PFN_DOWN(__pa(dummy_mapping)), PAGE_KERNEL);
2330 break;
2331#endif
2332
2333#ifdef CONFIG_X86_IO_APIC
2334 case FIX_IO_APIC_BASE_0 ... FIX_IO_APIC_BASE_END:
2335 /*
2336 * We just don't map the IO APIC - all access is via
2337 * hypercalls. Keep the address in the pte for reference.
2338 */
2339 pte = pfn_pte(PFN_DOWN(__pa(dummy_mapping)), PAGE_KERNEL);
2340 break;
2341#endif
2342
2343 case FIX_PARAVIRT_BOOTMAP:
2344 /* This is an MFN, but it isn't an IO mapping from the
2345 IO domain */
2346 pte = mfn_pte(phys, prot);
2347 break;
2348
2349 default:
2350 /* By default, set_fixmap is used for hardware mappings */
2351 pte = mfn_pte(phys, prot);
2352 break;
2353 }
2354
2355 __native_set_fixmap(idx, pte);
2356
2357#ifdef CONFIG_X86_VSYSCALL_EMULATION
2358 /* Replicate changes to map the vsyscall page into the user
2359 pagetable vsyscall mapping. */
2360 if (idx == VSYSCALL_PAGE) {
2361 unsigned long vaddr = __fix_to_virt(idx);
2362 set_pte_vaddr_pud(level3_user_vsyscall, vaddr, pte);
2363 }
2364#endif
2365}
2366
2367static void __init xen_post_allocator_init(void)
2368{
5c83511b
JG
2369 pv_ops.mmu.set_pte = xen_set_pte;
2370 pv_ops.mmu.set_pmd = xen_set_pmd;
2371 pv_ops.mmu.set_pud = xen_set_pud;
773dd2fc 2372#ifdef CONFIG_X86_64
5c83511b 2373 pv_ops.mmu.set_p4d = xen_set_p4d;
7e0563de
VK
2374#endif
2375
2376 /* This will work as long as patching hasn't happened yet
2377 (which it hasn't) */
5c83511b
JG
2378 pv_ops.mmu.alloc_pte = xen_alloc_pte;
2379 pv_ops.mmu.alloc_pmd = xen_alloc_pmd;
2380 pv_ops.mmu.release_pte = xen_release_pte;
2381 pv_ops.mmu.release_pmd = xen_release_pmd;
773dd2fc 2382#ifdef CONFIG_X86_64
5c83511b
JG
2383 pv_ops.mmu.alloc_pud = xen_alloc_pud;
2384 pv_ops.mmu.release_pud = xen_release_pud;
7e0563de 2385#endif
5c83511b 2386 pv_ops.mmu.make_pte = PV_CALLEE_SAVE(xen_make_pte);
7e0563de
VK
2387
2388#ifdef CONFIG_X86_64
5c83511b 2389 pv_ops.mmu.write_cr3 = &xen_write_cr3;
7e0563de 2390#endif
7e0563de
VK
2391}
2392
2393static void xen_leave_lazy_mmu(void)
2394{
2395 preempt_disable();
2396 xen_mc_flush();
2397 paravirt_leave_lazy_mmu();
2398 preempt_enable();
2399}
2400
2401static const struct pv_mmu_ops xen_mmu_ops __initconst = {
2402 .read_cr2 = xen_read_cr2,
2403 .write_cr2 = xen_write_cr2,
2404
2405 .read_cr3 = xen_read_cr3,
2406 .write_cr3 = xen_write_cr3_init,
2407
2408 .flush_tlb_user = xen_flush_tlb,
2409 .flush_tlb_kernel = xen_flush_tlb,
1299ef1d 2410 .flush_tlb_one_user = xen_flush_tlb_one_user,
7e0563de 2411 .flush_tlb_others = xen_flush_tlb_others,
48a8b97c 2412 .tlb_remove_table = tlb_remove_table,
7e0563de 2413
7e0563de
VK
2414 .pgd_alloc = xen_pgd_alloc,
2415 .pgd_free = xen_pgd_free,
2416
2417 .alloc_pte = xen_alloc_pte_init,
2418 .release_pte = xen_release_pte_init,
2419 .alloc_pmd = xen_alloc_pmd_init,
2420 .release_pmd = xen_release_pmd_init,
2421
2422 .set_pte = xen_set_pte_init,
2423 .set_pte_at = xen_set_pte_at,
2424 .set_pmd = xen_set_pmd_hyper,
2425
2426 .ptep_modify_prot_start = __ptep_modify_prot_start,
2427 .ptep_modify_prot_commit = __ptep_modify_prot_commit,
2428
2429 .pte_val = PV_CALLEE_SAVE(xen_pte_val),
2430 .pgd_val = PV_CALLEE_SAVE(xen_pgd_val),
2431
2432 .make_pte = PV_CALLEE_SAVE(xen_make_pte_init),
2433 .make_pgd = PV_CALLEE_SAVE(xen_make_pgd),
2434
2435#ifdef CONFIG_X86_PAE
2436 .set_pte_atomic = xen_set_pte_atomic,
2437 .pte_clear = xen_pte_clear,
2438 .pmd_clear = xen_pmd_clear,
2439#endif /* CONFIG_X86_PAE */
2440 .set_pud = xen_set_pud_hyper,
2441
2442 .make_pmd = PV_CALLEE_SAVE(xen_make_pmd),
2443 .pmd_val = PV_CALLEE_SAVE(xen_pmd_val),
2444
773dd2fc 2445#ifdef CONFIG_X86_64
7e0563de
VK
2446 .pud_val = PV_CALLEE_SAVE(xen_pud_val),
2447 .make_pud = PV_CALLEE_SAVE(xen_make_pud),
2448 .set_p4d = xen_set_p4d_hyper,
2449
2450 .alloc_pud = xen_alloc_pmd_init,
2451 .release_pud = xen_release_pmd_init,
b9952ec7
KS
2452
2453#if CONFIG_PGTABLE_LEVELS >= 5
2454 .p4d_val = PV_CALLEE_SAVE(xen_p4d_val),
2455 .make_p4d = PV_CALLEE_SAVE(xen_make_p4d),
2456#endif
773dd2fc 2457#endif /* CONFIG_X86_64 */
7e0563de
VK
2458
2459 .activate_mm = xen_activate_mm,
2460 .dup_mmap = xen_dup_mmap,
2461 .exit_mmap = xen_exit_mmap,
2462
2463 .lazy_mode = {
2464 .enter = paravirt_enter_lazy_mmu,
2465 .leave = xen_leave_lazy_mmu,
2466 .flush = paravirt_flush_lazy_mmu,
2467 },
2468
2469 .set_fixmap = xen_set_fixmap,
2470};
2471
2472void __init xen_init_mmu_ops(void)
2473{
2474 x86_init.paging.pagetable_init = xen_pagetable_init;
6f84f8d1 2475 x86_init.hyper.init_after_bootmem = xen_after_bootmem;
7e0563de 2476
5c83511b 2477 pv_ops.mmu = xen_mmu_ops;
7e0563de
VK
2478
2479 memset(dummy_mapping, 0xff, PAGE_SIZE);
2480}
2481
2482/* Protected by xen_reservation_lock. */
2483#define MAX_CONTIG_ORDER 9 /* 2MB */
2484static unsigned long discontig_frames[1<<MAX_CONTIG_ORDER];
2485
2486#define VOID_PTE (mfn_pte(0, __pgprot(0)))
2487static void xen_zap_pfn_range(unsigned long vaddr, unsigned int order,
2488 unsigned long *in_frames,
2489 unsigned long *out_frames)
2490{
2491 int i;
2492 struct multicall_space mcs;
2493
2494 xen_mc_batch();
2495 for (i = 0; i < (1UL<<order); i++, vaddr += PAGE_SIZE) {
2496 mcs = __xen_mc_entry(0);
2497
2498 if (in_frames)
2499 in_frames[i] = virt_to_mfn(vaddr);
2500
2501 MULTI_update_va_mapping(mcs.mc, vaddr, VOID_PTE, 0);
2502 __set_phys_to_machine(virt_to_pfn(vaddr), INVALID_P2M_ENTRY);
2503
2504 if (out_frames)
2505 out_frames[i] = virt_to_pfn(vaddr);
2506 }
2507 xen_mc_issue(0);
2508}
2509
2510/*
2511 * Update the pfn-to-mfn mappings for a virtual address range, either to
2512 * point to an array of mfns, or contiguously from a single starting
2513 * mfn.
2514 */
2515static void xen_remap_exchanged_ptes(unsigned long vaddr, int order,
2516 unsigned long *mfns,
2517 unsigned long first_mfn)
2518{
2519 unsigned i, limit;
2520 unsigned long mfn;
2521
2522 xen_mc_batch();
2523
2524 limit = 1u << order;
2525 for (i = 0; i < limit; i++, vaddr += PAGE_SIZE) {
2526 struct multicall_space mcs;
2527 unsigned flags;
2528
2529 mcs = __xen_mc_entry(0);
2530 if (mfns)
2531 mfn = mfns[i];
2532 else
2533 mfn = first_mfn + i;
2534
2535 if (i < (limit - 1))
2536 flags = 0;
2537 else {
2538 if (order == 0)
2539 flags = UVMF_INVLPG | UVMF_ALL;
2540 else
2541 flags = UVMF_TLB_FLUSH | UVMF_ALL;
2542 }
2543
2544 MULTI_update_va_mapping(mcs.mc, vaddr,
2545 mfn_pte(mfn, PAGE_KERNEL), flags);
2546
2547 set_phys_to_machine(virt_to_pfn(vaddr), mfn);
2548 }
2549
2550 xen_mc_issue(0);
2551}
2552
2553/*
2554 * Perform the hypercall to exchange a region of our pfns to point to
2555 * memory with the required contiguous alignment. Takes the pfns as
2556 * input, and populates mfns as output.
2557 *
2558 * Returns a success code indicating whether the hypervisor was able to
2559 * satisfy the request or not.
2560 */
2561static int xen_exchange_memory(unsigned long extents_in, unsigned int order_in,
2562 unsigned long *pfns_in,
2563 unsigned long extents_out,
2564 unsigned int order_out,
2565 unsigned long *mfns_out,
2566 unsigned int address_bits)
2567{
2568 long rc;
2569 int success;
2570
2571 struct xen_memory_exchange exchange = {
2572 .in = {
2573 .nr_extents = extents_in,
2574 .extent_order = order_in,
2575 .extent_start = pfns_in,
2576 .domid = DOMID_SELF
2577 },
2578 .out = {
2579 .nr_extents = extents_out,
2580 .extent_order = order_out,
2581 .extent_start = mfns_out,
2582 .address_bits = address_bits,
2583 .domid = DOMID_SELF
2584 }
2585 };
2586
2587 BUG_ON(extents_in << order_in != extents_out << order_out);
2588
2589 rc = HYPERVISOR_memory_op(XENMEM_exchange, &exchange);
2590 success = (exchange.nr_exchanged == extents_in);
2591
2592 BUG_ON(!success && ((exchange.nr_exchanged != 0) || (rc == 0)));
2593 BUG_ON(success && (rc != 0));
2594
2595 return success;
2596}
2597
2598int xen_create_contiguous_region(phys_addr_t pstart, unsigned int order,
2599 unsigned int address_bits,
2600 dma_addr_t *dma_handle)
2601{
2602 unsigned long *in_frames = discontig_frames, out_frame;
2603 unsigned long flags;
2604 int success;
2605 unsigned long vstart = (unsigned long)phys_to_virt(pstart);
2606
2607 /*
2608 * Currently an auto-translated guest will not perform I/O, nor will
2609 * it require PAE page directories below 4GB. Therefore any calls to
2610 * this function are redundant and can be ignored.
2611 */
2612
7e0563de
VK
2613 if (unlikely(order > MAX_CONTIG_ORDER))
2614 return -ENOMEM;
2615
2616 memset((void *) vstart, 0, PAGE_SIZE << order);
2617
2618 spin_lock_irqsave(&xen_reservation_lock, flags);
2619
2620 /* 1. Zap current PTEs, remembering MFNs. */
2621 xen_zap_pfn_range(vstart, order, in_frames, NULL);
2622
2623 /* 2. Get a new contiguous memory extent. */
2624 out_frame = virt_to_pfn(vstart);
2625 success = xen_exchange_memory(1UL << order, 0, in_frames,
2626 1, order, &out_frame,
2627 address_bits);
2628
2629 /* 3. Map the new extent in place of old pages. */
2630 if (success)
2631 xen_remap_exchanged_ptes(vstart, order, NULL, out_frame);
2632 else
2633 xen_remap_exchanged_ptes(vstart, order, in_frames, 0);
2634
2635 spin_unlock_irqrestore(&xen_reservation_lock, flags);
2636
2637 *dma_handle = virt_to_machine(vstart).maddr;
2638 return success ? 0 : -ENOMEM;
2639}
2640EXPORT_SYMBOL_GPL(xen_create_contiguous_region);
2641
2642void xen_destroy_contiguous_region(phys_addr_t pstart, unsigned int order)
2643{
2644 unsigned long *out_frames = discontig_frames, in_frame;
2645 unsigned long flags;
2646 int success;
2647 unsigned long vstart;
2648
7e0563de
VK
2649 if (unlikely(order > MAX_CONTIG_ORDER))
2650 return;
2651
2652 vstart = (unsigned long)phys_to_virt(pstart);
2653 memset((void *) vstart, 0, PAGE_SIZE << order);
2654
2655 spin_lock_irqsave(&xen_reservation_lock, flags);
2656
2657 /* 1. Find start MFN of contiguous extent. */
2658 in_frame = virt_to_mfn(vstart);
2659
2660 /* 2. Zap current PTEs. */
2661 xen_zap_pfn_range(vstart, order, NULL, out_frames);
2662
2663 /* 3. Do the exchange for non-contiguous MFNs. */
2664 success = xen_exchange_memory(1, order, &in_frame, 1UL << order,
2665 0, out_frames, 0);
2666
2667 /* 4. Map new pages in place of old pages. */
2668 if (success)
2669 xen_remap_exchanged_ptes(vstart, order, out_frames, 0);
2670 else
2671 xen_remap_exchanged_ptes(vstart, order, NULL, in_frame);
2672
2673 spin_unlock_irqrestore(&xen_reservation_lock, flags);
2674}
2675EXPORT_SYMBOL_GPL(xen_destroy_contiguous_region);
29985b09 2676
f030aade
JG
2677static noinline void xen_flush_tlb_all(void)
2678{
2679 struct mmuext_op *op;
2680 struct multicall_space mcs;
2681
2682 preempt_disable();
2683
2684 mcs = xen_mc_entry(sizeof(*op));
2685
2686 op = mcs.args;
2687 op->cmd = MMUEXT_TLB_FLUSH_ALL;
2688 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
2689
2690 xen_mc_issue(PARAVIRT_LAZY_MMU);
2691
2692 preempt_enable();
2693}
2694
2695#define REMAP_BATCH_SIZE 16
2696
2697struct remap_data {
2698 xen_pfn_t *pfn;
2699 bool contiguous;
2700 bool no_translate;
2701 pgprot_t prot;
2702 struct mmu_update *mmu_update;
2703};
2704
2705static int remap_area_pfn_pte_fn(pte_t *ptep, pgtable_t token,
2706 unsigned long addr, void *data)
2707{
2708 struct remap_data *rmd = data;
2709 pte_t pte = pte_mkspecial(mfn_pte(*rmd->pfn, rmd->prot));
2710
2711 /*
2712 * If we have a contiguous range, just update the pfn itself,
2713 * else update pointer to be "next pfn".
2714 */
2715 if (rmd->contiguous)
2716 (*rmd->pfn)++;
2717 else
2718 rmd->pfn++;
2719
2720 rmd->mmu_update->ptr = virt_to_machine(ptep).maddr;
2721 rmd->mmu_update->ptr |= rmd->no_translate ?
2722 MMU_PT_UPDATE_NO_TRANSLATE :
2723 MMU_NORMAL_PT_UPDATE;
2724 rmd->mmu_update->val = pte_val_ma(pte);
2725 rmd->mmu_update++;
2726
2727 return 0;
2728}
2729
2730int xen_remap_pfn(struct vm_area_struct *vma, unsigned long addr,
2731 xen_pfn_t *pfn, int nr, int *err_ptr, pgprot_t prot,
2732 unsigned int domid, bool no_translate, struct page **pages)
2733{
2734 int err = 0;
2735 struct remap_data rmd;
2736 struct mmu_update mmu_update[REMAP_BATCH_SIZE];
2737 unsigned long range;
2738 int mapped = 0;
2739
2740 BUG_ON(!((vma->vm_flags & (VM_PFNMAP | VM_IO)) == (VM_PFNMAP | VM_IO)));
2741
2742 rmd.pfn = pfn;
2743 rmd.prot = prot;
2744 /*
2745 * We use the err_ptr to indicate if there we are doing a contiguous
2746 * mapping or a discontigious mapping.
2747 */
2748 rmd.contiguous = !err_ptr;
2749 rmd.no_translate = no_translate;
2750
2751 while (nr) {
2752 int index = 0;
2753 int done = 0;
2754 int batch = min(REMAP_BATCH_SIZE, nr);
2755 int batch_left = batch;
2756
2757 range = (unsigned long)batch << PAGE_SHIFT;
2758
2759 rmd.mmu_update = mmu_update;
2760 err = apply_to_page_range(vma->vm_mm, addr, range,
2761 remap_area_pfn_pte_fn, &rmd);
2762 if (err)
2763 goto out;
2764
2765 /*
2766 * We record the error for each page that gives an error, but
2767 * continue mapping until the whole set is done
2768 */
2769 do {
2770 int i;
2771
2772 err = HYPERVISOR_mmu_update(&mmu_update[index],
2773 batch_left, &done, domid);
2774
2775 /*
2776 * @err_ptr may be the same buffer as @gfn, so
2777 * only clear it after each chunk of @gfn is
2778 * used.
2779 */
2780 if (err_ptr) {
2781 for (i = index; i < index + done; i++)
2782 err_ptr[i] = 0;
2783 }
2784 if (err < 0) {
2785 if (!err_ptr)
2786 goto out;
2787 err_ptr[i] = err;
2788 done++; /* Skip failed frame. */
2789 } else
2790 mapped += done;
2791 batch_left -= done;
2792 index += done;
2793 } while (batch_left);
2794
2795 nr -= batch;
2796 addr += range;
2797 if (err_ptr)
2798 err_ptr += batch;
2799 cond_resched();
2800 }
2801out:
2802
2803 xen_flush_tlb_all();
2804
2805 return err < 0 ? err : mapped;
2806}
2807EXPORT_SYMBOL_GPL(xen_remap_pfn);
2808
29985b09
JG
2809#ifdef CONFIG_KEXEC_CORE
2810phys_addr_t paddr_vmcoreinfo_note(void)
2811{
2812 if (xen_pv_domain())
203e9e41 2813 return virt_to_machine(vmcoreinfo_note).maddr;
29985b09 2814 else
203e9e41 2815 return __pa(vmcoreinfo_note);
29985b09
JG
2816}
2817#endif /* CONFIG_KEXEC_CORE */