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Merge tag 'drm/tegra/for-5.1-rc5' of git://anongit.freedesktop.org/tegra/linux into...
[thirdparty/kernel/stable.git] / drivers / net / ethernet / chelsio / cxgb4 / cxgb4_debugfs.c
CommitLineData
fd88b31a
HS		 1/*
2 * This file is part of the Chelsio T4 Ethernet driver for Linux.
3 *
4 * Copyright (c) 2003-2014 Chelsio Communications, Inc. All rights reserved.
5 *
6 * This software is available to you under a choice of one of two
7 * licenses. You may choose to be licensed under the terms of the GNU
8 * General Public License (GPL) Version 2, available from the file
9 * COPYING in the main directory of this source tree, or the
10 * OpenIB.org BSD license below:
11 *
12 * Redistribution and use in source and binary forms, with or
13 * without modification, are permitted provided that the following
14 * conditions are met:
15 *
16 * - Redistributions of source code must retain the above
17 * copyright notice, this list of conditions and the following
18 * disclaimer.
19 *
20 * - Redistributions in binary form must reproduce the above
21 * copyright notice, this list of conditions and the following
22 * disclaimer in the documentation and/or other materials
23 * provided with the distribution.
24 *
25 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
26 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
27 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
28 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
29 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
30 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
31 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
32 * SOFTWARE.
33 */
34
35#include <linux/seq_file.h>
36#include <linux/debugfs.h>
37#include <linux/string_helpers.h>
38#include <linux/sort.h>
688ea5fe 39#include <linux/ctype.h>
fd88b31a
HS		 40
41#include "cxgb4.h"
42#include "t4_regs.h"
bf7c781d 43#include "t4_values.h"
fd88b31a
HS		 44#include "t4fw_api.h"
45#include "cxgb4_debugfs.h"
b5a02f50 46#include "clip_tbl.h"
fd88b31a 47#include "l2t.h"
123e25c4
RL		 48#include "cudbg_if.h"
49#include "cudbg_lib_common.h"
50#include "cudbg_entity.h"
51#include "cudbg_lib.h"
fd88b31a 52
f1ff24aa
HS		 53/* generic seq_file support for showing a table of size rows x width. */
54static void *seq_tab_get_idx(struct seq_tab *tb, loff_t pos)
55{
56 pos -= tb->skip_first;
57 return pos >= tb->rows ? NULL : &tb->data[pos * tb->width];
58}
59
60static void *seq_tab_start(struct seq_file *seq, loff_t *pos)
61{
62 struct seq_tab *tb = seq->private;
63
64 if (tb->skip_first && *pos == 0)
65 return SEQ_START_TOKEN;
66
67 return seq_tab_get_idx(tb, *pos);
68}
69
70static void *seq_tab_next(struct seq_file *seq, void *v, loff_t *pos)
71{
72 v = seq_tab_get_idx(seq->private, *pos + 1);
73 if (v)
74 ++*pos;
75 return v;
76}
77
78static void seq_tab_stop(struct seq_file *seq, void *v)
79{
80}
81
82static int seq_tab_show(struct seq_file *seq, void *v)
83{
84 const struct seq_tab *tb = seq->private;
85
86 return tb->show(seq, v, ((char *)v - tb->data) / tb->width);
87}
88
89static const struct seq_operations seq_tab_ops = {
90 .start = seq_tab_start,
91 .next = seq_tab_next,
92 .stop = seq_tab_stop,
93 .show = seq_tab_show
94};
95
96struct seq_tab *seq_open_tab(struct file *f, unsigned int rows,
97 unsigned int width, unsigned int have_header,
98 int (*show)(struct seq_file *seq, void *v, int i))
99{
100 struct seq_tab *p;
101
102 p = __seq_open_private(f, &seq_tab_ops, sizeof(*p) + rows * width);
103 if (p) {
104 p->show = show;
105 p->rows = rows;
106 p->width = width;
107 p->skip_first = have_header != 0;
108 }
109 return p;
110}
111
c778af7d
HS		 112/* Trim the size of a seq_tab to the supplied number of rows. The operation is
113 * irreversible.
114 */
115static int seq_tab_trim(struct seq_tab *p, unsigned int new_rows)
116{
117 if (new_rows > p->rows)
118 return -EINVAL;
119 p->rows = new_rows;
120 return 0;
121}
122
f1ff24aa
HS		 123static int cim_la_show(struct seq_file *seq, void *v, int idx)
124{
125 if (v == SEQ_START_TOKEN)
126 seq_puts(seq, "Status Data PC LS0Stat LS0Addr "
127 " LS0Data\n");
128 else {
129 const u32 *p = v;
130
131 seq_printf(seq,
132 " %02x %x%07x %x%07x %08x %08x %08x%08x%08x%08x\n",
133 (p[0] >> 4) & 0xff, p[0] & 0xf, p[1] >> 4,
134 p[1] & 0xf, p[2] >> 4, p[2] & 0xf, p[3], p[4], p[5],
135 p[6], p[7]);
136 }
137 return 0;
138}
139
140static int cim_la_show_3in1(struct seq_file *seq, void *v, int idx)
141{
142 if (v == SEQ_START_TOKEN) {
143 seq_puts(seq, "Status Data PC\n");
144 } else {
145 const u32 *p = v;
146
147 seq_printf(seq, " %02x %08x %08x\n", p[5] & 0xff, p[6],
148 p[7]);
149 seq_printf(seq, " %02x %02x%06x %02x%06x\n",
150 (p[3] >> 8) & 0xff, p[3] & 0xff, p[4] >> 8,
151 p[4] & 0xff, p[5] >> 8);
152 seq_printf(seq, " %02x %x%07x %x%07x\n", (p[0] >> 4) & 0xff,
153 p[0] & 0xf, p[1] >> 4, p[1] & 0xf, p[2] >> 4);
154 }
155 return 0;
156}
157
b7660642
HS		 158static int cim_la_show_t6(struct seq_file *seq, void *v, int idx)
159{
160 if (v == SEQ_START_TOKEN) {
161 seq_puts(seq, "Status Inst Data PC LS0Stat "
162 "LS0Addr LS0Data LS1Stat LS1Addr LS1Data\n");
163 } else {
164 const u32 *p = v;
165
166 seq_printf(seq, " %02x %04x%04x %04x%04x %04x%04x %08x %08x %08x %08x %08x %08x\n",
167 (p[9] >> 16) & 0xff, /* Status */
168 p[9] & 0xffff, p[8] >> 16, /* Inst */
169 p[8] & 0xffff, p[7] >> 16, /* Data */
170 p[7] & 0xffff, p[6] >> 16, /* PC */
171 p[2], p[1], p[0], /* LS0 Stat, Addr and Data */
172 p[5], p[4], p[3]); /* LS1 Stat, Addr and Data */
173 }
174 return 0;
175}
176
177static int cim_la_show_pc_t6(struct seq_file *seq, void *v, int idx)
178{
179 if (v == SEQ_START_TOKEN) {
180 seq_puts(seq, "Status Inst Data PC\n");
181 } else {
182 const u32 *p = v;
183
184 seq_printf(seq, " %02x %08x %08x %08x\n",
185 p[3] & 0xff, p[2], p[1], p[0]);
186 seq_printf(seq, " %02x %02x%06x %02x%06x %02x%06x\n",
187 (p[6] >> 8) & 0xff, p[6] & 0xff, p[5] >> 8,
188 p[5] & 0xff, p[4] >> 8, p[4] & 0xff, p[3] >> 8);
189 seq_printf(seq, " %02x %04x%04x %04x%04x %04x%04x\n",
190 (p[9] >> 16) & 0xff, p[9] & 0xffff, p[8] >> 16,
191 p[8] & 0xffff, p[7] >> 16, p[7] & 0xffff,
192 p[6] >> 16);
193 }
194 return 0;
195}
196
f1ff24aa
HS		 197static int cim_la_open(struct inode *inode, struct file *file)
198{
199 int ret;
200 unsigned int cfg;
201 struct seq_tab *p;
202 struct adapter *adap = inode->i_private;
203
204 ret = t4_cim_read(adap, UP_UP_DBG_LA_CFG_A, 1, &cfg);
205 if (ret)
206 return ret;
207
b7660642
HS		 208 if (is_t6(adap->params.chip)) {
209 /* +1 to account for integer division of CIMLA_SIZE/10 */
210 p = seq_open_tab(file, (adap->params.cim_la_size / 10) + 1,
211 10 * sizeof(u32), 1,
212 cfg & UPDBGLACAPTPCONLY_F ?
213 cim_la_show_pc_t6 : cim_la_show_t6);
214 } else {
215 p = seq_open_tab(file, adap->params.cim_la_size / 8,
216 8 * sizeof(u32), 1,
217 cfg & UPDBGLACAPTPCONLY_F ? cim_la_show_3in1 :
218 cim_la_show);
219 }
f1ff24aa
HS		 220 if (!p)
221 return -ENOMEM;
222
223 ret = t4_cim_read_la(adap, (u32 *)p->data, NULL);
224 if (ret)
225 seq_release_private(inode, file);
226 return ret;
227}
228
229static const struct file_operations cim_la_fops = {
230 .owner = THIS_MODULE,
231 .open = cim_la_open,
232 .read = seq_read,
233 .llseek = seq_lseek,
234 .release = seq_release_private
235};
236
19689609
HS		 237static int cim_pif_la_show(struct seq_file *seq, void *v, int idx)
238{
239 const u32 *p = v;
240
241 if (v == SEQ_START_TOKEN) {
242 seq_puts(seq, "Cntl ID DataBE Addr Data\n");
243 } else if (idx < CIM_PIFLA_SIZE) {
244 seq_printf(seq, " %02x %02x %04x %08x %08x%08x%08x%08x\n",
245 (p[5] >> 22) & 0xff, (p[5] >> 16) & 0x3f,
246 p[5] & 0xffff, p[4], p[3], p[2], p[1], p[0]);
247 } else {
248 if (idx == CIM_PIFLA_SIZE)
249 seq_puts(seq, "\nCntl ID Data\n");
250 seq_printf(seq, " %02x %02x %08x%08x%08x%08x\n",
251 (p[4] >> 6) & 0xff, p[4] & 0x3f,
252 p[3], p[2], p[1], p[0]);
253 }
254 return 0;
255}
256
257static int cim_pif_la_open(struct inode *inode, struct file *file)
258{
259 struct seq_tab *p;
260 struct adapter *adap = inode->i_private;
261
262 p = seq_open_tab(file, 2 * CIM_PIFLA_SIZE, 6 * sizeof(u32), 1,
263 cim_pif_la_show);
264 if (!p)
265 return -ENOMEM;
266
267 t4_cim_read_pif_la(adap, (u32 *)p->data,
268 (u32 *)p->data + 6 * CIM_PIFLA_SIZE, NULL, NULL);
269 return 0;
270}
271
272static const struct file_operations cim_pif_la_fops = {
273 .owner = THIS_MODULE,
274 .open = cim_pif_la_open,
275 .read = seq_read,
276 .llseek = seq_lseek,
277 .release = seq_release_private
278};
279
26fae93f
HS		 280static int cim_ma_la_show(struct seq_file *seq, void *v, int idx)
281{
282 const u32 *p = v;
283
284 if (v == SEQ_START_TOKEN) {
285 seq_puts(seq, "\n");
286 } else if (idx < CIM_MALA_SIZE) {
287 seq_printf(seq, "%02x%08x%08x%08x%08x\n",
288 p[4], p[3], p[2], p[1], p[0]);
289 } else {
290 if (idx == CIM_MALA_SIZE)
291 seq_puts(seq,
292 "\nCnt ID Tag UE Data RDY VLD\n");
293 seq_printf(seq, "%3u %2u %x %u %08x%08x %u %u\n",
294 (p[2] >> 10) & 0xff, (p[2] >> 7) & 7,
295 (p[2] >> 3) & 0xf, (p[2] >> 2) & 1,
296 (p[1] >> 2) | ((p[2] & 3) << 30),
297 (p[0] >> 2) | ((p[1] & 3) << 30), (p[0] >> 1) & 1,
298 p[0] & 1);
299 }
300 return 0;
301}
302
303static int cim_ma_la_open(struct inode *inode, struct file *file)
304{
305 struct seq_tab *p;
306 struct adapter *adap = inode->i_private;
307
308 p = seq_open_tab(file, 2 * CIM_MALA_SIZE, 5 * sizeof(u32), 1,
309 cim_ma_la_show);
310 if (!p)
311 return -ENOMEM;
312
313 t4_cim_read_ma_la(adap, (u32 *)p->data,
314 (u32 *)p->data + 5 * CIM_MALA_SIZE);
315 return 0;
316}
317
318static const struct file_operations cim_ma_la_fops = {
319 .owner = THIS_MODULE,
320 .open = cim_ma_la_open,
321 .read = seq_read,
322 .llseek = seq_lseek,
323 .release = seq_release_private
324};
325
74b3092c
HS		 326static int cim_qcfg_show(struct seq_file *seq, void *v)
327{
328 static const char * const qname[] = {
329 "TP0", "TP1", "ULP", "SGE0", "SGE1", "NC-SI",
330 "ULP0", "ULP1", "ULP2", "ULP3", "SGE", "NC-SI",
331 "SGE0-RX", "SGE1-RX"
332 };
333
334 int i;
335 struct adapter *adap = seq->private;
336 u16 base[CIM_NUM_IBQ + CIM_NUM_OBQ_T5];
337 u16 size[CIM_NUM_IBQ + CIM_NUM_OBQ_T5];
338 u32 stat[(4 * (CIM_NUM_IBQ + CIM_NUM_OBQ_T5))];
339 u16 thres[CIM_NUM_IBQ];
340 u32 obq_wr_t4[2 * CIM_NUM_OBQ], *wr;
341 u32 obq_wr_t5[2 * CIM_NUM_OBQ_T5];
342 u32 *p = stat;
343 int cim_num_obq = is_t4(adap->params.chip) ?
344 CIM_NUM_OBQ : CIM_NUM_OBQ_T5;
345
346 i = t4_cim_read(adap, is_t4(adap->params.chip) ? UP_IBQ_0_RDADDR_A :
347 UP_IBQ_0_SHADOW_RDADDR_A,
348 ARRAY_SIZE(stat), stat);
349 if (!i) {
350 if (is_t4(adap->params.chip)) {
351 i = t4_cim_read(adap, UP_OBQ_0_REALADDR_A,
352 ARRAY_SIZE(obq_wr_t4), obq_wr_t4);
2f3a8732 353 wr = obq_wr_t4;
74b3092c
HS		 354 } else {
355 i = t4_cim_read(adap, UP_OBQ_0_SHADOW_REALADDR_A,
356 ARRAY_SIZE(obq_wr_t5), obq_wr_t5);
2f3a8732 357 wr = obq_wr_t5;
74b3092c
HS		 358 }
359 }
360 if (i)
361 return i;
362
363 t4_read_cimq_cfg(adap, base, size, thres);
364
365 seq_printf(seq,
366 " Queue Base Size Thres RdPtr WrPtr SOP EOP Avail\n");
367 for (i = 0; i < CIM_NUM_IBQ; i++, p += 4)
368 seq_printf(seq, "%7s %5x %5u %5u %6x %4x %4u %4u %5u\n",
369 qname[i], base[i], size[i], thres[i],
370 IBQRDADDR_G(p[0]), IBQWRADDR_G(p[1]),
371 QUESOPCNT_G(p[3]), QUEEOPCNT_G(p[3]),
372 QUEREMFLITS_G(p[2]) * 16);
373 for ( ; i < CIM_NUM_IBQ + cim_num_obq; i++, p += 4, wr += 2)
374 seq_printf(seq, "%7s %5x %5u %12x %4x %4u %4u %5u\n",
375 qname[i], base[i], size[i],
376 QUERDADDR_G(p[0]) & 0x3fff, wr[0] - base[i],
377 QUESOPCNT_G(p[3]), QUEEOPCNT_G(p[3]),
378 QUEREMFLITS_G(p[2]) * 16);
379 return 0;
380}
b09026c6 381DEFINE_SHOW_ATTRIBUTE(cim_qcfg);
74b3092c 382
e5f0e43b
HS		 383static int cimq_show(struct seq_file *seq, void *v, int idx)
384{
385 const u32 *p = v;
386
387 seq_printf(seq, "%#06x: %08x %08x %08x %08x\n", idx * 16, p[0], p[1],
388 p[2], p[3]);
389 return 0;
390}
391
392static int cim_ibq_open(struct inode *inode, struct file *file)
393{
394 int ret;
395 struct seq_tab *p;
396 unsigned int qid = (uintptr_t)inode->i_private & 7;
397 struct adapter *adap = inode->i_private - qid;
398
399 p = seq_open_tab(file, CIM_IBQ_SIZE, 4 * sizeof(u32), 0, cimq_show);
400 if (!p)
401 return -ENOMEM;
402
403 ret = t4_read_cim_ibq(adap, qid, (u32 *)p->data, CIM_IBQ_SIZE * 4);
404 if (ret < 0)
405 seq_release_private(inode, file);
406 else
407 ret = 0;
408 return ret;
409}
410
411static const struct file_operations cim_ibq_fops = {
412 .owner = THIS_MODULE,
413 .open = cim_ibq_open,
414 .read = seq_read,
415 .llseek = seq_lseek,
416 .release = seq_release_private
417};
418
c778af7d
HS		 419static int cim_obq_open(struct inode *inode, struct file *file)
420{
421 int ret;
422 struct seq_tab *p;
423 unsigned int qid = (uintptr_t)inode->i_private & 7;
424 struct adapter *adap = inode->i_private - qid;
425
426 p = seq_open_tab(file, 6 * CIM_OBQ_SIZE, 4 * sizeof(u32), 0, cimq_show);
427 if (!p)
428 return -ENOMEM;
429
430 ret = t4_read_cim_obq(adap, qid, (u32 *)p->data, 6 * CIM_OBQ_SIZE * 4);
431 if (ret < 0) {
432 seq_release_private(inode, file);
433 } else {
434 seq_tab_trim(p, ret / 4);
435 ret = 0;
436 }
437 return ret;
438}
439
440static const struct file_operations cim_obq_fops = {
441 .owner = THIS_MODULE,
442 .open = cim_obq_open,
443 .read = seq_read,
444 .llseek = seq_lseek,
445 .release = seq_release_private
446};
447
2d277b3b
HS		 448struct field_desc {
449 const char *name;
450 unsigned int start;
451 unsigned int width;
452};
453
454static void field_desc_show(struct seq_file *seq, u64 v,
455 const struct field_desc *p)
456{
457 char buf[32];
458 int line_size = 0;
459
460 while (p->name) {
461 u64 mask = (1ULL << p->width) - 1;
462 int len = scnprintf(buf, sizeof(buf), "%s: %llu", p->name,
463 ((unsigned long long)v >> p->start) & mask);
464
465 if (line_size + len >= 79) {
466 line_size = 8;
467 seq_puts(seq, "\n ");
468 }
469 seq_printf(seq, "%s ", buf);
470 line_size += len + 1;
471 p++;
472 }
473 seq_putc(seq, '\n');
474}
475
476static struct field_desc tp_la0[] = {
477 { "RcfOpCodeOut", 60, 4 },
478 { "State", 56, 4 },
479 { "WcfState", 52, 4 },
480 { "RcfOpcSrcOut", 50, 2 },
481 { "CRxError", 49, 1 },
482 { "ERxError", 48, 1 },
483 { "SanityFailed", 47, 1 },
484 { "SpuriousMsg", 46, 1 },
485 { "FlushInputMsg", 45, 1 },
486 { "FlushInputCpl", 44, 1 },
487 { "RssUpBit", 43, 1 },
488 { "RssFilterHit", 42, 1 },
489 { "Tid", 32, 10 },
490 { "InitTcb", 31, 1 },
491 { "LineNumber", 24, 7 },
492 { "Emsg", 23, 1 },
493 { "EdataOut", 22, 1 },
494 { "Cmsg", 21, 1 },
495 { "CdataOut", 20, 1 },
496 { "EreadPdu", 19, 1 },
497 { "CreadPdu", 18, 1 },
498 { "TunnelPkt", 17, 1 },
499 { "RcfPeerFin", 16, 1 },
500 { "RcfReasonOut", 12, 4 },
501 { "TxCchannel", 10, 2 },
502 { "RcfTxChannel", 8, 2 },
503 { "RxEchannel", 6, 2 },
504 { "RcfRxChannel", 5, 1 },
505 { "RcfDataOutSrdy", 4, 1 },
506 { "RxDvld", 3, 1 },
507 { "RxOoDvld", 2, 1 },
508 { "RxCongestion", 1, 1 },
509 { "TxCongestion", 0, 1 },
510 { NULL }
511};
512
513static int tp_la_show(struct seq_file *seq, void *v, int idx)
514{
515 const u64 *p = v;
516
517 field_desc_show(seq, *p, tp_la0);
518 return 0;
519}
520
521static int tp_la_show2(struct seq_file *seq, void *v, int idx)
522{
523 const u64 *p = v;
524
525 if (idx)
526 seq_putc(seq, '\n');
527 field_desc_show(seq, p[0], tp_la0);
528 if (idx < (TPLA_SIZE / 2 - 1) || p[1] != ~0ULL)
529 field_desc_show(seq, p[1], tp_la0);
530 return 0;
531}
532
533static int tp_la_show3(struct seq_file *seq, void *v, int idx)
534{
535 static struct field_desc tp_la1[] = {
536 { "CplCmdIn", 56, 8 },
537 { "CplCmdOut", 48, 8 },
538 { "ESynOut", 47, 1 },
539 { "EAckOut", 46, 1 },
540 { "EFinOut", 45, 1 },
541 { "ERstOut", 44, 1 },
542 { "SynIn", 43, 1 },
543 { "AckIn", 42, 1 },
544 { "FinIn", 41, 1 },
545 { "RstIn", 40, 1 },
546 { "DataIn", 39, 1 },
547 { "DataInVld", 38, 1 },
548 { "PadIn", 37, 1 },
549 { "RxBufEmpty", 36, 1 },
550 { "RxDdp", 35, 1 },
551 { "RxFbCongestion", 34, 1 },
552 { "TxFbCongestion", 33, 1 },
553 { "TxPktSumSrdy", 32, 1 },
554 { "RcfUlpType", 28, 4 },
555 { "Eread", 27, 1 },
556 { "Ebypass", 26, 1 },
557 { "Esave", 25, 1 },
558 { "Static0", 24, 1 },
559 { "Cread", 23, 1 },
560 { "Cbypass", 22, 1 },
561 { "Csave", 21, 1 },
562 { "CPktOut", 20, 1 },
563 { "RxPagePoolFull", 18, 2 },
564 { "RxLpbkPkt", 17, 1 },
565 { "TxLpbkPkt", 16, 1 },
566 { "RxVfValid", 15, 1 },
567 { "SynLearned", 14, 1 },
568 { "SetDelEntry", 13, 1 },
569 { "SetInvEntry", 12, 1 },
570 { "CpcmdDvld", 11, 1 },
571 { "CpcmdSave", 10, 1 },
572 { "RxPstructsFull", 8, 2 },
573 { "EpcmdDvld", 7, 1 },
574 { "EpcmdFlush", 6, 1 },
575 { "EpcmdTrimPrefix", 5, 1 },
576 { "EpcmdTrimPostfix", 4, 1 },
577 { "ERssIp4Pkt", 3, 1 },
578 { "ERssIp6Pkt", 2, 1 },
579 { "ERssTcpUdpPkt", 1, 1 },
580 { "ERssFceFipPkt", 0, 1 },
581 { NULL }
582 };
583 static struct field_desc tp_la2[] = {
584 { "CplCmdIn", 56, 8 },
585 { "MpsVfVld", 55, 1 },
586 { "MpsPf", 52, 3 },
587 { "MpsVf", 44, 8 },
588 { "SynIn", 43, 1 },
589 { "AckIn", 42, 1 },
590 { "FinIn", 41, 1 },
591 { "RstIn", 40, 1 },
592 { "DataIn", 39, 1 },
593 { "DataInVld", 38, 1 },
594 { "PadIn", 37, 1 },
595 { "RxBufEmpty", 36, 1 },
596 { "RxDdp", 35, 1 },
597 { "RxFbCongestion", 34, 1 },
598 { "TxFbCongestion", 33, 1 },
599 { "TxPktSumSrdy", 32, 1 },
600 { "RcfUlpType", 28, 4 },
601 { "Eread", 27, 1 },
602 { "Ebypass", 26, 1 },
603 { "Esave", 25, 1 },
604 { "Static0", 24, 1 },
605 { "Cread", 23, 1 },
606 { "Cbypass", 22, 1 },
607 { "Csave", 21, 1 },
608 { "CPktOut", 20, 1 },
609 { "RxPagePoolFull", 18, 2 },
610 { "RxLpbkPkt", 17, 1 },
611 { "TxLpbkPkt", 16, 1 },
612 { "RxVfValid", 15, 1 },
613 { "SynLearned", 14, 1 },
614 { "SetDelEntry", 13, 1 },
615 { "SetInvEntry", 12, 1 },
616 { "CpcmdDvld", 11, 1 },
617 { "CpcmdSave", 10, 1 },
618 { "RxPstructsFull", 8, 2 },
619 { "EpcmdDvld", 7, 1 },
620 { "EpcmdFlush", 6, 1 },
621 { "EpcmdTrimPrefix", 5, 1 },
622 { "EpcmdTrimPostfix", 4, 1 },
623 { "ERssIp4Pkt", 3, 1 },
624 { "ERssIp6Pkt", 2, 1 },
625 { "ERssTcpUdpPkt", 1, 1 },
626 { "ERssFceFipPkt", 0, 1 },
627 { NULL }
628 };
629 const u64 *p = v;
630
631 if (idx)
632 seq_putc(seq, '\n');
633 field_desc_show(seq, p[0], tp_la0);
634 if (idx < (TPLA_SIZE / 2 - 1) || p[1] != ~0ULL)
635 field_desc_show(seq, p[1], (p[0] & BIT(17)) ? tp_la2 : tp_la1);
636 return 0;
637}
638
639static int tp_la_open(struct inode *inode, struct file *file)
640{
641 struct seq_tab *p;
642 struct adapter *adap = inode->i_private;
643
644 switch (DBGLAMODE_G(t4_read_reg(adap, TP_DBG_LA_CONFIG_A))) {
645 case 2:
646 p = seq_open_tab(file, TPLA_SIZE / 2, 2 * sizeof(u64), 0,
647 tp_la_show2);
648 break;
649 case 3:
650 p = seq_open_tab(file, TPLA_SIZE / 2, 2 * sizeof(u64), 0,
651 tp_la_show3);
652 break;
653 default:
654 p = seq_open_tab(file, TPLA_SIZE, sizeof(u64), 0, tp_la_show);
655 }
656 if (!p)
657 return -ENOMEM;
658
659 t4_tp_read_la(adap, (u64 *)p->data, NULL);
660 return 0;
661}
662
663static ssize_t tp_la_write(struct file *file, const char __user *buf,
664 size_t count, loff_t *pos)
665{
666 int err;
667 char s[32];
668 unsigned long val;
669 size_t size = min(sizeof(s) - 1, count);
c1d81b1c 670 struct adapter *adap = file_inode(file)->i_private;
2d277b3b
HS		 671
672 if (copy_from_user(s, buf, size))
673 return -EFAULT;
674 s[size] = '\0';
675 err = kstrtoul(s, 0, &val);
676 if (err)
677 return err;
678 if (val > 0xffff)
679 return -EINVAL;
680 adap->params.tp.la_mask = val << 16;
681 t4_set_reg_field(adap, TP_DBG_LA_CONFIG_A, 0xffff0000U,
682 adap->params.tp.la_mask);
683 return count;
684}
685
686static const struct file_operations tp_la_fops = {
687 .owner = THIS_MODULE,
688 .open = tp_la_open,
689 .read = seq_read,
690 .llseek = seq_lseek,
691 .release = seq_release_private,
692 .write = tp_la_write
693};
694
797ff0f5
HS		 695static int ulprx_la_show(struct seq_file *seq, void *v, int idx)
696{
697 const u32 *p = v;
698
699 if (v == SEQ_START_TOKEN)
700 seq_puts(seq, " Pcmd Type Message"
701 " Data\n");
702 else
703 seq_printf(seq, "%08x%08x %4x %08x %08x%08x%08x%08x\n",
704 p[1], p[0], p[2], p[3], p[7], p[6], p[5], p[4]);
705 return 0;
706}
707
708static int ulprx_la_open(struct inode *inode, struct file *file)
709{
710 struct seq_tab *p;
711 struct adapter *adap = inode->i_private;
712
713 p = seq_open_tab(file, ULPRX_LA_SIZE, 8 * sizeof(u32), 1,
714 ulprx_la_show);
715 if (!p)
716 return -ENOMEM;
717
718 t4_ulprx_read_la(adap, (u32 *)p->data);
719 return 0;
720}
721
722static const struct file_operations ulprx_la_fops = {
723 .owner = THIS_MODULE,
724 .open = ulprx_la_open,
725 .read = seq_read,
726 .llseek = seq_lseek,
727 .release = seq_release_private
728};
729
b3bbe36a
HS		 730/* Show the PM memory stats. These stats include:
731 *
732 * TX:
733 * Read: memory read operation
734 * Write Bypass: cut-through
735 * Bypass + mem: cut-through and save copy
736 *
737 * RX:
738 * Read: memory read
739 * Write Bypass: cut-through
740 * Flush: payload trim or drop
741 */
742static int pm_stats_show(struct seq_file *seq, void *v)
743{
744 static const char * const tx_pm_stats[] = {
745 "Read:", "Write bypass:", "Write mem:", "Bypass + mem:"
746 };
747 static const char * const rx_pm_stats[] = {
748 "Read:", "Write bypass:", "Write mem:", "Flush:"
749 };
750
751 int i;
44588560
HS		 752 u32 tx_cnt[T6_PM_NSTATS], rx_cnt[T6_PM_NSTATS];
753 u64 tx_cyc[T6_PM_NSTATS], rx_cyc[T6_PM_NSTATS];
b3bbe36a
HS		 754 struct adapter *adap = seq->private;
755
756 t4_pmtx_get_stats(adap, tx_cnt, tx_cyc);
757 t4_pmrx_get_stats(adap, rx_cnt, rx_cyc);
758
759 seq_printf(seq, "%13s %10s %20s\n", " ", "Tx pcmds", "Tx bytes");
760 for (i = 0; i < PM_NSTATS - 1; i++)
761 seq_printf(seq, "%-13s %10u %20llu\n",
762 tx_pm_stats[i], tx_cnt[i], tx_cyc[i]);
763
764 seq_printf(seq, "%13s %10s %20s\n", " ", "Rx pcmds", "Rx bytes");
765 for (i = 0; i < PM_NSTATS - 1; i++)
766 seq_printf(seq, "%-13s %10u %20llu\n",
767 rx_pm_stats[i], rx_cnt[i], rx_cyc[i]);
44588560
HS		 768
769 if (CHELSIO_CHIP_VERSION(adap->params.chip) > CHELSIO_T5) {
770 /* In T5 the granularity of the total wait is too fine.
771 * It is not useful as it reaches the max value too fast.
772 * Hence display this Input FIFO wait for T6 onwards.
773 */
774 seq_printf(seq, "%13s %10s %20s\n",
775 " ", "Total wait", "Total Occupancy");
776 seq_printf(seq, "Tx FIFO wait %10u %20llu\n",
777 tx_cnt[i], tx_cyc[i]);
778 seq_printf(seq, "Rx FIFO wait %10u %20llu\n",
779 rx_cnt[i], rx_cyc[i]);
780
781 /* Skip index 6 as there is nothing useful ihere */
782 i += 2;
783
784 /* At index 7, a new stat for read latency (count, total wait)
785 * is added.
786 */
787 seq_printf(seq, "%13s %10s %20s\n",
788 " ", "Reads", "Total wait");
789 seq_printf(seq, "Tx latency %10u %20llu\n",
790 tx_cnt[i], tx_cyc[i]);
791 seq_printf(seq, "Rx latency %10u %20llu\n",
792 rx_cnt[i], rx_cyc[i]);
793 }
b3bbe36a
HS		 794 return 0;
795}
796
797static int pm_stats_open(struct inode *inode, struct file *file)
798{
799 return single_open(file, pm_stats_show, inode->i_private);
800}
801
802static ssize_t pm_stats_clear(struct file *file, const char __user *buf,
803 size_t count, loff_t *pos)
804{
c1d81b1c 805 struct adapter *adap = file_inode(file)->i_private;
b3bbe36a
HS		 806
807 t4_write_reg(adap, PM_RX_STAT_CONFIG_A, 0);
808 t4_write_reg(adap, PM_TX_STAT_CONFIG_A, 0);
809 return count;
810}
811
812static const struct file_operations pm_stats_debugfs_fops = {
813 .owner = THIS_MODULE,
814 .open = pm_stats_open,
815 .read = seq_read,
816 .llseek = seq_lseek,
817 .release = single_release,
818 .write = pm_stats_clear
819};
820
7864026b
HS		 821static int tx_rate_show(struct seq_file *seq, void *v)
822{
823 u64 nrate[NCHAN], orate[NCHAN];
824 struct adapter *adap = seq->private;
825
826 t4_get_chan_txrate(adap, nrate, orate);
827 if (adap->params.arch.nchan == NCHAN) {
828 seq_puts(seq, " channel 0 channel 1 "
829 "channel 2 channel 3\n");
830 seq_printf(seq, "NIC B/s: %10llu %10llu %10llu %10llu\n",
831 (unsigned long long)nrate[0],
832 (unsigned long long)nrate[1],
833 (unsigned long long)nrate[2],
834 (unsigned long long)nrate[3]);
835 seq_printf(seq, "Offload B/s: %10llu %10llu %10llu %10llu\n",
836 (unsigned long long)orate[0],
837 (unsigned long long)orate[1],
838 (unsigned long long)orate[2],
839 (unsigned long long)orate[3]);
840 } else {
841 seq_puts(seq, " channel 0 channel 1\n");
842 seq_printf(seq, "NIC B/s: %10llu %10llu\n",
843 (unsigned long long)nrate[0],
844 (unsigned long long)nrate[1]);
845 seq_printf(seq, "Offload B/s: %10llu %10llu\n",
846 (unsigned long long)orate[0],
847 (unsigned long long)orate[1]);
848 }
849 return 0;
850}
b09026c6 851DEFINE_SHOW_ATTRIBUTE(tx_rate);
7864026b 852
bad43792
HS		 853static int cctrl_tbl_show(struct seq_file *seq, void *v)
854{
855 static const char * const dec_fac[] = {
856 "0.5", "0.5625", "0.625", "0.6875", "0.75", "0.8125", "0.875",
857 "0.9375" };
858
859 int i;
dde93dfe 860 u16 (*incr)[NCCTRL_WIN];
bad43792
HS		 861 struct adapter *adap = seq->private;
862
6da2ec56 863 incr = kmalloc_array(NMTUS, sizeof(*incr), GFP_KERNEL);
dde93dfe
HS		 864 if (!incr)
865 return -ENOMEM;
866
bad43792
HS		 867 t4_read_cong_tbl(adap, incr);
868
869 for (i = 0; i < NCCTRL_WIN; ++i) {
870 seq_printf(seq, "%2d: %4u %4u %4u %4u %4u %4u %4u %4u\n", i,
871 incr[0][i], incr[1][i], incr[2][i], incr[3][i],
872 incr[4][i], incr[5][i], incr[6][i], incr[7][i]);
873 seq_printf(seq, "%8u %4u %4u %4u %4u %4u %4u %4u %5u %s\n",
874 incr[8][i], incr[9][i], incr[10][i], incr[11][i],
875 incr[12][i], incr[13][i], incr[14][i], incr[15][i],
876 adap->params.a_wnd[i],
877 dec_fac[adap->params.b_wnd[i]]);
878 }
dde93dfe
HS		 879
880 kfree(incr);
bad43792
HS		 881 return 0;
882}
b09026c6 883DEFINE_SHOW_ATTRIBUTE(cctrl_tbl);
bad43792 884
b58b6676
HS		 885/* Format a value in a unit that differs from the value's native unit by the
886 * given factor.
887 */
888static char *unit_conv(char *buf, size_t len, unsigned int val,
889 unsigned int factor)
890{
891 unsigned int rem = val % factor;
892
893 if (rem == 0) {
894 snprintf(buf, len, "%u", val / factor);
895 } else {
896 while (rem % 10 == 0)
897 rem /= 10;
898 snprintf(buf, len, "%u.%u", val / factor, rem);
899 }
900 return buf;
901}
902
903static int clk_show(struct seq_file *seq, void *v)
904{
905 char buf[32];
906 struct adapter *adap = seq->private;
907 unsigned int cclk_ps = 1000000000 / adap->params.vpd.cclk; /* in ps */
908 u32 res = t4_read_reg(adap, TP_TIMER_RESOLUTION_A);
909 unsigned int tre = TIMERRESOLUTION_G(res);
910 unsigned int dack_re = DELAYEDACKRESOLUTION_G(res);
911 unsigned long long tp_tick_us = (cclk_ps << tre) / 1000000; /* in us */
912
913 seq_printf(seq, "Core clock period: %s ns\n",
914 unit_conv(buf, sizeof(buf), cclk_ps, 1000));
915 seq_printf(seq, "TP timer tick: %s us\n",
916 unit_conv(buf, sizeof(buf), (cclk_ps << tre), 1000000));
917 seq_printf(seq, "TCP timestamp tick: %s us\n",
918 unit_conv(buf, sizeof(buf),
919 (cclk_ps << TIMESTAMPRESOLUTION_G(res)), 1000000));
920 seq_printf(seq, "DACK tick: %s us\n",
921 unit_conv(buf, sizeof(buf), (cclk_ps << dack_re), 1000000));
922 seq_printf(seq, "DACK timer: %u us\n",
923 ((cclk_ps << dack_re) / 1000000) *
924 t4_read_reg(adap, TP_DACK_TIMER_A));
925 seq_printf(seq, "Retransmit min: %llu us\n",
926 tp_tick_us * t4_read_reg(adap, TP_RXT_MIN_A));
927 seq_printf(seq, "Retransmit max: %llu us\n",
928 tp_tick_us * t4_read_reg(adap, TP_RXT_MAX_A));
929 seq_printf(seq, "Persist timer min: %llu us\n",
930 tp_tick_us * t4_read_reg(adap, TP_PERS_MIN_A));
931 seq_printf(seq, "Persist timer max: %llu us\n",
932 tp_tick_us * t4_read_reg(adap, TP_PERS_MAX_A));
933 seq_printf(seq, "Keepalive idle timer: %llu us\n",
934 tp_tick_us * t4_read_reg(adap, TP_KEEP_IDLE_A));
935 seq_printf(seq, "Keepalive interval: %llu us\n",
936 tp_tick_us * t4_read_reg(adap, TP_KEEP_INTVL_A));
937 seq_printf(seq, "Initial SRTT: %llu us\n",
938 tp_tick_us * INITSRTT_G(t4_read_reg(adap, TP_INIT_SRTT_A)));
939 seq_printf(seq, "FINWAIT2 timer: %llu us\n",
940 tp_tick_us * t4_read_reg(adap, TP_FINWAIT2_TIMER_A));
941
942 return 0;
943}
b09026c6 944DEFINE_SHOW_ATTRIBUTE(clk);
b58b6676 945
f1ff24aa 946/* Firmware Device Log dump. */
49aa284f
HS		 947static const char * const devlog_level_strings[] = {
948 [FW_DEVLOG_LEVEL_EMERG] = "EMERG",
949 [FW_DEVLOG_LEVEL_CRIT] = "CRIT",
950 [FW_DEVLOG_LEVEL_ERR] = "ERR",
951 [FW_DEVLOG_LEVEL_NOTICE] = "NOTICE",
952 [FW_DEVLOG_LEVEL_INFO] = "INFO",
953 [FW_DEVLOG_LEVEL_DEBUG] = "DEBUG"
954};
955
956static const char * const devlog_facility_strings[] = {
957 [FW_DEVLOG_FACILITY_CORE] = "CORE",
da4976e1 958 [FW_DEVLOG_FACILITY_CF] = "CF",
49aa284f
HS		 959 [FW_DEVLOG_FACILITY_SCHED] = "SCHED",
960 [FW_DEVLOG_FACILITY_TIMER] = "TIMER",
961 [FW_DEVLOG_FACILITY_RES] = "RES",
962 [FW_DEVLOG_FACILITY_HW] = "HW",
963 [FW_DEVLOG_FACILITY_FLR] = "FLR",
964 [FW_DEVLOG_FACILITY_DMAQ] = "DMAQ",
965 [FW_DEVLOG_FACILITY_PHY] = "PHY",
966 [FW_DEVLOG_FACILITY_MAC] = "MAC",
967 [FW_DEVLOG_FACILITY_PORT] = "PORT",
968 [FW_DEVLOG_FACILITY_VI] = "VI",
969 [FW_DEVLOG_FACILITY_FILTER] = "FILTER",
970 [FW_DEVLOG_FACILITY_ACL] = "ACL",
971 [FW_DEVLOG_FACILITY_TM] = "TM",
972 [FW_DEVLOG_FACILITY_QFC] = "QFC",
973 [FW_DEVLOG_FACILITY_DCB] = "DCB",
974 [FW_DEVLOG_FACILITY_ETH] = "ETH",
975 [FW_DEVLOG_FACILITY_OFLD] = "OFLD",
976 [FW_DEVLOG_FACILITY_RI] = "RI",
977 [FW_DEVLOG_FACILITY_ISCSI] = "ISCSI",
978 [FW_DEVLOG_FACILITY_FCOE] = "FCOE",
979 [FW_DEVLOG_FACILITY_FOISCSI] = "FOISCSI",
980 [FW_DEVLOG_FACILITY_FOFCOE] = "FOFCOE"
981};
982
983/* Information gathered by Device Log Open routine for the display routine.
984 */
985struct devlog_info {
986 unsigned int nentries; /* number of entries in log[] */
987 unsigned int first; /* first [temporal] entry in log[] */
988 struct fw_devlog_e log[0]; /* Firmware Device Log */
989};
990
991/* Dump a Firmaware Device Log entry.
992 */
993static int devlog_show(struct seq_file *seq, void *v)
994{
995 if (v == SEQ_START_TOKEN)
996 seq_printf(seq, "%10s %15s %8s %8s %s\n",
997 "Seq#", "Tstamp", "Level", "Facility", "Message");
998 else {
999 struct devlog_info *dinfo = seq->private;
1000 int fidx = (uintptr_t)v - 2;
1001 unsigned long index;
1002 struct fw_devlog_e *e;
1003
1004 /* Get a pointer to the log entry to display. Skip unused log
1005 * entries.
1006 */
1007 index = dinfo->first + fidx;
1008 if (index >= dinfo->nentries)
1009 index -= dinfo->nentries;
1010 e = &dinfo->log[index];
1011 if (e->timestamp == 0)
1012 return 0;
1013
1014 /* Print the message. This depends on the firmware using
1015 * exactly the same formating strings as the kernel so we may
1016 * eventually have to put a format interpreter in here ...
1017 */
1018 seq_printf(seq, "%10d %15llu %8s %8s ",
fda8b18c
HS		 1019 be32_to_cpu(e->seqno),
1020 be64_to_cpu(e->timestamp),
49aa284f
HS		 1021 (e->level < ARRAY_SIZE(devlog_level_strings)
1022 ? devlog_level_strings[e->level]
1023 : "UNKNOWN"),
1024 (e->facility < ARRAY_SIZE(devlog_facility_strings)
1025 ? devlog_facility_strings[e->facility]
1026 : "UNKNOWN"));
fda8b18c
HS		 1027 seq_printf(seq, e->fmt,
1028 be32_to_cpu(e->params[0]),
1029 be32_to_cpu(e->params[1]),
1030 be32_to_cpu(e->params[2]),
1031 be32_to_cpu(e->params[3]),
1032 be32_to_cpu(e->params[4]),
1033 be32_to_cpu(e->params[5]),
1034 be32_to_cpu(e->params[6]),
1035 be32_to_cpu(e->params[7]));
49aa284f
HS		 1036 }
1037 return 0;
1038}
1039
1040/* Sequential File Operations for Device Log.
1041 */
1042static inline void *devlog_get_idx(struct devlog_info *dinfo, loff_t pos)
1043{
1044 if (pos > dinfo->nentries)
1045 return NULL;
1046
1047 return (void *)(uintptr_t)(pos + 1);
1048}
1049
1050static void *devlog_start(struct seq_file *seq, loff_t *pos)
1051{
1052 struct devlog_info *dinfo = seq->private;
1053
1054 return (*pos
1055 ? devlog_get_idx(dinfo, *pos)
1056 : SEQ_START_TOKEN);
1057}
1058
1059static void *devlog_next(struct seq_file *seq, void *v, loff_t *pos)
1060{
1061 struct devlog_info *dinfo = seq->private;
1062
1063 (*pos)++;
1064 return devlog_get_idx(dinfo, *pos);
1065}
1066
1067static void devlog_stop(struct seq_file *seq, void *v)
1068{
1069}
1070
1071static const struct seq_operations devlog_seq_ops = {
1072 .start = devlog_start,
1073 .next = devlog_next,
1074 .stop = devlog_stop,
1075 .show = devlog_show
1076};
1077
1078/* Set up for reading the firmware's device log. We read the entire log here
1079 * and then display it incrementally in devlog_show().
1080 */
1081static int devlog_open(struct inode *inode, struct file *file)
1082{
1083 struct adapter *adap = inode->i_private;
1084 struct devlog_params *dparams = &adap->params.devlog;
1085 struct devlog_info *dinfo;
1086 unsigned int index;
1087 u32 fseqno;
1088 int ret;
1089
1090 /* If we don't know where the log is we can't do anything.
1091 */
1092 if (dparams->start == 0)
1093 return -ENXIO;
1094
1095 /* Allocate the space to read in the firmware's device log and set up
1096 * for the iterated call to our display function.
1097 */
1098 dinfo = __seq_open_private(file, &devlog_seq_ops,
1099 sizeof(*dinfo) + dparams->size);
1100 if (!dinfo)
1101 return -ENOMEM;
1102
1103 /* Record the basic log buffer information and read in the raw log.
1104 */
1105 dinfo->nentries = (dparams->size / sizeof(struct fw_devlog_e));
1106 dinfo->first = 0;
1107 spin_lock(&adap->win0_lock);
1108 ret = t4_memory_rw(adap, adap->params.drv_memwin, dparams->memtype,
1109 dparams->start, dparams->size, (__be32 *)dinfo->log,
1110 T4_MEMORY_READ);
1111 spin_unlock(&adap->win0_lock);
1112 if (ret) {
1113 seq_release_private(inode, file);
1114 return ret;
1115 }
1116
fda8b18c
HS		 1117 /* Find the earliest (lowest Sequence Number) log entry in the
1118 * circular Device Log.
49aa284f
HS		 1119 */
1120 for (fseqno = ~((u32)0), index = 0; index < dinfo->nentries; index++) {
1121 struct fw_devlog_e *e = &dinfo->log[index];
49aa284f
HS		 1122 __u32 seqno;
1123
1124 if (e->timestamp == 0)
1125 continue;
1126
49aa284f 1127 seqno = be32_to_cpu(e->seqno);
49aa284f
HS		 1128 if (seqno < fseqno) {
1129 fseqno = seqno;
1130 dinfo->first = index;
1131 }
1132 }
1133 return 0;
1134}
1135
1136static const struct file_operations devlog_fops = {
1137 .owner = THIS_MODULE,
1138 .open = devlog_open,
1139 .read = seq_read,
1140 .llseek = seq_lseek,
1141 .release = seq_release_private
1142};
1143
7f080c3f
HS		 1144/* Show Firmware Mailbox Command/Reply Log
1145 *
1146 * Note that we don't do any locking when dumping the Firmware Mailbox Log so
1147 * it's possible that we can catch things during a log update and therefore
1148 * see partially corrupted log entries. But it's probably Good Enough(tm).
1149 * If we ever decide that we want to make sure that we're dumping a coherent
1150 * log, we'd need to perform locking in the mailbox logging and in
1151 * mboxlog_open() where we'd need to grab the entire mailbox log in one go
1152 * like we do for the Firmware Device Log.
1153 */
1154static int mboxlog_show(struct seq_file *seq, void *v)
1155{
1156 struct adapter *adapter = seq->private;
1157 struct mbox_cmd_log *log = adapter->mbox_log;
1158 struct mbox_cmd *entry;
1159 int entry_idx, i;
1160
1161 if (v == SEQ_START_TOKEN) {
1162 seq_printf(seq,
1163 "%10s %15s %5s %5s %s\n",
1164 "Seq#", "Tstamp", "Atime", "Etime",
1165 "Command/Reply");
1166 return 0;
1167 }
1168
1169 entry_idx = log->cursor + ((uintptr_t)v - 2);
1170 if (entry_idx >= log->size)
1171 entry_idx -= log->size;
1172 entry = mbox_cmd_log_entry(log, entry_idx);
1173
1174 /* skip over unused entries */
1175 if (entry->timestamp == 0)
1176 return 0;
1177
1178 seq_printf(seq, "%10u %15llu %5d %5d",
1179 entry->seqno, entry->timestamp,
1180 entry->access, entry->execute);
1181 for (i = 0; i < MBOX_LEN / 8; i++) {
1182 u64 flit = entry->cmd[i];
1183 u32 hi = (u32)(flit >> 32);
1184 u32 lo = (u32)flit;
1185
1186 seq_printf(seq, " %08x %08x", hi, lo);
1187 }
1188 seq_puts(seq, "\n");
1189 return 0;
1190}
1191
1192static inline void *mboxlog_get_idx(struct seq_file *seq, loff_t pos)
1193{
1194 struct adapter *adapter = seq->private;
1195 struct mbox_cmd_log *log = adapter->mbox_log;
1196
1197 return ((pos <= log->size) ? (void *)(uintptr_t)(pos + 1) : NULL);
1198}
1199
1200static void *mboxlog_start(struct seq_file *seq, loff_t *pos)
1201{
1202 return *pos ? mboxlog_get_idx(seq, *pos) : SEQ_START_TOKEN;
1203}
1204
1205static void *mboxlog_next(struct seq_file *seq, void *v, loff_t *pos)
1206{
1207 ++*pos;
1208 return mboxlog_get_idx(seq, *pos);
1209}
1210
1211static void mboxlog_stop(struct seq_file *seq, void *v)
1212{
1213}
1214
1215static const struct seq_operations mboxlog_seq_ops = {
1216 .start = mboxlog_start,
1217 .next = mboxlog_next,
1218 .stop = mboxlog_stop,
1219 .show = mboxlog_show
1220};
1221
1222static int mboxlog_open(struct inode *inode, struct file *file)
1223{
1224 int res = seq_open(file, &mboxlog_seq_ops);
1225
1226 if (!res) {
1227 struct seq_file *seq = file->private_data;
1228
1229 seq->private = inode->i_private;
1230 }
1231 return res;
1232}
1233
1234static const struct file_operations mboxlog_fops = {
1235 .owner = THIS_MODULE,
1236 .open = mboxlog_open,
1237 .read = seq_read,
1238 .llseek = seq_lseek,
1239 .release = seq_release,
1240};
1241
bf7c781d
HS		 1242static int mbox_show(struct seq_file *seq, void *v)
1243{
1244 static const char * const owner[] = { "none", "FW", "driver",
b3695540 1245 "unknown", "<unread>" };
bf7c781d
HS		 1246
1247 int i;
1248 unsigned int mbox = (uintptr_t)seq->private & 7;
1249 struct adapter *adap = seq->private - mbox;
1250 void __iomem *addr = adap->regs + PF_REG(mbox, CIM_PF_MAILBOX_DATA_A);
bf7c781d 1251
b3695540
HS		 1252 /* For T4 we don't have a shadow copy of the Mailbox Control register.
1253 * And since reading that real register causes a side effect of
1254 * granting ownership, we're best of simply not reading it at all.
1255 */
1256 if (is_t4(adap->params.chip)) {
1257 i = 4; /* index of "<unread>" */
1258 } else {
1259 unsigned int ctrl_reg = CIM_PF_MAILBOX_CTRL_SHADOW_COPY_A;
1260 void __iomem *ctrl = adap->regs + PF_REG(mbox, ctrl_reg);
1261
1262 i = MBOWNER_G(readl(ctrl));
1263 }
1264
bf7c781d
HS		 1265 seq_printf(seq, "mailbox owned by %s\n\n", owner[i]);
1266
1267 for (i = 0; i < MBOX_LEN; i += 8)
1268 seq_printf(seq, "%016llx\n",
1269 (unsigned long long)readq(addr + i));
1270 return 0;
1271}
1272
1273static int mbox_open(struct inode *inode, struct file *file)
1274{
1275 return single_open(file, mbox_show, inode->i_private);
1276}
1277
1278static ssize_t mbox_write(struct file *file, const char __user *buf,
1279 size_t count, loff_t *pos)
1280{
1281 int i;
1282 char c = '\n', s[256];
1283 unsigned long long data[8];
1284 const struct inode *ino;
1285 unsigned int mbox;
1286 struct adapter *adap;
1287 void __iomem *addr;
1288 void __iomem *ctrl;
1289
1290 if (count > sizeof(s) - 1 || !count)
1291 return -EINVAL;
1292 if (copy_from_user(s, buf, count))
1293 return -EFAULT;
1294 s[count] = '\0';
1295
1296 if (sscanf(s, "%llx %llx %llx %llx %llx %llx %llx %llx%c", &data[0],
1297 &data[1], &data[2], &data[3], &data[4], &data[5], &data[6],
1298 &data[7], &c) < 8 || c != '\n')
1299 return -EINVAL;
1300
c1d81b1c 1301 ino = file_inode(file);
bf7c781d
HS		 1302 mbox = (uintptr_t)ino->i_private & 7;
1303 adap = ino->i_private - mbox;
1304 addr = adap->regs + PF_REG(mbox, CIM_PF_MAILBOX_DATA_A);
1305 ctrl = addr + MBOX_LEN;
1306
1307 if (MBOWNER_G(readl(ctrl)) != X_MBOWNER_PL)
1308 return -EBUSY;
1309
1310 for (i = 0; i < 8; i++)
1311 writeq(data[i], addr + 8 * i);
1312
1313 writel(MBMSGVALID_F | MBOWNER_V(X_MBOWNER_FW), ctrl);
1314 return count;
1315}
1316
1317static const struct file_operations mbox_debugfs_fops = {
1318 .owner = THIS_MODULE,
1319 .open = mbox_open,
1320 .read = seq_read,
1321 .llseek = seq_lseek,
1322 .release = single_release,
1323 .write = mbox_write
1324};
1325
8e3d04fd
HS		 1326static int mps_trc_show(struct seq_file *seq, void *v)
1327{
1328 int enabled, i;
1329 struct trace_params tp;
1330 unsigned int trcidx = (uintptr_t)seq->private & 3;
1331 struct adapter *adap = seq->private - trcidx;
1332
1333 t4_get_trace_filter(adap, &tp, trcidx, &enabled);
1334 if (!enabled) {
1335 seq_puts(seq, "tracer is disabled\n");
1336 return 0;
1337 }
1338
1339 if (tp.skip_ofst * 8 >= TRACE_LEN) {
1340 dev_err(adap->pdev_dev, "illegal trace pattern skip offset\n");
1341 return -EINVAL;
1342 }
1343 if (tp.port < 8) {
1344 i = adap->chan_map[tp.port & 3];
1345 if (i >= MAX_NPORTS) {
1346 dev_err(adap->pdev_dev, "tracer %u is assigned "
1347 "to non-existing port\n", trcidx);
1348 return -EINVAL;
1349 }
1350 seq_printf(seq, "tracer is capturing %s %s, ",
1351 adap->port[i]->name, tp.port < 4 ? "Rx" : "Tx");
1352 } else
1353 seq_printf(seq, "tracer is capturing loopback %d, ",
1354 tp.port - 8);
1355 seq_printf(seq, "snap length: %u, min length: %u\n", tp.snap_len,
1356 tp.min_len);
1357 seq_printf(seq, "packets captured %smatch filter\n",
1358 tp.invert ? "do not " : "");
1359
1360 if (tp.skip_ofst) {
1361 seq_puts(seq, "filter pattern: ");
1362 for (i = 0; i < tp.skip_ofst * 2; i += 2)
1363 seq_printf(seq, "%08x%08x", tp.data[i], tp.data[i + 1]);
1364 seq_putc(seq, '/');
1365 for (i = 0; i < tp.skip_ofst * 2; i += 2)
1366 seq_printf(seq, "%08x%08x", tp.mask[i], tp.mask[i + 1]);
1367 seq_puts(seq, "@0\n");
1368 }
1369
1370 seq_puts(seq, "filter pattern: ");
1371 for (i = tp.skip_ofst * 2; i < TRACE_LEN / 4; i += 2)
1372 seq_printf(seq, "%08x%08x", tp.data[i], tp.data[i + 1]);
1373 seq_putc(seq, '/');
1374 for (i = tp.skip_ofst * 2; i < TRACE_LEN / 4; i += 2)
1375 seq_printf(seq, "%08x%08x", tp.mask[i], tp.mask[i + 1]);
1376 seq_printf(seq, "@%u\n", (tp.skip_ofst + tp.skip_len) * 8);
1377 return 0;
1378}
1379
1380static int mps_trc_open(struct inode *inode, struct file *file)
1381{
1382 return single_open(file, mps_trc_show, inode->i_private);
1383}
1384
1385static unsigned int xdigit2int(unsigned char c)
1386{
1387 return isdigit(c) ? c - '0' : tolower(c) - 'a' + 10;
1388}
1389
1390#define TRC_PORT_NONE 0xff
1391#define TRC_RSS_ENABLE 0x33
1392#define TRC_RSS_DISABLE 0x13
1393
1394/* Set an MPS trace filter. Syntax is:
1395 *
1396 * disable
1397 *
1398 * to disable tracing, or
1399 *
1400 * interface qid=<qid no> [snaplen=<val>] [minlen=<val>] [not] [<pattern>]...
1401 *
1402 * where interface is one of rxN, txN, or loopbackN, N = 0..3, qid can be one
1403 * of the NIC's response qid obtained from sge_qinfo and pattern has the form
1404 *
1405 * <pattern data>[/<pattern mask>][@<anchor>]
1406 *
1407 * Up to 2 filter patterns can be specified. If 2 are supplied the first one
0cf2a848 1408 * must be anchored at 0. An omitted mask is taken as a mask of 1s, an omitted
8e3d04fd
HS		 1409 * anchor is taken as 0.
1410 */
1411static ssize_t mps_trc_write(struct file *file, const char __user *buf,
1412 size_t count, loff_t *pos)
1413{
c938a003 1414 int i, enable, ret;
8e3d04fd
HS		 1415 u32 *data, *mask;
1416 struct trace_params tp;
1417 const struct inode *ino;
1418 unsigned int trcidx;
1419 char *s, *p, *word, *end;
1420 struct adapter *adap;
c938a003 1421 u32 j;
8e3d04fd
HS		 1422
1423 ino = file_inode(file);
1424 trcidx = (uintptr_t)ino->i_private & 3;
1425 adap = ino->i_private - trcidx;
1426
1427 /* Don't accept input more than 1K, can't be anything valid except lots
1428 * of whitespace. Well, use less.
1429 */
1430 if (count > 1024)
1431 return -EFBIG;
1432 p = s = kzalloc(count + 1, GFP_USER);
1433 if (!s)
1434 return -ENOMEM;
1435 if (copy_from_user(s, buf, count)) {
1436 count = -EFAULT;
1437 goto out;
1438 }
1439
1440 if (s[count - 1] == '\n')
1441 s[count - 1] = '\0';
1442
1443 enable = strcmp("disable", s) != 0;
1444 if (!enable)
1445 goto apply;
1446
1447 /* enable or disable trace multi rss filter */
1448 if (adap->trace_rss)
1449 t4_write_reg(adap, MPS_TRC_CFG_A, TRC_RSS_ENABLE);
1450 else
1451 t4_write_reg(adap, MPS_TRC_CFG_A, TRC_RSS_DISABLE);
1452
1453 memset(&tp, 0, sizeof(tp));
1454 tp.port = TRC_PORT_NONE;
1455 i = 0; /* counts pattern nibbles */
1456
1457 while (p) {
1458 while (isspace(*p))
1459 p++;
1460 word = strsep(&p, " ");
1461 if (!*word)
1462 break;
1463
1464 if (!strncmp(word, "qid=", 4)) {
1465 end = (char *)word + 4;
c938a003 1466 ret = kstrtouint(end, 10, &j);
8e3d04fd
HS		 1467 if (ret)
1468 goto out;
1469 if (!adap->trace_rss) {
1470 t4_write_reg(adap, MPS_T5_TRC_RSS_CONTROL_A, j);
1471 continue;
1472 }
1473
1474 switch (trcidx) {
1475 case 0:
1476 t4_write_reg(adap, MPS_TRC_RSS_CONTROL_A, j);
1477 break;
1478 case 1:
1479 t4_write_reg(adap,
1480 MPS_TRC_FILTER1_RSS_CONTROL_A, j);
1481 break;
1482 case 2:
1483 t4_write_reg(adap,
1484 MPS_TRC_FILTER2_RSS_CONTROL_A, j);
1485 break;
1486 case 3:
1487 t4_write_reg(adap,
1488 MPS_TRC_FILTER3_RSS_CONTROL_A, j);
1489 break;
1490 }
1491 continue;
1492 }
1493 if (!strncmp(word, "snaplen=", 8)) {
1494 end = (char *)word + 8;
c938a003 1495 ret = kstrtouint(end, 10, &j);
8e3d04fd
HS		 1496 if (ret || j > 9600) {
1497inval: count = -EINVAL;
1498 goto out;
1499 }
1500 tp.snap_len = j;
1501 continue;
1502 }
1503 if (!strncmp(word, "minlen=", 7)) {
1504 end = (char *)word + 7;
c938a003 1505 ret = kstrtouint(end, 10, &j);
8e3d04fd
HS		 1506 if (ret || j > TFMINPKTSIZE_M)
1507 goto inval;
1508 tp.min_len = j;
1509 continue;
1510 }
1511 if (!strcmp(word, "not")) {
1512 tp.invert = !tp.invert;
1513 continue;
1514 }
1515 if (!strncmp(word, "loopback", 8) && tp.port == TRC_PORT_NONE) {
1516 if (word[8] < '0' || word[8] > '3' || word[9])
1517 goto inval;
1518 tp.port = word[8] - '0' + 8;
1519 continue;
1520 }
1521 if (!strncmp(word, "tx", 2) && tp.port == TRC_PORT_NONE) {
1522 if (word[2] < '0' || word[2] > '3' || word[3])
1523 goto inval;
1524 tp.port = word[2] - '0' + 4;
1525 if (adap->chan_map[tp.port & 3] >= MAX_NPORTS)
1526 goto inval;
1527 continue;
1528 }
1529 if (!strncmp(word, "rx", 2) && tp.port == TRC_PORT_NONE) {
1530 if (word[2] < '0' || word[2] > '3' || word[3])
1531 goto inval;
1532 tp.port = word[2] - '0';
1533 if (adap->chan_map[tp.port] >= MAX_NPORTS)
1534 goto inval;
1535 continue;
1536 }
1537 if (!isxdigit(*word))
1538 goto inval;
1539
1540 /* we have found a trace pattern */
1541 if (i) { /* split pattern */
1542 if (tp.skip_len) /* too many splits */
1543 goto inval;
1544 tp.skip_ofst = i / 16;
1545 }
1546
1547 data = &tp.data[i / 8];
1548 mask = &tp.mask[i / 8];
1549 j = i;
1550
1551 while (isxdigit(*word)) {
1552 if (i >= TRACE_LEN * 2) {
1553 count = -EFBIG;
1554 goto out;
1555 }
1556 *data = (*data << 4) + xdigit2int(*word++);
1557 if (++i % 8 == 0)
1558 data++;
1559 }
1560 if (*word == '/') {
1561 word++;
1562 while (isxdigit(*word)) {
1563 if (j >= i) /* mask longer than data */
1564 goto inval;
1565 *mask = (*mask << 4) + xdigit2int(*word++);
1566 if (++j % 8 == 0)
1567 mask++;
1568 }
1569 if (i != j) /* mask shorter than data */
1570 goto inval;
1571 } else { /* no mask, use all 1s */
1572 for ( ; i - j >= 8; j += 8)
1573 *mask++ = 0xffffffff;
1574 if (i % 8)
1575 *mask = (1 << (i % 8) * 4) - 1;
1576 }
1577 if (*word == '@') {
1578 end = (char *)word + 1;
c938a003 1579 ret = kstrtouint(end, 10, &j);
8e3d04fd
HS		 1580 if (*end && *end != '\n')
1581 goto inval;
1582 if (j & 7) /* doesn't start at multiple of 8 */
1583 goto inval;
1584 j /= 8;
1585 if (j < tp.skip_ofst) /* overlaps earlier pattern */
1586 goto inval;
1587 if (j - tp.skip_ofst > 31) /* skip too big */
1588 goto inval;
1589 tp.skip_len = j - tp.skip_ofst;
1590 }
1591 if (i % 8) {
1592 *data <<= (8 - i % 8) * 4;
1593 *mask <<= (8 - i % 8) * 4;
1594 i = (i + 15) & ~15; /* 8-byte align */
1595 }
1596 }
1597
1598 if (tp.port == TRC_PORT_NONE)
1599 goto inval;
1600
1601apply:
1602 i = t4_set_trace_filter(adap, &tp, trcidx, enable);
1603 if (i)
1604 count = i;
1605out:
1606 kfree(s);
1607 return count;
1608}
1609
1610static const struct file_operations mps_trc_debugfs_fops = {
1611 .owner = THIS_MODULE,
1612 .open = mps_trc_open,
1613 .read = seq_read,
1614 .llseek = seq_lseek,
1615 .release = single_release,
1616 .write = mps_trc_write
1617};
1618
49216c1c
HS		 1619static ssize_t flash_read(struct file *file, char __user *buf, size_t count,
1620 loff_t *ppos)
1621{
1622 loff_t pos = *ppos;
c1d81b1c 1623 loff_t avail = file_inode(file)->i_size;
49216c1c
HS		 1624 struct adapter *adap = file->private_data;
1625
1626 if (pos < 0)
1627 return -EINVAL;
1628 if (pos >= avail)
1629 return 0;
1630 if (count > avail - pos)
1631 count = avail - pos;
1632
1633 while (count) {
1634 size_t len;
1635 int ret, ofst;
1636 u8 data[256];
1637
1638 ofst = pos & 3;
1639 len = min(count + ofst, sizeof(data));
1640 ret = t4_read_flash(adap, pos - ofst, (len + 3) / 4,
1641 (u32 *)data, 1);
1642 if (ret)
1643 return ret;
1644
1645 len -= ofst;
1646 if (copy_to_user(buf, data + ofst, len))
1647 return -EFAULT;
1648
1649 buf += len;
1650 pos += len;
1651 count -= len;
1652 }
1653 count = pos - *ppos;
1654 *ppos = pos;
1655 return count;
1656}
1657
1658static const struct file_operations flash_debugfs_fops = {
1659 .owner = THIS_MODULE,
1660 .open = mem_open,
1661 .read = flash_read,
ed98c85e 1662 .llseek = default_llseek,
49216c1c
HS		 1663};
1664
ef82f662
HS		 1665static inline void tcamxy2valmask(u64 x, u64 y, u8 *addr, u64 *mask)
1666{
1667 *mask = x | y;
1668 y = (__force u64)cpu_to_be64(y);
1669 memcpy(addr, (char *)&y + 2, ETH_ALEN);
1670}
1671
1672static int mps_tcam_show(struct seq_file *seq, void *v)
1673{
3ccc6cf7
HS		 1674 struct adapter *adap = seq->private;
1675 unsigned int chip_ver = CHELSIO_CHIP_VERSION(adap->params.chip);
3ccc6cf7 1676 if (v == SEQ_START_TOKEN) {
115b56af 1677 if (chip_ver > CHELSIO_T5) {
3ccc6cf7 1678 seq_puts(seq, "Idx Ethernet address Mask "
115b56af
HS		 1679 " VNI Mask IVLAN Vld "
1680 "DIP_Hit Lookup Port "
3ccc6cf7
HS		 1681 "Vld Ports PF VF "
1682 "Replication "
1683 " P0 P1 P2 P3 ML\n");
115b56af
HS		 1684 } else {
1685 if (adap->params.arch.mps_rplc_size > 128)
1686 seq_puts(seq, "Idx Ethernet address Mask "
1687 "Vld Ports PF VF "
1688 "Replication "
1689 " P0 P1 P2 P3 ML\n");
1690 else
1691 seq_puts(seq, "Idx Ethernet address Mask "
1692 "Vld Ports PF VF Replication"
1693 " P0 P1 P2 P3 ML\n");
1694 }
3ccc6cf7 1695 } else {
ef82f662
HS		 1696 u64 mask;
1697 u8 addr[ETH_ALEN];
115b56af 1698 bool replicate, dip_hit = false, vlan_vld = false;
ef82f662 1699 unsigned int idx = (uintptr_t)v - 2;
3ccc6cf7 1700 u64 tcamy, tcamx, val;
115b56af 1701 u32 cls_lo, cls_hi, ctl, data2, vnix = 0, vniy = 0;
3ccc6cf7 1702 u32 rplc[8] = {0};
115b56af
HS		 1703 u8 lookup_type = 0, port_num = 0;
1704 u16 ivlan = 0;
3ccc6cf7
HS		 1705
1706 if (chip_ver > CHELSIO_T5) {
1707 /* CtlCmdType - 0: Read, 1: Write
1708 * CtlTcamSel - 0: TCAM0, 1: TCAM1
1709 * CtlXYBitSel- 0: Y bit, 1: X bit
1710 */
1711
1712 /* Read tcamy */
1713 ctl = CTLCMDTYPE_V(0) | CTLXYBITSEL_V(0);
1714 if (idx < 256)
1715 ctl |= CTLTCAMINDEX_V(idx) | CTLTCAMSEL_V(0);
1716 else
1717 ctl |= CTLTCAMINDEX_V(idx - 256) |
1718 CTLTCAMSEL_V(1);
1719 t4_write_reg(adap, MPS_CLS_TCAM_DATA2_CTL_A, ctl);
1720 val = t4_read_reg(adap, MPS_CLS_TCAM_DATA1_A);
1721 tcamy = DMACH_G(val) << 32;
1722 tcamy |= t4_read_reg(adap, MPS_CLS_TCAM_DATA0_A);
115b56af
HS		 1723 data2 = t4_read_reg(adap, MPS_CLS_TCAM_DATA2_CTL_A);
1724 lookup_type = DATALKPTYPE_G(data2);
1725 /* 0 - Outer header, 1 - Inner header
1726 * [71:48] bit locations are overloaded for
1727 * outer vs. inner lookup types.
1728 */
1729 if (lookup_type && (lookup_type != DATALKPTYPE_M)) {
1730 /* Inner header VNI */
b9525301 1731 vniy = (data2 & DATAVIDH2_F) |
115b56af
HS		 1732 (DATAVIDH1_G(data2) << 16) | VIDL_G(val);
1733 dip_hit = data2 & DATADIPHIT_F;
1734 } else {
1735 vlan_vld = data2 & DATAVIDH2_F;
1736 ivlan = VIDL_G(val);
1737 }
1738 port_num = DATAPORTNUM_G(data2);
3ccc6cf7
HS		 1739
1740 /* Read tcamx. Change the control param */
b9525301 1741 vnix = 0;
3ccc6cf7
HS		 1742 ctl |= CTLXYBITSEL_V(1);
1743 t4_write_reg(adap, MPS_CLS_TCAM_DATA2_CTL_A, ctl);
1744 val = t4_read_reg(adap, MPS_CLS_TCAM_DATA1_A);
1745 tcamx = DMACH_G(val) << 32;
1746 tcamx |= t4_read_reg(adap, MPS_CLS_TCAM_DATA0_A);
115b56af
HS		 1747 data2 = t4_read_reg(adap, MPS_CLS_TCAM_DATA2_CTL_A);
1748 if (lookup_type && (lookup_type != DATALKPTYPE_M)) {
1749 /* Inner header VNI mask */
b9525301 1750 vnix = (data2 & DATAVIDH2_F) |
115b56af
HS		 1751 (DATAVIDH1_G(data2) << 16) | VIDL_G(val);
1752 }
3ccc6cf7
HS		 1753 } else {
1754 tcamy = t4_read_reg64(adap, MPS_CLS_TCAM_Y_L(idx));
1755 tcamx = t4_read_reg64(adap, MPS_CLS_TCAM_X_L(idx));
1756 }
1757
1758 cls_lo = t4_read_reg(adap, MPS_CLS_SRAM_L(idx));
1759 cls_hi = t4_read_reg(adap, MPS_CLS_SRAM_H(idx));
ef82f662
HS		 1760
1761 if (tcamx & tcamy) {
1762 seq_printf(seq, "%3u -\n", idx);
1763 goto out;
1764 }
1765
3ccc6cf7
HS		 1766 rplc[0] = rplc[1] = rplc[2] = rplc[3] = 0;
1767 if (chip_ver > CHELSIO_T5)
1768 replicate = (cls_lo & T6_REPLICATE_F);
1769 else
1770 replicate = (cls_lo & REPLICATE_F);
1771
1772 if (replicate) {
ef82f662
HS		 1773 struct fw_ldst_cmd ldst_cmd;
1774 int ret;
3ccc6cf7
HS		 1775 struct fw_ldst_mps_rplc mps_rplc;
1776 u32 ldst_addrspc;
ef82f662
HS		 1777
1778 memset(&ldst_cmd, 0, sizeof(ldst_cmd));
3ccc6cf7
HS		 1779 ldst_addrspc =
1780 FW_LDST_CMD_ADDRSPACE_V(FW_LDST_ADDRSPC_MPS);
ef82f662
HS		 1781 ldst_cmd.op_to_addrspace =
1782 htonl(FW_CMD_OP_V(FW_LDST_CMD) |
1783 FW_CMD_REQUEST_F |
1784 FW_CMD_READ_F |
3ccc6cf7 1785 ldst_addrspc);
ef82f662 1786 ldst_cmd.cycles_to_len16 = htonl(FW_LEN16(ldst_cmd));
3ccc6cf7 1787 ldst_cmd.u.mps.rplc.fid_idx =
ef82f662 1788 htons(FW_LDST_CMD_FID_V(FW_LDST_MPS_RPLC) |
3ccc6cf7 1789 FW_LDST_CMD_IDX_V(idx));
ef82f662
HS		 1790 ret = t4_wr_mbox(adap, adap->mbox, &ldst_cmd,
1791 sizeof(ldst_cmd), &ldst_cmd);
1792 if (ret)
1793 dev_warn(adap->pdev_dev, "Can't read MPS "
1794 "replication map for idx %d: %d\n",
1795 idx, -ret);
1796 else {
3ccc6cf7
HS		 1797 mps_rplc = ldst_cmd.u.mps.rplc;
1798 rplc[0] = ntohl(mps_rplc.rplc31_0);
1799 rplc[1] = ntohl(mps_rplc.rplc63_32);
1800 rplc[2] = ntohl(mps_rplc.rplc95_64);
1801 rplc[3] = ntohl(mps_rplc.rplc127_96);
1802 if (adap->params.arch.mps_rplc_size > 128) {
1803 rplc[4] = ntohl(mps_rplc.rplc159_128);
1804 rplc[5] = ntohl(mps_rplc.rplc191_160);
1805 rplc[6] = ntohl(mps_rplc.rplc223_192);
1806 rplc[7] = ntohl(mps_rplc.rplc255_224);
1807 }
ef82f662
HS		 1808 }
1809 }
1810
1811 tcamxy2valmask(tcamx, tcamy, addr, &mask);
115b56af
HS		 1812 if (chip_ver > CHELSIO_T5) {
1813 /* Inner header lookup */
1814 if (lookup_type && (lookup_type != DATALKPTYPE_M)) {
1815 seq_printf(seq,
1816 "%3u %02x:%02x:%02x:%02x:%02x:%02x "
1817 "%012llx %06x %06x - - %3c"
89e7a154 1818 " 'I' %4x "
115b56af
HS		 1819 "%3c %#x%4u%4d", idx, addr[0],
1820 addr[1], addr[2], addr[3],
1821 addr[4], addr[5],
1822 (unsigned long long)mask,
b9525301
GG		 1823 vniy, (vnix | vniy),
1824 dip_hit ? 'Y' : 'N',
89e7a154 1825 port_num,
115b56af
HS		 1826 (cls_lo & T6_SRAM_VLD_F) ? 'Y' : 'N',
1827 PORTMAP_G(cls_hi),
1828 T6_PF_G(cls_lo),
1829 (cls_lo & T6_VF_VALID_F) ?
1830 T6_VF_G(cls_lo) : -1);
1831 } else {
1832 seq_printf(seq,
1833 "%3u %02x:%02x:%02x:%02x:%02x:%02x "
1834 "%012llx - - ",
1835 idx, addr[0], addr[1], addr[2],
1836 addr[3], addr[4], addr[5],
1837 (unsigned long long)mask);
1838
1839 if (vlan_vld)
1840 seq_printf(seq, "%4u Y ", ivlan);
1841 else
1842 seq_puts(seq, " - N ");
1843
1844 seq_printf(seq,
1845 "- %3c %4x %3c %#x%4u%4d",
1846 lookup_type ? 'I' : 'O', port_num,
1847 (cls_lo & T6_SRAM_VLD_F) ? 'Y' : 'N',
1848 PORTMAP_G(cls_hi),
1849 T6_PF_G(cls_lo),
1850 (cls_lo & T6_VF_VALID_F) ?
1851 T6_VF_G(cls_lo) : -1);
1852 }
1853 } else
3ccc6cf7
HS		 1854 seq_printf(seq, "%3u %02x:%02x:%02x:%02x:%02x:%02x "
1855 "%012llx%3c %#x%4u%4d",
1856 idx, addr[0], addr[1], addr[2], addr[3],
1857 addr[4], addr[5], (unsigned long long)mask,
1858 (cls_lo & SRAM_VLD_F) ? 'Y' : 'N',
1859 PORTMAP_G(cls_hi),
1860 PF_G(cls_lo),
1861 (cls_lo & VF_VALID_F) ? VF_G(cls_lo) : -1);
1862
1863 if (replicate) {
1864 if (adap->params.arch.mps_rplc_size > 128)
1865 seq_printf(seq, " %08x %08x %08x %08x "
1866 "%08x %08x %08x %08x",
1867 rplc[7], rplc[6], rplc[5], rplc[4],
1868 rplc[3], rplc[2], rplc[1], rplc[0]);
1869 else
1870 seq_printf(seq, " %08x %08x %08x %08x",
1871 rplc[3], rplc[2], rplc[1], rplc[0]);
1872 } else {
1873 if (adap->params.arch.mps_rplc_size > 128)
1874 seq_printf(seq, "%72c", ' ');
1875 else
1876 seq_printf(seq, "%36c", ' ');
1877 }
1878
1879 if (chip_ver > CHELSIO_T5)
1880 seq_printf(seq, "%4u%3u%3u%3u %#x\n",
1881 T6_SRAM_PRIO0_G(cls_lo),
1882 T6_SRAM_PRIO1_G(cls_lo),
1883 T6_SRAM_PRIO2_G(cls_lo),
1884 T6_SRAM_PRIO3_G(cls_lo),
1885 (cls_lo >> T6_MULTILISTEN0_S) & 0xf);
1886 else
1887 seq_printf(seq, "%4u%3u%3u%3u %#x\n",
1888 SRAM_PRIO0_G(cls_lo), SRAM_PRIO1_G(cls_lo),
1889 SRAM_PRIO2_G(cls_lo), SRAM_PRIO3_G(cls_lo),
1890 (cls_lo >> MULTILISTEN0_S) & 0xf);
ef82f662
HS		 1891 }
1892out: return 0;
1893}
1894
1895static inline void *mps_tcam_get_idx(struct seq_file *seq, loff_t pos)
1896{
1897 struct adapter *adap = seq->private;
1898 int max_mac_addr = is_t4(adap->params.chip) ?
1899 NUM_MPS_CLS_SRAM_L_INSTANCES :
1900 NUM_MPS_T5_CLS_SRAM_L_INSTANCES;
1901 return ((pos <= max_mac_addr) ? (void *)(uintptr_t)(pos + 1) : NULL);
1902}
1903
1904static void *mps_tcam_start(struct seq_file *seq, loff_t *pos)
1905{
1906 return *pos ? mps_tcam_get_idx(seq, *pos) : SEQ_START_TOKEN;
1907}
1908
1909static void *mps_tcam_next(struct seq_file *seq, void *v, loff_t *pos)
1910{
1911 ++*pos;
1912 return mps_tcam_get_idx(seq, *pos);
1913}
1914
1915static void mps_tcam_stop(struct seq_file *seq, void *v)
1916{
1917}
1918
1919static const struct seq_operations mps_tcam_seq_ops = {
1920 .start = mps_tcam_start,
1921 .next = mps_tcam_next,
1922 .stop = mps_tcam_stop,
1923 .show = mps_tcam_show
1924};
1925
1926static int mps_tcam_open(struct inode *inode, struct file *file)
1927{
1928 int res = seq_open(file, &mps_tcam_seq_ops);
1929
1930 if (!res) {
1931 struct seq_file *seq = file->private_data;
1932
1933 seq->private = inode->i_private;
1934 }
1935 return res;
1936}
1937
1938static const struct file_operations mps_tcam_debugfs_fops = {
1939 .owner = THIS_MODULE,
1940 .open = mps_tcam_open,
1941 .read = seq_read,
1942 .llseek = seq_lseek,
1943 .release = seq_release,
1944};
1945
70a5f3bb
HS		 1946/* Display various sensor information.
1947 */
1948static int sensors_show(struct seq_file *seq, void *v)
1949{
1950 struct adapter *adap = seq->private;
1951 u32 param[7], val[7];
1952 int ret;
1953
1954 /* Note that if the sensors haven't been initialized and turned on
1955 * we'll get values of 0, so treat those as "<unknown>" ...
1956 */
1957 param[0] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_DEV) |
1958 FW_PARAMS_PARAM_X_V(FW_PARAMS_PARAM_DEV_DIAG) |
1959 FW_PARAMS_PARAM_Y_V(FW_PARAM_DEV_DIAG_TMP));
1960 param[1] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_DEV) |
1961 FW_PARAMS_PARAM_X_V(FW_PARAMS_PARAM_DEV_DIAG) |
1962 FW_PARAMS_PARAM_Y_V(FW_PARAM_DEV_DIAG_VDD));
b2612722 1963 ret = t4_query_params(adap, adap->mbox, adap->pf, 0, 2,
70a5f3bb
HS		 1964 param, val);
1965
1966 if (ret < 0 || val[0] == 0)
1967 seq_puts(seq, "Temperature: <unknown>\n");
1968 else
1969 seq_printf(seq, "Temperature: %dC\n", val[0]);
1970
1971 if (ret < 0 || val[1] == 0)
1972 seq_puts(seq, "Core VDD: <unknown>\n");
1973 else
1974 seq_printf(seq, "Core VDD: %dmV\n", val[1]);
1975
1976 return 0;
1977}
b09026c6 1978DEFINE_SHOW_ATTRIBUTE(sensors);
70a5f3bb 1979
b5a02f50 1980#if IS_ENABLED(CONFIG_IPV6)
b09026c6 1981DEFINE_SHOW_ATTRIBUTE(clip_tbl);
b5a02f50
AB		 1982#endif
1983
688ea5fe
HS		 1984/*RSS Table.
1985 */
1986
1987static int rss_show(struct seq_file *seq, void *v, int idx)
1988{
1989 u16 *entry = v;
1990
1991 seq_printf(seq, "%4d: %4u %4u %4u %4u %4u %4u %4u %4u\n",
1992 idx * 8, entry[0], entry[1], entry[2], entry[3], entry[4],
1993 entry[5], entry[6], entry[7]);
1994 return 0;
1995}
1996
1997static int rss_open(struct inode *inode, struct file *file)
1998{
688ea5fe 1999 struct adapter *adap = inode->i_private;
f988008a
GG		 2000 int ret, nentries;
2001 struct seq_tab *p;
688ea5fe 2002
f988008a
GG		 2003 nentries = t4_chip_rss_size(adap);
2004 p = seq_open_tab(file, nentries / 8, 8 * sizeof(u16), 0, rss_show);
688ea5fe
HS		 2005 if (!p)
2006 return -ENOMEM;
2007
2008 ret = t4_read_rss(adap, (u16 *)p->data);
2009 if (ret)
2010 seq_release_private(inode, file);
2011
2012 return ret;
2013}
2014
2015static const struct file_operations rss_debugfs_fops = {
2016 .owner = THIS_MODULE,
2017 .open = rss_open,
2018 .read = seq_read,
2019 .llseek = seq_lseek,
2020 .release = seq_release_private
2021};
2022
2023/* RSS Configuration.
2024 */
2025
2026/* Small utility function to return the strings "yes" or "no" if the supplied
2027 * argument is non-zero.
2028 */
2029static const char *yesno(int x)
2030{
2031 static const char *yes = "yes";
2032 static const char *no = "no";
2033
2034 return x ? yes : no;
2035}
2036
2037static int rss_config_show(struct seq_file *seq, void *v)
2038{
2039 struct adapter *adapter = seq->private;
2040 static const char * const keymode[] = {
2041 "global",
2042 "global and per-VF scramble",
2043 "per-PF and per-VF scramble",
2044 "per-VF and per-VF scramble",
2045 };
2046 u32 rssconf;
2047
2048 rssconf = t4_read_reg(adapter, TP_RSS_CONFIG_A);
2049 seq_printf(seq, "TP_RSS_CONFIG: %#x\n", rssconf);
2050 seq_printf(seq, " Tnl4TupEnIpv6: %3s\n", yesno(rssconf &
2051 TNL4TUPENIPV6_F));
2052 seq_printf(seq, " Tnl2TupEnIpv6: %3s\n", yesno(rssconf &
2053 TNL2TUPENIPV6_F));
2054 seq_printf(seq, " Tnl4TupEnIpv4: %3s\n", yesno(rssconf &
2055 TNL4TUPENIPV4_F));
2056 seq_printf(seq, " Tnl2TupEnIpv4: %3s\n", yesno(rssconf &
2057 TNL2TUPENIPV4_F));
2058 seq_printf(seq, " TnlTcpSel: %3s\n", yesno(rssconf & TNLTCPSEL_F));
2059 seq_printf(seq, " TnlIp6Sel: %3s\n", yesno(rssconf & TNLIP6SEL_F));
2060 seq_printf(seq, " TnlVrtSel: %3s\n", yesno(rssconf & TNLVRTSEL_F));
2061 seq_printf(seq, " TnlMapEn: %3s\n", yesno(rssconf & TNLMAPEN_F));
2062 seq_printf(seq, " OfdHashSave: %3s\n", yesno(rssconf &
2063 OFDHASHSAVE_F));
2064 seq_printf(seq, " OfdVrtSel: %3s\n", yesno(rssconf & OFDVRTSEL_F));
2065 seq_printf(seq, " OfdMapEn: %3s\n", yesno(rssconf & OFDMAPEN_F));
2066 seq_printf(seq, " OfdLkpEn: %3s\n", yesno(rssconf & OFDLKPEN_F));
2067 seq_printf(seq, " Syn4TupEnIpv6: %3s\n", yesno(rssconf &
2068 SYN4TUPENIPV6_F));
2069 seq_printf(seq, " Syn2TupEnIpv6: %3s\n", yesno(rssconf &
2070 SYN2TUPENIPV6_F));
2071 seq_printf(seq, " Syn4TupEnIpv4: %3s\n", yesno(rssconf &
2072 SYN4TUPENIPV4_F));
2073 seq_printf(seq, " Syn2TupEnIpv4: %3s\n", yesno(rssconf &
2074 SYN2TUPENIPV4_F));
2075 seq_printf(seq, " Syn4TupEnIpv6: %3s\n", yesno(rssconf &
2076 SYN4TUPENIPV6_F));
2077 seq_printf(seq, " SynIp6Sel: %3s\n", yesno(rssconf & SYNIP6SEL_F));
2078 seq_printf(seq, " SynVrt6Sel: %3s\n", yesno(rssconf & SYNVRTSEL_F));
2079 seq_printf(seq, " SynMapEn: %3s\n", yesno(rssconf & SYNMAPEN_F));
2080 seq_printf(seq, " SynLkpEn: %3s\n", yesno(rssconf & SYNLKPEN_F));
2081 seq_printf(seq, " ChnEn: %3s\n", yesno(rssconf &
2082 CHANNELENABLE_F));
2083 seq_printf(seq, " PrtEn: %3s\n", yesno(rssconf &
2084 PORTENABLE_F));
2085 seq_printf(seq, " TnlAllLkp: %3s\n", yesno(rssconf &
2086 TNLALLLOOKUP_F));
2087 seq_printf(seq, " VrtEn: %3s\n", yesno(rssconf &
2088 VIRTENABLE_F));
2089 seq_printf(seq, " CngEn: %3s\n", yesno(rssconf &
2090 CONGESTIONENABLE_F));
2091 seq_printf(seq, " HashToeplitz: %3s\n", yesno(rssconf &
2092 HASHTOEPLITZ_F));
2093 seq_printf(seq, " Udp4En: %3s\n", yesno(rssconf & UDPENABLE_F));
2094 seq_printf(seq, " Disable: %3s\n", yesno(rssconf & DISABLE_F));
2095
2096 seq_puts(seq, "\n");
2097
2098 rssconf = t4_read_reg(adapter, TP_RSS_CONFIG_TNL_A);
2099 seq_printf(seq, "TP_RSS_CONFIG_TNL: %#x\n", rssconf);
2100 seq_printf(seq, " MaskSize: %3d\n", MASKSIZE_G(rssconf));
2101 seq_printf(seq, " MaskFilter: %3d\n", MASKFILTER_G(rssconf));
2102 if (CHELSIO_CHIP_VERSION(adapter->params.chip) > CHELSIO_T5) {
2103 seq_printf(seq, " HashAll: %3s\n",
2104 yesno(rssconf & HASHALL_F));
2105 seq_printf(seq, " HashEth: %3s\n",
2106 yesno(rssconf & HASHETH_F));
2107 }
2108 seq_printf(seq, " UseWireCh: %3s\n", yesno(rssconf & USEWIRECH_F));
2109
2110 seq_puts(seq, "\n");
2111
2112 rssconf = t4_read_reg(adapter, TP_RSS_CONFIG_OFD_A);
2113 seq_printf(seq, "TP_RSS_CONFIG_OFD: %#x\n", rssconf);
2114 seq_printf(seq, " MaskSize: %3d\n", MASKSIZE_G(rssconf));
2115 seq_printf(seq, " RRCplMapEn: %3s\n", yesno(rssconf &
2116 RRCPLMAPEN_F));
2117 seq_printf(seq, " RRCplQueWidth: %3d\n", RRCPLQUEWIDTH_G(rssconf));
2118
2119 seq_puts(seq, "\n");
2120
2121 rssconf = t4_read_reg(adapter, TP_RSS_CONFIG_SYN_A);
2122 seq_printf(seq, "TP_RSS_CONFIG_SYN: %#x\n", rssconf);
2123 seq_printf(seq, " MaskSize: %3d\n", MASKSIZE_G(rssconf));
2124 seq_printf(seq, " UseWireCh: %3s\n", yesno(rssconf & USEWIRECH_F));
2125
2126 seq_puts(seq, "\n");
2127
2128 rssconf = t4_read_reg(adapter, TP_RSS_CONFIG_VRT_A);
2129 seq_printf(seq, "TP_RSS_CONFIG_VRT: %#x\n", rssconf);
2130 if (CHELSIO_CHIP_VERSION(adapter->params.chip) > CHELSIO_T5) {
2131 seq_printf(seq, " KeyWrAddrX: %3d\n",
2132 KEYWRADDRX_G(rssconf));
2133 seq_printf(seq, " KeyExtend: %3s\n",
2134 yesno(rssconf & KEYEXTEND_F));
2135 }
2136 seq_printf(seq, " VfRdRg: %3s\n", yesno(rssconf & VFRDRG_F));
2137 seq_printf(seq, " VfRdEn: %3s\n", yesno(rssconf & VFRDEN_F));
2138 seq_printf(seq, " VfPerrEn: %3s\n", yesno(rssconf & VFPERREN_F));
2139 seq_printf(seq, " KeyPerrEn: %3s\n", yesno(rssconf & KEYPERREN_F));
2140 seq_printf(seq, " DisVfVlan: %3s\n", yesno(rssconf &
2141 DISABLEVLAN_F));
2142 seq_printf(seq, " EnUpSwt: %3s\n", yesno(rssconf & ENABLEUP0_F));
2143 seq_printf(seq, " HashDelay: %3d\n", HASHDELAY_G(rssconf));
2144 if (CHELSIO_CHIP_VERSION(adapter->params.chip) <= CHELSIO_T5)
2145 seq_printf(seq, " VfWrAddr: %3d\n", VFWRADDR_G(rssconf));
3ccc6cf7
HS		 2146 else
2147 seq_printf(seq, " VfWrAddr: %3d\n",
2148 T6_VFWRADDR_G(rssconf));
688ea5fe
HS		 2149 seq_printf(seq, " KeyMode: %s\n", keymode[KEYMODE_G(rssconf)]);
2150 seq_printf(seq, " VfWrEn: %3s\n", yesno(rssconf & VFWREN_F));
2151 seq_printf(seq, " KeyWrEn: %3s\n", yesno(rssconf & KEYWREN_F));
2152 seq_printf(seq, " KeyWrAddr: %3d\n", KEYWRADDR_G(rssconf));
2153
2154 seq_puts(seq, "\n");
2155
2156 rssconf = t4_read_reg(adapter, TP_RSS_CONFIG_CNG_A);
2157 seq_printf(seq, "TP_RSS_CONFIG_CNG: %#x\n", rssconf);
2158 seq_printf(seq, " ChnCount3: %3s\n", yesno(rssconf & CHNCOUNT3_F));
2159 seq_printf(seq, " ChnCount2: %3s\n", yesno(rssconf & CHNCOUNT2_F));
2160 seq_printf(seq, " ChnCount1: %3s\n", yesno(rssconf & CHNCOUNT1_F));
2161 seq_printf(seq, " ChnCount0: %3s\n", yesno(rssconf & CHNCOUNT0_F));
2162 seq_printf(seq, " ChnUndFlow3: %3s\n", yesno(rssconf &
2163 CHNUNDFLOW3_F));
2164 seq_printf(seq, " ChnUndFlow2: %3s\n", yesno(rssconf &
2165 CHNUNDFLOW2_F));
2166 seq_printf(seq, " ChnUndFlow1: %3s\n", yesno(rssconf &
2167 CHNUNDFLOW1_F));
2168 seq_printf(seq, " ChnUndFlow0: %3s\n", yesno(rssconf &
2169 CHNUNDFLOW0_F));
2170 seq_printf(seq, " RstChn3: %3s\n", yesno(rssconf & RSTCHN3_F));
2171 seq_printf(seq, " RstChn2: %3s\n", yesno(rssconf & RSTCHN2_F));
2172 seq_printf(seq, " RstChn1: %3s\n", yesno(rssconf & RSTCHN1_F));
2173 seq_printf(seq, " RstChn0: %3s\n", yesno(rssconf & RSTCHN0_F));
2174 seq_printf(seq, " UpdVld: %3s\n", yesno(rssconf & UPDVLD_F));
2175 seq_printf(seq, " Xoff: %3s\n", yesno(rssconf & XOFF_F));
2176 seq_printf(seq, " UpdChn3: %3s\n", yesno(rssconf & UPDCHN3_F));
2177 seq_printf(seq, " UpdChn2: %3s\n", yesno(rssconf & UPDCHN2_F));
2178 seq_printf(seq, " UpdChn1: %3s\n", yesno(rssconf & UPDCHN1_F));
2179 seq_printf(seq, " UpdChn0: %3s\n", yesno(rssconf & UPDCHN0_F));
2180 seq_printf(seq, " Queue: %3d\n", QUEUE_G(rssconf));
2181
2182 return 0;
2183}
b09026c6 2184DEFINE_SHOW_ATTRIBUTE(rss_config);
688ea5fe
HS		 2185
2186/* RSS Secret Key.
2187 */
2188
2189static int rss_key_show(struct seq_file *seq, void *v)
2190{
2191 u32 key[10];
2192
5ccf9d04 2193 t4_read_rss_key(seq->private, key, true);
688ea5fe
HS		 2194 seq_printf(seq, "%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x\n",
2195 key[9], key[8], key[7], key[6], key[5], key[4], key[3],
2196 key[2], key[1], key[0]);
2197 return 0;
2198}
2199
2200static int rss_key_open(struct inode *inode, struct file *file)
2201{
2202 return single_open(file, rss_key_show, inode->i_private);
2203}
2204
2205static ssize_t rss_key_write(struct file *file, const char __user *buf,
2206 size_t count, loff_t *pos)
2207{
2208 int i, j;
2209 u32 key[10];
2210 char s[100], *p;
c1d81b1c 2211 struct adapter *adap = file_inode(file)->i_private;
688ea5fe
HS		 2212
2213 if (count > sizeof(s) - 1)
2214 return -EINVAL;
2215 if (copy_from_user(s, buf, count))
2216 return -EFAULT;
2217 for (i = count; i > 0 && isspace(s[i - 1]); i--)
2218 ;
2219 s[i] = '\0';
2220
2221 for (p = s, i = 9; i >= 0; i--) {
2222 key[i] = 0;
2223 for (j = 0; j < 8; j++, p++) {
2224 if (!isxdigit(*p))
2225 return -EINVAL;
2226 key[i] = (key[i] << 4) | hex2val(*p);
2227 }
2228 }
2229
5ccf9d04 2230 t4_write_rss_key(adap, key, -1, true);
688ea5fe
HS		 2231 return count;
2232}
2233
2234static const struct file_operations rss_key_debugfs_fops = {
2235 .owner = THIS_MODULE,
2236 .open = rss_key_open,
2237 .read = seq_read,
2238 .llseek = seq_lseek,
2239 .release = single_release,
2240 .write = rss_key_write
2241};
2242
2243/* PF RSS Configuration.
2244 */
2245
2246struct rss_pf_conf {
2247 u32 rss_pf_map;
2248 u32 rss_pf_mask;
2249 u32 rss_pf_config;
2250};
2251
2252static int rss_pf_config_show(struct seq_file *seq, void *v, int idx)
2253{
2254 struct rss_pf_conf *pfconf;
2255
2256 if (v == SEQ_START_TOKEN) {
2257 /* use the 0th entry to dump the PF Map Index Size */
2258 pfconf = seq->private + offsetof(struct seq_tab, data);
2259 seq_printf(seq, "PF Map Index Size = %d\n\n",
2260 LKPIDXSIZE_G(pfconf->rss_pf_map));
2261
2262 seq_puts(seq, " RSS PF VF Hash Tuple Enable Default\n");
2263 seq_puts(seq, " Enable IPF Mask Mask IPv6 IPv4 UDP Queue\n");
2264 seq_puts(seq, " PF Map Chn Prt Map Size Size Four Two Four Two Four Ch1 Ch0\n");
2265 } else {
2266 #define G_PFnLKPIDX(map, n) \
2267 (((map) >> PF1LKPIDX_S*(n)) & PF0LKPIDX_M)
2268 #define G_PFnMSKSIZE(mask, n) \
2269 (((mask) >> PF1MSKSIZE_S*(n)) & PF1MSKSIZE_M)
2270
2271 pfconf = v;
2272 seq_printf(seq, "%3d %3s %3s %3s %3d %3d %3d %3s %3s %3s %3s %3s %3d %3d\n",
2273 idx,
2274 yesno(pfconf->rss_pf_config & MAPENABLE_F),
2275 yesno(pfconf->rss_pf_config & CHNENABLE_F),
2276 yesno(pfconf->rss_pf_config & PRTENABLE_F),
2277 G_PFnLKPIDX(pfconf->rss_pf_map, idx),
2278 G_PFnMSKSIZE(pfconf->rss_pf_mask, idx),
2279 IVFWIDTH_G(pfconf->rss_pf_config),
2280 yesno(pfconf->rss_pf_config & IP6FOURTUPEN_F),
2281 yesno(pfconf->rss_pf_config & IP6TWOTUPEN_F),
2282 yesno(pfconf->rss_pf_config & IP4FOURTUPEN_F),
2283 yesno(pfconf->rss_pf_config & IP4TWOTUPEN_F),
2284 yesno(pfconf->rss_pf_config & UDPFOURTUPEN_F),
2285 CH1DEFAULTQUEUE_G(pfconf->rss_pf_config),
2286 CH0DEFAULTQUEUE_G(pfconf->rss_pf_config));
2287
2288 #undef G_PFnLKPIDX
2289 #undef G_PFnMSKSIZE
2290 }
2291 return 0;
2292}
2293
2294static int rss_pf_config_open(struct inode *inode, struct file *file)
2295{
2296 struct adapter *adapter = inode->i_private;
2297 struct seq_tab *p;
2298 u32 rss_pf_map, rss_pf_mask;
2299 struct rss_pf_conf *pfconf;
2300 int pf;
2301
2302 p = seq_open_tab(file, 8, sizeof(*pfconf), 1, rss_pf_config_show);
2303 if (!p)
2304 return -ENOMEM;
2305
2306 pfconf = (struct rss_pf_conf *)p->data;
5ccf9d04
RL		 2307 rss_pf_map = t4_read_rss_pf_map(adapter, true);
2308 rss_pf_mask = t4_read_rss_pf_mask(adapter, true);
688ea5fe
HS		 2309 for (pf = 0; pf < 8; pf++) {
2310 pfconf[pf].rss_pf_map = rss_pf_map;
2311 pfconf[pf].rss_pf_mask = rss_pf_mask;
5ccf9d04
RL		 2312 t4_read_rss_pf_config(adapter, pf, &pfconf[pf].rss_pf_config,
2313 true);
688ea5fe
HS		 2314 }
2315 return 0;
2316}
2317
2318static const struct file_operations rss_pf_config_debugfs_fops = {
2319 .owner = THIS_MODULE,
2320 .open = rss_pf_config_open,
2321 .read = seq_read,
2322 .llseek = seq_lseek,
2323 .release = seq_release_private
2324};
2325
2326/* VF RSS Configuration.
2327 */
2328
2329struct rss_vf_conf {
2330 u32 rss_vf_vfl;
2331 u32 rss_vf_vfh;
2332};
2333
2334static int rss_vf_config_show(struct seq_file *seq, void *v, int idx)
2335{
2336 if (v == SEQ_START_TOKEN) {
2337 seq_puts(seq, " RSS Hash Tuple Enable\n");
2338 seq_puts(seq, " Enable IVF Dis Enb IPv6 IPv4 UDP Def Secret Key\n");
2339 seq_puts(seq, " VF Chn Prt Map VLAN uP Four Two Four Two Four Que Idx Hash\n");
2340 } else {
2341 struct rss_vf_conf *vfconf = v;
2342
2343 seq_printf(seq, "%3d %3s %3s %3d %3s %3s %3s %3s %3s %3s %3s %4d %3d %#10x\n",
2344 idx,
2345 yesno(vfconf->rss_vf_vfh & VFCHNEN_F),
2346 yesno(vfconf->rss_vf_vfh & VFPRTEN_F),
2347 VFLKPIDX_G(vfconf->rss_vf_vfh),
2348 yesno(vfconf->rss_vf_vfh & VFVLNEX_F),
2349 yesno(vfconf->rss_vf_vfh & VFUPEN_F),
2350 yesno(vfconf->rss_vf_vfh & VFIP4FOURTUPEN_F),
2351 yesno(vfconf->rss_vf_vfh & VFIP6TWOTUPEN_F),
2352 yesno(vfconf->rss_vf_vfh & VFIP4FOURTUPEN_F),
2353 yesno(vfconf->rss_vf_vfh & VFIP4TWOTUPEN_F),
2354 yesno(vfconf->rss_vf_vfh & ENABLEUDPHASH_F),
2355 DEFAULTQUEUE_G(vfconf->rss_vf_vfh),
2356 KEYINDEX_G(vfconf->rss_vf_vfh),
2357 vfconf->rss_vf_vfl);
2358 }
2359 return 0;
2360}
2361
2362static int rss_vf_config_open(struct inode *inode, struct file *file)
2363{
2364 struct adapter *adapter = inode->i_private;
2365 struct seq_tab *p;
2366 struct rss_vf_conf *vfconf;
3ccc6cf7 2367 int vf, vfcount = adapter->params.arch.vfcount;
688ea5fe 2368
3ccc6cf7 2369 p = seq_open_tab(file, vfcount, sizeof(*vfconf), 1, rss_vf_config_show);
688ea5fe
HS		 2370 if (!p)
2371 return -ENOMEM;
2372
2373 vfconf = (struct rss_vf_conf *)p->data;
3ccc6cf7 2374 for (vf = 0; vf < vfcount; vf++) {
688ea5fe 2375 t4_read_rss_vf_config(adapter, vf, &vfconf[vf].rss_vf_vfl,
5ccf9d04 2376 &vfconf[vf].rss_vf_vfh, true);
688ea5fe
HS		 2377 }
2378 return 0;
2379}
2380
2381static const struct file_operations rss_vf_config_debugfs_fops = {
2382 .owner = THIS_MODULE,
2383 .open = rss_vf_config_open,
2384 .read = seq_read,
2385 .llseek = seq_lseek,
2386 .release = seq_release_private
2387};
2388
ebddd97a
GG		 2389#ifdef CONFIG_CHELSIO_T4_DCB
2390extern char *dcb_ver_array[];
2391
2392/* Data Center Briging information for each port.
2393 */
2394static int dcb_info_show(struct seq_file *seq, void *v)
2395{
2396 struct adapter *adap = seq->private;
2397
2398 if (v == SEQ_START_TOKEN) {
2399 seq_puts(seq, "Data Center Bridging Information\n");
2400 } else {
2401 int port = (uintptr_t)v - 2;
2402 struct net_device *dev = adap->port[port];
2403 struct port_info *pi = netdev2pinfo(dev);
2404 struct port_dcb_info *dcb = &pi->dcb;
2405
2406 seq_puts(seq, "\n");
2407 seq_printf(seq, "Port: %d (DCB negotiated: %s)\n",
2408 port,
2409 cxgb4_dcb_enabled(dev) ? "yes" : "no");
2410
2411 if (cxgb4_dcb_enabled(dev))
2412 seq_printf(seq, "[ DCBx Version %s ]\n",
2413 dcb_ver_array[dcb->dcb_version]);
2414
2415 if (dcb->msgs) {
2416 int i;
2417
2418 seq_puts(seq, "\n Index\t\t\t :\t");
2419 for (i = 0; i < 8; i++)
2420 seq_printf(seq, " %3d", i);
2421 seq_puts(seq, "\n\n");
2422 }
2423
2424 if (dcb->msgs & CXGB4_DCB_FW_PGID) {
2425 int prio, pgid;
2426
2427 seq_puts(seq, " Priority Group IDs\t :\t");
2428 for (prio = 0; prio < 8; prio++) {
2429 pgid = (dcb->pgid >> 4 * (7 - prio)) & 0xf;
2430 seq_printf(seq, " %3d", pgid);
2431 }
2432 seq_puts(seq, "\n");
2433 }
2434
2435 if (dcb->msgs & CXGB4_DCB_FW_PGRATE) {
2436 int pg;
2437
2438 seq_puts(seq, " Priority Group BW(%)\t :\t");
2439 for (pg = 0; pg < 8; pg++)
2440 seq_printf(seq, " %3d", dcb->pgrate[pg]);
2441 seq_puts(seq, "\n");
2442
2443 if (dcb->dcb_version == FW_PORT_DCB_VER_IEEE) {
2444 seq_puts(seq, " TSA Algorithm\t\t :\t");
2445 for (pg = 0; pg < 8; pg++)
2446 seq_printf(seq, " %3d", dcb->tsa[pg]);
2447 seq_puts(seq, "\n");
2448 }
2449
2450 seq_printf(seq, " Max PG Traffic Classes [%3d ]\n",
2451 dcb->pg_num_tcs_supported);
2452
2453 seq_puts(seq, "\n");
2454 }
2455
2456 if (dcb->msgs & CXGB4_DCB_FW_PRIORATE) {
2457 int prio;
2458
2459 seq_puts(seq, " Priority Rate\t:\t");
2460 for (prio = 0; prio < 8; prio++)
2461 seq_printf(seq, " %3d", dcb->priorate[prio]);
2462 seq_puts(seq, "\n");
2463 }
2464
2465 if (dcb->msgs & CXGB4_DCB_FW_PFC) {
2466 int prio;
2467
2468 seq_puts(seq, " Priority Flow Control :\t");
2469 for (prio = 0; prio < 8; prio++) {
2470 int pfcen = (dcb->pfcen >> 1 * (7 - prio))
2471 & 0x1;
2472 seq_printf(seq, " %3d", pfcen);
2473 }
2474 seq_puts(seq, "\n");
2475
2476 seq_printf(seq, " Max PFC Traffic Classes [%3d ]\n",
2477 dcb->pfc_num_tcs_supported);
2478
2479 seq_puts(seq, "\n");
2480 }
2481
2482 if (dcb->msgs & CXGB4_DCB_FW_APP_ID) {
2483 int app, napps;
2484
2485 seq_puts(seq, " Application Information:\n");
2486 seq_puts(seq, " App Priority Selection Protocol\n");
2487 seq_puts(seq, " Index Map Field ID\n");
2488 for (app = 0, napps = 0;
2489 app < CXGB4_MAX_DCBX_APP_SUPPORTED; app++) {
2490 struct app_priority *ap;
2491 static const char * const sel_names[] = {
2492 "Ethertype",
2493 "Socket TCP",
2494 "Socket UDP",
2495 "Socket All",
2496 };
2497 const char *sel_name;
2498
2499 ap = &dcb->app_priority[app];
2500 /* skip empty slots */
2501 if (ap->protocolid == 0)
2502 continue;
2503 napps++;
2504
2505 if (ap->sel_field < ARRAY_SIZE(sel_names))
2506 sel_name = sel_names[ap->sel_field];
2507 else
2508 sel_name = "UNKNOWN";
2509
2510 seq_printf(seq, " %3d %#04x %-10s (%d) %#06x (%d)\n",
2511 app,
2512 ap->user_prio_map,
2513 sel_name, ap->sel_field,
2514 ap->protocolid, ap->protocolid);
2515 }
2516 if (napps == 0)
2517 seq_puts(seq, " --- None ---\n");
2518 }
2519 }
2520 return 0;
2521}
2522
2523static inline void *dcb_info_get_idx(struct adapter *adap, loff_t pos)
2524{
2525 return (pos <= adap->params.nports
2526 ? (void *)((uintptr_t)pos + 1)
2527 : NULL);
2528}
2529
2530static void *dcb_info_start(struct seq_file *seq, loff_t *pos)
2531{
2532 struct adapter *adap = seq->private;
2533
2534 return (*pos
2535 ? dcb_info_get_idx(adap, *pos)
2536 : SEQ_START_TOKEN);
2537}
2538
2539static void dcb_info_stop(struct seq_file *seq, void *v)
2540{
2541}
2542
2543static void *dcb_info_next(struct seq_file *seq, void *v, loff_t *pos)
2544{
2545 struct adapter *adap = seq->private;
2546
2547 (*pos)++;
2548 return dcb_info_get_idx(adap, *pos);
2549}
2550
2551static const struct seq_operations dcb_info_seq_ops = {
2552 .start = dcb_info_start,
2553 .next = dcb_info_next,
2554 .stop = dcb_info_stop,
2555 .show = dcb_info_show
2556};
2557
2558static int dcb_info_open(struct inode *inode, struct file *file)
2559{
2560 int res = seq_open(file, &dcb_info_seq_ops);
2561
2562 if (!res) {
2563 struct seq_file *seq = file->private_data;
2564
2565 seq->private = inode->i_private;
2566 }
2567 return res;
2568}
2569
2570static const struct file_operations dcb_info_debugfs_fops = {
2571 .owner = THIS_MODULE,
2572 .open = dcb_info_open,
2573 .read = seq_read,
2574 .llseek = seq_lseek,
2575 .release = seq_release,
2576};
2577#endif /* CONFIG_CHELSIO_T4_DCB */
2578
0eaec62a
CL		 2579static int resources_show(struct seq_file *seq, void *v)
2580{
2581 struct adapter *adapter = seq->private;
2582 struct pf_resources *pfres = &adapter->params.pfres;
2583
2584 #define S(desc, fmt, var) \
2585 seq_printf(seq, "%-60s " fmt "\n", \
2586 desc " (" #var "):", pfres->var)
2587
2588 S("Virtual Interfaces", "%d", nvi);
2589 S("Egress Queues", "%d", neq);
2590 S("Ethernet Control", "%d", nethctrl);
2591 S("Ingress Queues/w Free Lists/Interrupts", "%d", niqflint);
2592 S("Ingress Queues", "%d", niq);
2593 S("Traffic Class", "%d", tc);
2594 S("Port Access Rights Mask", "%#x", pmask);
2595 S("MAC Address Filters", "%d", nexactf);
2596 S("Firmware Command Read Capabilities", "%#x", r_caps);
2597 S("Firmware Command Write/Execute Capabilities", "%#x", wx_caps);
2598
2599 #undef S
2600
2601 return 0;
2602}
b09026c6 2603DEFINE_SHOW_ATTRIBUTE(resources);
0eaec62a 2604
3051fa61
HS		 2605/**
2606 * ethqset2pinfo - return port_info of an Ethernet Queue Set
2607 * @adap: the adapter
2608 * @qset: Ethernet Queue Set
2609 */
2610static inline struct port_info *ethqset2pinfo(struct adapter *adap, int qset)
2611{
2612 int pidx;
2613
2614 for_each_port(adap, pidx) {
2615 struct port_info *pi = adap2pinfo(adap, pidx);
2616
2617 if (qset >= pi->first_qset &&
2618 qset < pi->first_qset + pi->nqsets)
2619 return pi;
2620 }
2621
2622 /* should never happen! */
047a013f 2623 BUG();
3051fa61
HS		 2624 return NULL;
2625}
2626
27defe9d
RL		 2627static int sge_qinfo_uld_txq_entries(const struct adapter *adap, int uld)
2628{
2629 const struct sge_uld_txq_info *utxq_info = adap->sge.uld_txq_info[uld];
2630
2631 if (!utxq_info)
2632 return 0;
2633
2634 return DIV_ROUND_UP(utxq_info->ntxq, 4);
2635}
2636
2637static int sge_qinfo_uld_rspq_entries(const struct adapter *adap, int uld,
2638 bool ciq)
2639{
2640 const struct sge_uld_rxq_info *urxq_info = adap->sge.uld_rxq_info[uld];
2641
2642 if (!urxq_info)
2643 return 0;
2644
2645 return ciq ? DIV_ROUND_UP(urxq_info->nciq, 4) :
2646 DIV_ROUND_UP(urxq_info->nrxq, 4);
2647}
2648
2649static int sge_qinfo_uld_rxq_entries(const struct adapter *adap, int uld)
2650{
2651 return sge_qinfo_uld_rspq_entries(adap, uld, false);
2652}
2653
2654static int sge_qinfo_uld_ciq_entries(const struct adapter *adap, int uld)
2655{
2656 return sge_qinfo_uld_rspq_entries(adap, uld, true);
2657}
2658
dc9daab2
HS		 2659static int sge_qinfo_show(struct seq_file *seq, void *v)
2660{
27defe9d
RL		 2661 int uld_rxq_entries[CXGB4_ULD_MAX] = { 0 };
2662 int uld_ciq_entries[CXGB4_ULD_MAX] = { 0 };
2663 int uld_txq_entries[CXGB4_TX_MAX] = { 0 };
2664 const struct sge_uld_txq_info *utxq_info;
2665 const struct sge_uld_rxq_info *urxq_info;
dc9daab2 2666 struct adapter *adap = seq->private;
27defe9d
RL		 2667 int i, n, r = (uintptr_t)v - 1;
2668 int eth_entries, ctrl_entries;
2669 struct sge *s = &adap->sge;
2670
2671 eth_entries = DIV_ROUND_UP(adap->sge.ethqsets, 4);
2672 ctrl_entries = DIV_ROUND_UP(MAX_CTRL_QUEUES, 4);
2673
2674 mutex_lock(&uld_mutex);
2675 if (s->uld_txq_info)
2676 for (i = 0; i < ARRAY_SIZE(uld_txq_entries); i++)
2677 uld_txq_entries[i] = sge_qinfo_uld_txq_entries(adap, i);
2678
2679 if (s->uld_rxq_info) {
2680 for (i = 0; i < ARRAY_SIZE(uld_rxq_entries); i++) {
2681 uld_rxq_entries[i] = sge_qinfo_uld_rxq_entries(adap, i);
2682 uld_ciq_entries[i] = sge_qinfo_uld_ciq_entries(adap, i);
2683 }
2684 }
dc9daab2
HS		 2685
2686 if (r)
2687 seq_putc(seq, '\n');
2688
2689#define S3(fmt_spec, s, v) \
2690do { \
2691 seq_printf(seq, "%-12s", s); \
2692 for (i = 0; i < n; ++i) \
2693 seq_printf(seq, " %16" fmt_spec, v); \
2694 seq_putc(seq, '\n'); \
2695} while (0)
2696#define S(s, v) S3("s", s, v)
e106a4d9 2697#define T3(fmt_spec, s, v) S3(fmt_spec, s, tx[i].v)
dc9daab2 2698#define T(s, v) S3("u", s, tx[i].v)
e106a4d9
HS		 2699#define TL(s, v) T3("lu", s, v)
2700#define R3(fmt_spec, s, v) S3(fmt_spec, s, rx[i].v)
dc9daab2 2701#define R(s, v) S3("u", s, rx[i].v)
e106a4d9 2702#define RL(s, v) R3("lu", s, v)
dc9daab2
HS		 2703
2704 if (r < eth_entries) {
2705 int base_qset = r * 4;
27defe9d
RL		 2706 const struct sge_eth_rxq *rx = &s->ethrxq[base_qset];
2707 const struct sge_eth_txq *tx = &s->ethtxq[base_qset];
2708
2709 n = min(4, s->ethqsets - 4 * r);
dc9daab2
HS		 2710
2711 S("QType:", "Ethernet");
2712 S("Interface:",
2713 rx[i].rspq.netdev ? rx[i].rspq.netdev->name : "N/A");
2714 T("TxQ ID:", q.cntxt_id);
2715 T("TxQ size:", q.size);
2716 T("TxQ inuse:", q.in_use);
2717 T("TxQ CIDX:", q.cidx);
2718 T("TxQ PIDX:", q.pidx);
3051fa61 2719#ifdef CONFIG_CHELSIO_T4_DCB
dc9daab2
HS		 2720 T("DCB Prio:", dcb_prio);
2721 S3("u", "DCB PGID:",
2722 (ethqset2pinfo(adap, base_qset + i)->dcb.pgid >>
2723 4*(7-tx[i].dcb_prio)) & 0xf);
2724 S3("u", "DCB PFC:",
2725 (ethqset2pinfo(adap, base_qset + i)->dcb.pfcen >>
2726 1*(7-tx[i].dcb_prio)) & 0x1);
2727#endif
2728 R("RspQ ID:", rspq.abs_id);
2729 R("RspQ size:", rspq.size);
2730 R("RspQE size:", rspq.iqe_len);
2731 R("RspQ CIDX:", rspq.cidx);
2732 R("RspQ Gen:", rspq.gen);
2733 S3("u", "Intr delay:", qtimer_val(adap, &rx[i].rspq));
27defe9d 2734 S3("u", "Intr pktcnt:", s->counter_val[rx[i].rspq.pktcnt_idx]);
dc9daab2
HS		 2735 R("FL ID:", fl.cntxt_id);
2736 R("FL size:", fl.size - 8);
2737 R("FL pend:", fl.pend_cred);
2738 R("FL avail:", fl.avail);
2739 R("FL PIDX:", fl.pidx);
2740 R("FL CIDX:", fl.cidx);
e106a4d9
HS		 2741 RL("RxPackets:", stats.pkts);
2742 RL("RxCSO:", stats.rx_cso);
2743 RL("VLANxtract:", stats.vlan_ex);
2744 RL("LROmerged:", stats.lro_merged);
2745 RL("LROpackets:", stats.lro_pkts);
2746 RL("RxDrops:", stats.rx_drops);
992bea8e 2747 RL("RxBadPkts:", stats.bad_rx_pkts);
e106a4d9
HS		 2748 TL("TSO:", tso);
2749 TL("TxCSO:", tx_cso);
2750 TL("VLANins:", vlan_ins);
2751 TL("TxQFull:", q.stops);
2752 TL("TxQRestarts:", q.restarts);
2753 TL("TxMapErr:", mapping_err);
2754 RL("FLAllocErr:", fl.alloc_failed);
2755 RL("FLLrgAlcErr:", fl.large_alloc_failed);
70055dd0
HS		 2756 RL("FLMapErr:", fl.mapping_err);
2757 RL("FLLow:", fl.low);
e106a4d9
HS		 2758 RL("FLStarving:", fl.starving);
2759
27defe9d
RL		 2760 goto unlock;
2761 }
2762
2763 r -= eth_entries;
2764 if (r < uld_txq_entries[CXGB4_TX_OFLD]) {
2765 const struct sge_uld_txq *tx;
2766
2767 utxq_info = s->uld_txq_info[CXGB4_TX_OFLD];
2768 tx = &utxq_info->uldtxq[r * 4];
2769 n = min(4, utxq_info->ntxq - 4 * r);
2770
2771 S("QType:", "OFLD-TXQ");
2772 T("TxQ ID:", q.cntxt_id);
2773 T("TxQ size:", q.size);
2774 T("TxQ inuse:", q.in_use);
2775 T("TxQ CIDX:", q.cidx);
2776 T("TxQ PIDX:", q.pidx);
2777
2778 goto unlock;
2779 }
2780
2781 r -= uld_txq_entries[CXGB4_TX_OFLD];
2782 if (r < uld_rxq_entries[CXGB4_ULD_RDMA]) {
2783 const struct sge_ofld_rxq *rx;
2784
2785 urxq_info = s->uld_rxq_info[CXGB4_ULD_RDMA];
2786 rx = &urxq_info->uldrxq[r * 4];
2787 n = min(4, urxq_info->nrxq - 4 * r);
2788
2789 S("QType:", "RDMA-CPL");
2790 S("Interface:",
2791 rx[i].rspq.netdev ? rx[i].rspq.netdev->name : "N/A");
2792 R("RspQ ID:", rspq.abs_id);
2793 R("RspQ size:", rspq.size);
2794 R("RspQE size:", rspq.iqe_len);
2795 R("RspQ CIDX:", rspq.cidx);
2796 R("RspQ Gen:", rspq.gen);
2797 S3("u", "Intr delay:", qtimer_val(adap, &rx[i].rspq));
2798 S3("u", "Intr pktcnt:", s->counter_val[rx[i].rspq.pktcnt_idx]);
2799 R("FL ID:", fl.cntxt_id);
2800 R("FL size:", fl.size - 8);
2801 R("FL pend:", fl.pend_cred);
2802 R("FL avail:", fl.avail);
2803 R("FL PIDX:", fl.pidx);
2804 R("FL CIDX:", fl.cidx);
2805
2806 goto unlock;
2807 }
2808
2809 r -= uld_rxq_entries[CXGB4_ULD_RDMA];
2810 if (r < uld_ciq_entries[CXGB4_ULD_RDMA]) {
2811 const struct sge_ofld_rxq *rx;
2812 int ciq_idx = 0;
2813
2814 urxq_info = s->uld_rxq_info[CXGB4_ULD_RDMA];
2815 ciq_idx = urxq_info->nrxq + (r * 4);
2816 rx = &urxq_info->uldrxq[ciq_idx];
2817 n = min(4, urxq_info->nciq - 4 * r);
2818
2819 S("QType:", "RDMA-CIQ");
2820 S("Interface:",
2821 rx[i].rspq.netdev ? rx[i].rspq.netdev->name : "N/A");
2822 R("RspQ ID:", rspq.abs_id);
2823 R("RspQ size:", rspq.size);
2824 R("RspQE size:", rspq.iqe_len);
2825 R("RspQ CIDX:", rspq.cidx);
2826 R("RspQ Gen:", rspq.gen);
2827 S3("u", "Intr delay:", qtimer_val(adap, &rx[i].rspq));
2828 S3("u", "Intr pktcnt:", s->counter_val[rx[i].rspq.pktcnt_idx]);
2829
2830 goto unlock;
2831 }
2832
2833 r -= uld_ciq_entries[CXGB4_ULD_RDMA];
2834 if (r < uld_rxq_entries[CXGB4_ULD_ISCSI]) {
2835 const struct sge_ofld_rxq *rx;
2836
2837 urxq_info = s->uld_rxq_info[CXGB4_ULD_ISCSI];
2838 rx = &urxq_info->uldrxq[r * 4];
2839 n = min(4, urxq_info->nrxq - 4 * r);
2840
2841 S("QType:", "iSCSI");
2842 R("RspQ ID:", rspq.abs_id);
2843 R("RspQ size:", rspq.size);
2844 R("RspQE size:", rspq.iqe_len);
2845 R("RspQ CIDX:", rspq.cidx);
2846 R("RspQ Gen:", rspq.gen);
2847 S3("u", "Intr delay:", qtimer_val(adap, &rx[i].rspq));
2848 S3("u", "Intr pktcnt:", s->counter_val[rx[i].rspq.pktcnt_idx]);
2849 R("FL ID:", fl.cntxt_id);
2850 R("FL size:", fl.size - 8);
2851 R("FL pend:", fl.pend_cred);
2852 R("FL avail:", fl.avail);
2853 R("FL PIDX:", fl.pidx);
2854 R("FL CIDX:", fl.cidx);
2855
2856 goto unlock;
2857 }
2858
2859 r -= uld_rxq_entries[CXGB4_ULD_ISCSI];
2860 if (r < uld_rxq_entries[CXGB4_ULD_ISCSIT]) {
2861 const struct sge_ofld_rxq *rx;
2862
2863 urxq_info = s->uld_rxq_info[CXGB4_ULD_ISCSIT];
2864 rx = &urxq_info->uldrxq[r * 4];
2865 n = min(4, urxq_info->nrxq - 4 * r);
2866
2867 S("QType:", "iSCSIT");
2868 R("RspQ ID:", rspq.abs_id);
2869 R("RspQ size:", rspq.size);
2870 R("RspQE size:", rspq.iqe_len);
2871 R("RspQ CIDX:", rspq.cidx);
2872 R("RspQ Gen:", rspq.gen);
2873 S3("u", "Intr delay:", qtimer_val(adap, &rx[i].rspq));
2874 S3("u", "Intr pktcnt:", s->counter_val[rx[i].rspq.pktcnt_idx]);
2875 R("FL ID:", fl.cntxt_id);
2876 R("FL size:", fl.size - 8);
2877 R("FL pend:", fl.pend_cred);
2878 R("FL avail:", fl.avail);
2879 R("FL PIDX:", fl.pidx);
2880 R("FL CIDX:", fl.cidx);
2881
2882 goto unlock;
2883 }
2884
2885 r -= uld_rxq_entries[CXGB4_ULD_ISCSIT];
2886 if (r < uld_rxq_entries[CXGB4_ULD_TLS]) {
2887 const struct sge_ofld_rxq *rx;
2888
2889 urxq_info = s->uld_rxq_info[CXGB4_ULD_TLS];
2890 rx = &urxq_info->uldrxq[r * 4];
2891 n = min(4, urxq_info->nrxq - 4 * r);
2892
2893 S("QType:", "TLS");
2894 R("RspQ ID:", rspq.abs_id);
2895 R("RspQ size:", rspq.size);
2896 R("RspQE size:", rspq.iqe_len);
2897 R("RspQ CIDX:", rspq.cidx);
2898 R("RspQ Gen:", rspq.gen);
2899 S3("u", "Intr delay:", qtimer_val(adap, &rx[i].rspq));
2900 S3("u", "Intr pktcnt:", s->counter_val[rx[i].rspq.pktcnt_idx]);
2901 R("FL ID:", fl.cntxt_id);
2902 R("FL size:", fl.size - 8);
2903 R("FL pend:", fl.pend_cred);
2904 R("FL avail:", fl.avail);
2905 R("FL PIDX:", fl.pidx);
2906 R("FL CIDX:", fl.cidx);
2907
2908 goto unlock;
2909 }
2910
2911 r -= uld_rxq_entries[CXGB4_ULD_TLS];
2912 if (r < uld_txq_entries[CXGB4_TX_CRYPTO]) {
2913 const struct sge_ofld_rxq *rx;
2914 const struct sge_uld_txq *tx;
2915
2916 utxq_info = s->uld_txq_info[CXGB4_TX_CRYPTO];
2917 urxq_info = s->uld_rxq_info[CXGB4_ULD_CRYPTO];
2918 tx = &utxq_info->uldtxq[r * 4];
2919 rx = &urxq_info->uldrxq[r * 4];
2920 n = min(4, utxq_info->ntxq - 4 * r);
2921
2922 S("QType:", "Crypto");
2923 T("TxQ ID:", q.cntxt_id);
2924 T("TxQ size:", q.size);
2925 T("TxQ inuse:", q.in_use);
2926 T("TxQ CIDX:", q.cidx);
2927 T("TxQ PIDX:", q.pidx);
2928 R("RspQ ID:", rspq.abs_id);
2929 R("RspQ size:", rspq.size);
2930 R("RspQE size:", rspq.iqe_len);
2931 R("RspQ CIDX:", rspq.cidx);
2932 R("RspQ Gen:", rspq.gen);
2933 S3("u", "Intr delay:", qtimer_val(adap, &rx[i].rspq));
2934 S3("u", "Intr pktcnt:", s->counter_val[rx[i].rspq.pktcnt_idx]);
2935 R("FL ID:", fl.cntxt_id);
2936 R("FL size:", fl.size - 8);
2937 R("FL pend:", fl.pend_cred);
2938 R("FL avail:", fl.avail);
2939 R("FL PIDX:", fl.pidx);
2940 R("FL CIDX:", fl.cidx);
2941
2942 goto unlock;
2943 }
2944
2945 r -= uld_txq_entries[CXGB4_TX_CRYPTO];
2946 if (r < ctrl_entries) {
2947 const struct sge_ctrl_txq *tx = &s->ctrlq[r * 4];
2948
2949 n = min(4, adap->params.nports - 4 * r);
dc9daab2
HS		 2950
2951 S("QType:", "Control");
2952 T("TxQ ID:", q.cntxt_id);
2953 T("TxQ size:", q.size);
2954 T("TxQ inuse:", q.in_use);
2955 T("TxQ CIDX:", q.cidx);
2956 T("TxQ PIDX:", q.pidx);
e106a4d9
HS		 2957 TL("TxQFull:", q.stops);
2958 TL("TxQRestarts:", q.restarts);
27defe9d
RL		 2959
2960 goto unlock;
2961 }
2962
2963 r -= ctrl_entries;
2964 if (r < 1) {
2965 const struct sge_rspq *evtq = &s->fw_evtq;
dc9daab2
HS		 2966
2967 seq_printf(seq, "%-12s %16s\n", "QType:", "FW event queue");
2968 seq_printf(seq, "%-12s %16u\n", "RspQ ID:", evtq->abs_id);
2969 seq_printf(seq, "%-12s %16u\n", "RspQ size:", evtq->size);
2970 seq_printf(seq, "%-12s %16u\n", "RspQE size:", evtq->iqe_len);
2971 seq_printf(seq, "%-12s %16u\n", "RspQ CIDX:", evtq->cidx);
2972 seq_printf(seq, "%-12s %16u\n", "RspQ Gen:", evtq->gen);
2973 seq_printf(seq, "%-12s %16u\n", "Intr delay:",
2974 qtimer_val(adap, evtq));
2975 seq_printf(seq, "%-12s %16u\n", "Intr pktcnt:",
27defe9d
RL		 2976 s->counter_val[evtq->pktcnt_idx]);
2977
2978 goto unlock;
dc9daab2 2979 }
27defe9d
RL		 2980
2981unlock:
2982 mutex_unlock(&uld_mutex);
dc9daab2 2983#undef R
e106a4d9 2984#undef RL
dc9daab2 2985#undef T
e106a4d9 2986#undef TL
dc9daab2 2987#undef S
e106a4d9
HS		 2988#undef R3
2989#undef T3
dc9daab2 2990#undef S3
2f3a8732 2991 return 0;
dc9daab2
HS		 2992}
2993
2994static int sge_queue_entries(const struct adapter *adap)
2995{
27defe9d
RL		 2996 int tot_uld_entries = 0;
2997 int i;
2998
2999 mutex_lock(&uld_mutex);
3000 for (i = 0; i < CXGB4_TX_MAX; i++)
3001 tot_uld_entries += sge_qinfo_uld_txq_entries(adap, i);
3002
3003 for (i = 0; i < CXGB4_ULD_MAX; i++) {
3004 tot_uld_entries += sge_qinfo_uld_rxq_entries(adap, i);
3005 tot_uld_entries += sge_qinfo_uld_ciq_entries(adap, i);
3006 }
3007 mutex_unlock(&uld_mutex);
3008
dc9daab2 3009 return DIV_ROUND_UP(adap->sge.ethqsets, 4) +
27defe9d 3010 tot_uld_entries +
dc9daab2
HS		 3011 DIV_ROUND_UP(MAX_CTRL_QUEUES, 4) + 1;
3012}
3013
3014static void *sge_queue_start(struct seq_file *seq, loff_t *pos)
3015{
3016 int entries = sge_queue_entries(seq->private);
3017
3018 return *pos < entries ? (void *)((uintptr_t)*pos + 1) : NULL;
3019}
3020
3021static void sge_queue_stop(struct seq_file *seq, void *v)
3022{
3023}
3024
3025static void *sge_queue_next(struct seq_file *seq, void *v, loff_t *pos)
3026{
3027 int entries = sge_queue_entries(seq->private);
3028
3029 ++*pos;
3030 return *pos < entries ? (void *)((uintptr_t)*pos + 1) : NULL;
3031}
3032
3033static const struct seq_operations sge_qinfo_seq_ops = {
3034 .start = sge_queue_start,
3035 .next = sge_queue_next,
3036 .stop = sge_queue_stop,
3037 .show = sge_qinfo_show
3038};
3039
3040static int sge_qinfo_open(struct inode *inode, struct file *file)
3041{
3042 int res = seq_open(file, &sge_qinfo_seq_ops);
3043
3044 if (!res) {
3045 struct seq_file *seq = file->private_data;
3046
3047 seq->private = inode->i_private;
3048 }
3049 return res;
3050}
3051
3052static const struct file_operations sge_qinfo_debugfs_fops = {
3053 .owner = THIS_MODULE,
3054 .open = sge_qinfo_open,
3055 .read = seq_read,
3056 .llseek = seq_lseek,
3057 .release = seq_release,
3058};
3059
49216c1c
HS		 3060int mem_open(struct inode *inode, struct file *file)
3061{
3062 unsigned int mem;
3063 struct adapter *adap;
3064
3065 file->private_data = inode->i_private;
3066
8b4e6b3c 3067 mem = (uintptr_t)file->private_data & 0x7;
49216c1c
HS		 3068 adap = file->private_data - mem;
3069
3070 (void)t4_fwcache(adap, FW_PARAM_DEV_FWCACHE_FLUSH);
3071
3072 return 0;
3073}
3074
fd88b31a
HS		 3075static ssize_t mem_read(struct file *file, char __user *buf, size_t count,
3076 loff_t *ppos)
3077{
3078 loff_t pos = *ppos;
3079 loff_t avail = file_inode(file)->i_size;
8b4e6b3c 3080 unsigned int mem = (uintptr_t)file->private_data & 0x7;
fd88b31a
HS		 3081 struct adapter *adap = file->private_data - mem;
3082 __be32 *data;
3083 int ret;
3084
3085 if (pos < 0)
3086 return -EINVAL;
3087 if (pos >= avail)
3088 return 0;
3089 if (count > avail - pos)
3090 count = avail - pos;
3091
752ade68 3092 data = kvzalloc(count, GFP_KERNEL);
fd88b31a
HS		 3093 if (!data)
3094 return -ENOMEM;
3095
3096 spin_lock(&adap->win0_lock);
3097 ret = t4_memory_rw(adap, 0, mem, pos, count, data, T4_MEMORY_READ);
3098 spin_unlock(&adap->win0_lock);
3099 if (ret) {
752ade68 3100 kvfree(data);
fd88b31a
HS		 3101 return ret;
3102 }
3103 ret = copy_to_user(buf, data, count);
3104
752ade68 3105 kvfree(data);
fd88b31a
HS		 3106 if (ret)
3107 return -EFAULT;
3108
3109 *ppos = pos + count;
3110 return count;
3111}
fd88b31a
HS		 3112static const struct file_operations mem_debugfs_fops = {
3113 .owner = THIS_MODULE,
3114 .open = simple_open,
3115 .read = mem_read,
3116 .llseek = default_llseek,
3117};
3118
a4011fd4
HS		 3119static int tid_info_show(struct seq_file *seq, void *v)
3120{
918341e0 3121 unsigned int tid_start = 0;
a4011fd4
HS		 3122 struct adapter *adap = seq->private;
3123 const struct tid_info *t = &adap->tids;
3124 enum chip_type chip = CHELSIO_CHIP_VERSION(adap->params.chip);
3125
918341e0
GG		 3126 if (chip > CHELSIO_T5)
3127 tid_start = t4_read_reg(adap, LE_DB_ACTIVE_TABLE_START_INDEX_A);
3128
a4011fd4
HS		 3129 if (t4_read_reg(adap, LE_DB_CONFIG_A) & HASHEN_F) {
3130 unsigned int sb;
1dec4cec
GG		 3131 seq_printf(seq, "Connections in use: %u\n",
3132 atomic_read(&t->conns_in_use));
a4011fd4
HS		 3133
3134 if (chip <= CHELSIO_T5)
3135 sb = t4_read_reg(adap, LE_DB_SERVER_INDEX_A) / 4;
3136 else
3137 sb = t4_read_reg(adap, LE_DB_SRVR_START_INDEX_A);
3138
3139 if (sb) {
918341e0
GG		 3140 seq_printf(seq, "TID range: %u..%u/%u..%u", tid_start,
3141 sb - 1, adap->tids.hash_base,
a4011fd4
HS		 3142 t->ntids - 1);
3143 seq_printf(seq, ", in use: %u/%u\n",
3144 atomic_read(&t->tids_in_use),
3145 atomic_read(&t->hash_tids_in_use));
80f61f19 3146 } else if (adap->flags & CXGB4_FW_OFLD_CONN) {
a4011fd4
HS		 3147 seq_printf(seq, "TID range: %u..%u/%u..%u",
3148 t->aftid_base,
3149 t->aftid_end,
3150 adap->tids.hash_base,
3151 t->ntids - 1);
3152 seq_printf(seq, ", in use: %u/%u\n",
3153 atomic_read(&t->tids_in_use),
3154 atomic_read(&t->hash_tids_in_use));
3155 } else {
3156 seq_printf(seq, "TID range: %u..%u",
3157 adap->tids.hash_base,
3158 t->ntids - 1);
3159 seq_printf(seq, ", in use: %u\n",
3160 atomic_read(&t->hash_tids_in_use));
3161 }
3162 } else if (t->ntids) {
1dec4cec
GG		 3163 seq_printf(seq, "Connections in use: %u\n",
3164 atomic_read(&t->conns_in_use));
3165
918341e0
GG		 3166 seq_printf(seq, "TID range: %u..%u", tid_start,
3167 tid_start + t->ntids - 1);
a4011fd4
HS		 3168 seq_printf(seq, ", in use: %u\n",
3169 atomic_read(&t->tids_in_use));
3170 }
3171
3172 if (t->nstids)
1dec4cec 3173 seq_printf(seq, "STID range: %u..%u, in use-IPv4/IPv6: %u/%u\n",
a4011fd4
HS		 3174 (!t->stid_base &&
3175 (chip <= CHELSIO_T5)) ?
3176 t->stid_base + 1 : t->stid_base,
1dec4cec
GG		 3177 t->stid_base + t->nstids - 1,
3178 t->stids_in_use - t->v6_stids_in_use,
3179 t->v6_stids_in_use);
3180
a4011fd4
HS		 3181 if (t->natids)
3182 seq_printf(seq, "ATID range: 0..%u, in use: %u\n",
3183 t->natids - 1, t->atids_in_use);
3184 seq_printf(seq, "FTID range: %u..%u\n", t->ftid_base,
3185 t->ftid_base + t->nftids - 1);
3186 if (t->nsftids)
3187 seq_printf(seq, "SFTID range: %u..%u in use: %u\n",
3188 t->sftid_base, t->sftid_base + t->nsftids - 2,
3189 t->sftids_in_use);
3190 if (t->ntids)
3191 seq_printf(seq, "HW TID usage: %u IP users, %u IPv6 users\n",
3192 t4_read_reg(adap, LE_DB_ACT_CNT_IPV4_A),
3193 t4_read_reg(adap, LE_DB_ACT_CNT_IPV6_A));
3194 return 0;
3195}
b09026c6 3196DEFINE_SHOW_ATTRIBUTE(tid_info);
a4011fd4 3197
fd88b31a
HS		 3198static void add_debugfs_mem(struct adapter *adap, const char *name,
3199 unsigned int idx, unsigned int size_mb)
3200{
d3757ba4 3201 debugfs_create_file_size(name, 0400, adap->debugfs_root,
e59b4e91
DH		 3202 (void *)adap + idx, &mem_debugfs_fops,
3203 size_mb << 20);
fd88b31a
HS		 3204}
3205
5b377d11
HS		 3206static ssize_t blocked_fl_read(struct file *filp, char __user *ubuf,
3207 size_t count, loff_t *ppos)
3208{
3209 int len;
3210 const struct adapter *adap = filp->private_data;
3211 char *buf;
3212 ssize_t size = (adap->sge.egr_sz + 3) / 4 +
3213 adap->sge.egr_sz / 32 + 2; /* includes ,/\n/\0 */
3214
3215 buf = kzalloc(size, GFP_KERNEL);
3216 if (!buf)
3217 return -ENOMEM;
3218
3219 len = snprintf(buf, size - 1, "%*pb\n",
3220 adap->sge.egr_sz, adap->sge.blocked_fl);
3221 len += sprintf(buf + len, "\n");
3222 size = simple_read_from_buffer(ubuf, count, ppos, buf, len);
752ade68 3223 kvfree(buf);
5b377d11
HS		 3224 return size;
3225}
3226
3227static ssize_t blocked_fl_write(struct file *filp, const char __user *ubuf,
3228 size_t count, loff_t *ppos)
3229{
3230 int err;
3231 unsigned long *t;
3232 struct adapter *adap = filp->private_data;
3233
3234 t = kcalloc(BITS_TO_LONGS(adap->sge.egr_sz), sizeof(long), GFP_KERNEL);
3235 if (!t)
3236 return -ENOMEM;
3237
3238 err = bitmap_parse_user(ubuf, count, t, adap->sge.egr_sz);
3239 if (err)
3240 return err;
3241
3242 bitmap_copy(adap->sge.blocked_fl, t, adap->sge.egr_sz);
752ade68 3243 kvfree(t);
5b377d11
HS		 3244 return count;
3245}
3246
3247static const struct file_operations blocked_fl_fops = {
3248 .owner = THIS_MODULE,
524605e5 3249 .open = simple_open,
5b377d11
HS		 3250 .read = blocked_fl_read,
3251 .write = blocked_fl_write,
3252 .llseek = generic_file_llseek,
3253};
3254
5888111c
HS		 3255static void mem_region_show(struct seq_file *seq, const char *name,
3256 unsigned int from, unsigned int to)
3257{
3258 char buf[40];
3259
3260 string_get_size((u64)to - from + 1, 1, STRING_UNITS_2, buf,
3261 sizeof(buf));
3262 seq_printf(seq, "%-15s %#x-%#x [%s]\n", name, from, to, buf);
3263}
3264
3265static int meminfo_show(struct seq_file *seq, void *v)
3266{
3267 static const char * const memory[] = { "EDC0:", "EDC1:", "MC:",
4db0401f 3268 "MC0:", "MC1:", "HMA:"};
5888111c 3269 struct adapter *adap = seq->private;
123e25c4
RL		 3270 struct cudbg_meminfo meminfo;
3271 int i, rc;
5888111c 3272
123e25c4
RL		 3273 memset(&meminfo, 0, sizeof(struct cudbg_meminfo));
3274 rc = cudbg_fill_meminfo(adap, &meminfo);
3275 if (rc)
3276 return -ENXIO;
5888111c 3277
123e25c4
RL		 3278 for (i = 0; i < meminfo.avail_c; i++)
3279 mem_region_show(seq, memory[meminfo.avail[i].idx],
3280 meminfo.avail[i].base,
3281 meminfo.avail[i].limit - 1);
5888111c
HS		 3282
3283 seq_putc(seq, '\n');
123e25c4
RL		 3284 for (i = 0; i < meminfo.mem_c; i++) {
3285 if (meminfo.mem[i].idx >= ARRAY_SIZE(cudbg_region))
5888111c 3286 continue; /* skip holes */
123e25c4
RL		 3287 if (!meminfo.mem[i].limit)
3288 meminfo.mem[i].limit =
3289 i < meminfo.mem_c - 1 ?
3290 meminfo.mem[i + 1].base - 1 : ~0;
3291 mem_region_show(seq, cudbg_region[meminfo.mem[i].idx],
3292 meminfo.mem[i].base, meminfo.mem[i].limit);
5888111c
HS		 3293 }
3294
3295 seq_putc(seq, '\n');
123e25c4
RL		 3296 mem_region_show(seq, "uP RAM:", meminfo.up_ram_lo, meminfo.up_ram_hi);
3297 mem_region_show(seq, "uP Extmem2:", meminfo.up_extmem2_lo,
3298 meminfo.up_extmem2_hi);
5888111c 3299
fa145d5d 3300 seq_printf(seq, "\n%u Rx pages (%u free) of size %uKiB for %u channels\n",
ae2a922f 3301 meminfo.rx_pages_data[0], meminfo.free_rx_cnt,
fa145d5d
GG		 3302 meminfo.rx_pages_data[1], meminfo.rx_pages_data[2]);
3303
fa145d5d 3304 seq_printf(seq, "%u Tx pages (%u free) of size %u%ciB for %u channels\n",
ae2a922f 3305 meminfo.tx_pages_data[0], meminfo.free_tx_cnt,
fa145d5d
GG		 3306 meminfo.tx_pages_data[1], meminfo.tx_pages_data[2],
3307 meminfo.tx_pages_data[3]);
123e25c4 3308
9d0f180c
RL		 3309 seq_printf(seq, "%u p-structs (%u free)\n\n",
3310 meminfo.p_structs, meminfo.p_structs_free_cnt);
123e25c4
RL		 3311
3312 for (i = 0; i < 4; i++)
5888111c
HS		 3313 /* For T6 these are MAC buffer groups */
3314 seq_printf(seq, "Port %d using %u pages out of %u allocated\n",
123e25c4
RL		 3315 i, meminfo.port_used[i], meminfo.port_alloc[i]);
3316
3317 for (i = 0; i < adap->params.arch.nchan; i++)
5888111c
HS		 3318 /* For T6 these are MAC buffer groups */
3319 seq_printf(seq,
3320 "Loopback %d using %u pages out of %u allocated\n",
123e25c4
RL		 3321 i, meminfo.loopback_used[i],
3322 meminfo.loopback_alloc[i]);
3323
5888111c
HS		 3324 return 0;
3325}
b09026c6 3326DEFINE_SHOW_ATTRIBUTE(meminfo);
5888111c 3327
b09026c6 3328static int chcr_stats_show(struct seq_file *seq, void *v)
ee0863ba
HJ		 3329{
3330 struct adapter *adap = seq->private;
3331
3332 seq_puts(seq, "Chelsio Crypto Accelerator Stats \n");
3333 seq_printf(seq, "Cipher Ops: %10u \n",
3334 atomic_read(&adap->chcr_stats.cipher_rqst));
3335 seq_printf(seq, "Digest Ops: %10u \n",
3336 atomic_read(&adap->chcr_stats.digest_rqst));
3337 seq_printf(seq, "Aead Ops: %10u \n",
3338 atomic_read(&adap->chcr_stats.aead_rqst));
3339 seq_printf(seq, "Completion: %10u \n",
3340 atomic_read(&adap->chcr_stats.complete));
3341 seq_printf(seq, "Error: %10u \n",
3342 atomic_read(&adap->chcr_stats.error));
3343 seq_printf(seq, "Fallback: %10u \n",
3344 atomic_read(&adap->chcr_stats.fallback));
a6ec572b
AG		 3345 seq_printf(seq, "IPSec PDU: %10u\n",
3346 atomic_read(&adap->chcr_stats.ipsec_cnt));
ee0863ba
HJ		 3347 return 0;
3348}
b09026c6 3349DEFINE_SHOW_ATTRIBUTE(chcr_stats);
31e5f5c3
RL		 3350
3351#define PRINT_ADAP_STATS(string, value) \
3352 seq_printf(seq, "%-25s %-20llu\n", (string), \
3353 (unsigned long long)(value))
3354
3355#define PRINT_CH_STATS(string, value) \
3356do { \
3357 seq_printf(seq, "%-25s ", (string)); \
3358 for (i = 0; i < adap->params.arch.nchan; i++) \
3359 seq_printf(seq, "%-20llu ", \
3360 (unsigned long long)stats.value[i]); \
3361 seq_printf(seq, "\n"); \
3362} while (0)
3363
3364#define PRINT_CH_STATS2(string, value) \
3365do { \
3366 seq_printf(seq, "%-25s ", (string)); \
3367 for (i = 0; i < adap->params.arch.nchan; i++) \
3368 seq_printf(seq, "%-20llu ", \
3369 (unsigned long long)stats[i].value); \
3370 seq_printf(seq, "\n"); \
3371} while (0)
3372
3373static void show_tcp_stats(struct seq_file *seq)
3374{
3375 struct adapter *adap = seq->private;
3376 struct tp_tcp_stats v4, v6;
3377
3378 spin_lock(&adap->stats_lock);
3379 t4_tp_get_tcp_stats(adap, &v4, &v6, false);
3380 spin_unlock(&adap->stats_lock);
3381
3382 PRINT_ADAP_STATS("tcp_ipv4_out_rsts:", v4.tcp_out_rsts);
3383 PRINT_ADAP_STATS("tcp_ipv4_in_segs:", v4.tcp_in_segs);
3384 PRINT_ADAP_STATS("tcp_ipv4_out_segs:", v4.tcp_out_segs);
3385 PRINT_ADAP_STATS("tcp_ipv4_retrans_segs:", v4.tcp_retrans_segs);
3386 PRINT_ADAP_STATS("tcp_ipv6_out_rsts:", v6.tcp_out_rsts);
3387 PRINT_ADAP_STATS("tcp_ipv6_in_segs:", v6.tcp_in_segs);
3388 PRINT_ADAP_STATS("tcp_ipv6_out_segs:", v6.tcp_out_segs);
3389 PRINT_ADAP_STATS("tcp_ipv6_retrans_segs:", v6.tcp_retrans_segs);
3390}
3391
3392static void show_ddp_stats(struct seq_file *seq)
3393{
3394 struct adapter *adap = seq->private;
3395 struct tp_usm_stats stats;
3396
3397 spin_lock(&adap->stats_lock);
3398 t4_get_usm_stats(adap, &stats, false);
3399 spin_unlock(&adap->stats_lock);
3400
3401 PRINT_ADAP_STATS("usm_ddp_frames:", stats.frames);
3402 PRINT_ADAP_STATS("usm_ddp_octets:", stats.octets);
3403 PRINT_ADAP_STATS("usm_ddp_drops:", stats.drops);
3404}
3405
3406static void show_rdma_stats(struct seq_file *seq)
3407{
3408 struct adapter *adap = seq->private;
3409 struct tp_rdma_stats stats;
3410
3411 spin_lock(&adap->stats_lock);
3412 t4_tp_get_rdma_stats(adap, &stats, false);
3413 spin_unlock(&adap->stats_lock);
3414
3415 PRINT_ADAP_STATS("rdma_no_rqe_mod_defer:", stats.rqe_dfr_mod);
3416 PRINT_ADAP_STATS("rdma_no_rqe_pkt_defer:", stats.rqe_dfr_pkt);
3417}
3418
3419static void show_tp_err_adapter_stats(struct seq_file *seq)
3420{
3421 struct adapter *adap = seq->private;
3422 struct tp_err_stats stats;
3423
3424 spin_lock(&adap->stats_lock);
3425 t4_tp_get_err_stats(adap, &stats, false);
3426 spin_unlock(&adap->stats_lock);
3427
3428 PRINT_ADAP_STATS("tp_err_ofld_no_neigh:", stats.ofld_no_neigh);
3429 PRINT_ADAP_STATS("tp_err_ofld_cong_defer:", stats.ofld_cong_defer);
3430}
3431
3432static void show_cpl_stats(struct seq_file *seq)
3433{
3434 struct adapter *adap = seq->private;
3435 struct tp_cpl_stats stats;
3436 u8 i;
3437
3438 spin_lock(&adap->stats_lock);
3439 t4_tp_get_cpl_stats(adap, &stats, false);
3440 spin_unlock(&adap->stats_lock);
3441
3442 PRINT_CH_STATS("tp_cpl_requests:", req);
3443 PRINT_CH_STATS("tp_cpl_responses:", rsp);
3444}
3445
3446static void show_tp_err_channel_stats(struct seq_file *seq)
3447{
3448 struct adapter *adap = seq->private;
3449 struct tp_err_stats stats;
3450 u8 i;
3451
3452 spin_lock(&adap->stats_lock);
3453 t4_tp_get_err_stats(adap, &stats, false);
3454 spin_unlock(&adap->stats_lock);
3455
3456 PRINT_CH_STATS("tp_mac_in_errs:", mac_in_errs);
3457 PRINT_CH_STATS("tp_hdr_in_errs:", hdr_in_errs);
3458 PRINT_CH_STATS("tp_tcp_in_errs:", tcp_in_errs);
3459 PRINT_CH_STATS("tp_tcp6_in_errs:", tcp6_in_errs);
3460 PRINT_CH_STATS("tp_tnl_cong_drops:", tnl_cong_drops);
3461 PRINT_CH_STATS("tp_tnl_tx_drops:", tnl_tx_drops);
3462 PRINT_CH_STATS("tp_ofld_vlan_drops:", ofld_vlan_drops);
3463 PRINT_CH_STATS("tp_ofld_chan_drops:", ofld_chan_drops);
3464}
3465
3466static void show_fcoe_stats(struct seq_file *seq)
3467{
3468 struct adapter *adap = seq->private;
3469 struct tp_fcoe_stats stats[NCHAN];
3470 u8 i;
3471
3472 spin_lock(&adap->stats_lock);
3473 for (i = 0; i < adap->params.arch.nchan; i++)
3474 t4_get_fcoe_stats(adap, i, &stats[i], false);
3475 spin_unlock(&adap->stats_lock);
3476
3477 PRINT_CH_STATS2("fcoe_octets_ddp", octets_ddp);
3478 PRINT_CH_STATS2("fcoe_frames_ddp", frames_ddp);
3479 PRINT_CH_STATS2("fcoe_frames_drop", frames_drop);
3480}
3481
3482#undef PRINT_CH_STATS2
3483#undef PRINT_CH_STATS
3484#undef PRINT_ADAP_STATS
3485
3486static int tp_stats_show(struct seq_file *seq, void *v)
3487{
3488 struct adapter *adap = seq->private;
3489
3490 seq_puts(seq, "\n--------Adapter Stats--------\n");
3491 show_tcp_stats(seq);
3492 show_ddp_stats(seq);
3493 show_rdma_stats(seq);
3494 show_tp_err_adapter_stats(seq);
3495
3496 seq_puts(seq, "\n-------- Channel Stats --------\n");
3497 if (adap->params.arch.nchan == NCHAN)
3498 seq_printf(seq, "%-25s %-20s %-20s %-20s %-20s\n",
3499 " ", "channel 0", "channel 1",
3500 "channel 2", "channel 3");
3501 else
3502 seq_printf(seq, "%-25s %-20s %-20s\n",
3503 " ", "channel 0", "channel 1");
3504 show_cpl_stats(seq);
3505 show_tp_err_channel_stats(seq);
3506 show_fcoe_stats(seq);
3507
3508 return 0;
3509}
b09026c6 3510DEFINE_SHOW_ATTRIBUTE(tp_stats);
31e5f5c3 3511
fd88b31a
HS		 3512/* Add an array of Debug FS files.
3513 */
3514void add_debugfs_files(struct adapter *adap,
3515 struct t4_debugfs_entry *files,
3516 unsigned int nfiles)
3517{
3518 int i;
3519
3520 /* debugfs support is best effort */
3521 for (i = 0; i < nfiles; i++)
3522 debugfs_create_file(files[i].name, files[i].mode,
3523 adap->debugfs_root,
3524 (void *)adap + files[i].data,
3525 files[i].ops);
3526}
3527
3528int t4_setup_debugfs(struct adapter *adap)
3529{
3530 int i;
3ccc6cf7 3531 u32 size = 0;
49216c1c 3532 struct dentry *de;
fd88b31a
HS		 3533
3534 static struct t4_debugfs_entry t4_debugfs_files[] = {
d3757ba4
JP		 3535 { "cim_la", &cim_la_fops, 0400, 0 },
3536 { "cim_pif_la", &cim_pif_la_fops, 0400, 0 },
3537 { "cim_ma_la", &cim_ma_la_fops, 0400, 0 },
3538 { "cim_qcfg", &cim_qcfg_fops, 0400, 0 },
b09026c6 3539 { "clk", &clk_fops, 0400, 0 },
d3757ba4
JP		 3540 { "devlog", &devlog_fops, 0400, 0 },
3541 { "mboxlog", &mboxlog_fops, 0400, 0 },
3542 { "mbox0", &mbox_debugfs_fops, 0600, 0 },
3543 { "mbox1", &mbox_debugfs_fops, 0600, 1 },
3544 { "mbox2", &mbox_debugfs_fops, 0600, 2 },
3545 { "mbox3", &mbox_debugfs_fops, 0600, 3 },
3546 { "mbox4", &mbox_debugfs_fops, 0600, 4 },
3547 { "mbox5", &mbox_debugfs_fops, 0600, 5 },
3548 { "mbox6", &mbox_debugfs_fops, 0600, 6 },
3549 { "mbox7", &mbox_debugfs_fops, 0600, 7 },
3550 { "trace0", &mps_trc_debugfs_fops, 0600, 0 },
3551 { "trace1", &mps_trc_debugfs_fops, 0600, 1 },
3552 { "trace2", &mps_trc_debugfs_fops, 0600, 2 },
3553 { "trace3", &mps_trc_debugfs_fops, 0600, 3 },
3554 { "l2t", &t4_l2t_fops, 0400, 0},
3555 { "mps_tcam", &mps_tcam_debugfs_fops, 0400, 0 },
3556 { "rss", &rss_debugfs_fops, 0400, 0 },
b09026c6 3557 { "rss_config", &rss_config_fops, 0400, 0 },
d3757ba4
JP		 3558 { "rss_key", &rss_key_debugfs_fops, 0400, 0 },
3559 { "rss_pf_config", &rss_pf_config_debugfs_fops, 0400, 0 },
3560 { "rss_vf_config", &rss_vf_config_debugfs_fops, 0400, 0 },
b09026c6 3561 { "resources", &resources_fops, 0400, 0 },
ebddd97a
GG		 3562#ifdef CONFIG_CHELSIO_T4_DCB
3563 { "dcb_info", &dcb_info_debugfs_fops, 0400, 0 },
3564#endif
d3757ba4
JP		 3565 { "sge_qinfo", &sge_qinfo_debugfs_fops, 0400, 0 },
3566 { "ibq_tp0", &cim_ibq_fops, 0400, 0 },
3567 { "ibq_tp1", &cim_ibq_fops, 0400, 1 },
3568 { "ibq_ulp", &cim_ibq_fops, 0400, 2 },
3569 { "ibq_sge0", &cim_ibq_fops, 0400, 3 },
3570 { "ibq_sge1", &cim_ibq_fops, 0400, 4 },
3571 { "ibq_ncsi", &cim_ibq_fops, 0400, 5 },
3572 { "obq_ulp0", &cim_obq_fops, 0400, 0 },
3573 { "obq_ulp1", &cim_obq_fops, 0400, 1 },
3574 { "obq_ulp2", &cim_obq_fops, 0400, 2 },
3575 { "obq_ulp3", &cim_obq_fops, 0400, 3 },
3576 { "obq_sge", &cim_obq_fops, 0400, 4 },
3577 { "obq_ncsi", &cim_obq_fops, 0400, 5 },
3578 { "tp_la", &tp_la_fops, 0400, 0 },
3579 { "ulprx_la", &ulprx_la_fops, 0400, 0 },
b09026c6 3580 { "sensors", &sensors_fops, 0400, 0 },
d3757ba4 3581 { "pm_stats", &pm_stats_debugfs_fops, 0400, 0 },
b09026c6
YL		 3582 { "tx_rate", &tx_rate_fops, 0400, 0 },
3583 { "cctrl", &cctrl_tbl_fops, 0400, 0 },
b5a02f50 3584#if IS_ENABLED(CONFIG_IPV6)
b09026c6 3585 { "clip_tbl", &clip_tbl_fops, 0400, 0 },
b5a02f50 3586#endif
b09026c6 3587 { "tids", &tid_info_fops, 0400, 0},
d3757ba4
JP		 3588 { "blocked_fl", &blocked_fl_fops, 0600, 0 },
3589 { "meminfo", &meminfo_fops, 0400, 0 },
b09026c6
YL		 3590 { "crypto", &chcr_stats_fops, 0400, 0 },
3591 { "tp_stats", &tp_stats_fops, 0400, 0 },
fd88b31a
HS		 3592 };
3593
c778af7d
HS		 3594 /* Debug FS nodes common to all T5 and later adapters.
3595 */
3596 static struct t4_debugfs_entry t5_debugfs_files[] = {
d3757ba4
JP		 3597 { "obq_sge_rx_q0", &cim_obq_fops, 0400, 6 },
3598 { "obq_sge_rx_q1", &cim_obq_fops, 0400, 7 },
c778af7d
HS		 3599 };
3600
fd88b31a
HS		 3601 add_debugfs_files(adap,
3602 t4_debugfs_files,
3603 ARRAY_SIZE(t4_debugfs_files));
c778af7d
HS		 3604 if (!is_t4(adap->params.chip))
3605 add_debugfs_files(adap,
3606 t5_debugfs_files,
3607 ARRAY_SIZE(t5_debugfs_files));
fd88b31a 3608
6559a7e8
HS		 3609 i = t4_read_reg(adap, MA_TARGET_MEM_ENABLE_A);
3610 if (i & EDRAM0_ENABLE_F) {
3611 size = t4_read_reg(adap, MA_EDRAM0_BAR_A);
3612 add_debugfs_mem(adap, "edc0", MEM_EDC0, EDRAM0_SIZE_G(size));
fd88b31a 3613 }
6559a7e8
HS		 3614 if (i & EDRAM1_ENABLE_F) {
3615 size = t4_read_reg(adap, MA_EDRAM1_BAR_A);
3616 add_debugfs_mem(adap, "edc1", MEM_EDC1, EDRAM1_SIZE_G(size));
fd88b31a 3617 }
3ccc6cf7 3618 if (is_t5(adap->params.chip)) {
6559a7e8
HS		 3619 if (i & EXT_MEM0_ENABLE_F) {
3620 size = t4_read_reg(adap, MA_EXT_MEMORY0_BAR_A);
fd88b31a 3621 add_debugfs_mem(adap, "mc0", MEM_MC0,
6559a7e8 3622 EXT_MEM0_SIZE_G(size));
fd88b31a 3623 }
6559a7e8
HS		 3624 if (i & EXT_MEM1_ENABLE_F) {
3625 size = t4_read_reg(adap, MA_EXT_MEMORY1_BAR_A);
fd88b31a 3626 add_debugfs_mem(adap, "mc1", MEM_MC1,
6559a7e8 3627 EXT_MEM1_SIZE_G(size));
fd88b31a 3628 }
3ccc6cf7 3629 } else {
21a44763 3630 if (i & EXT_MEM_ENABLE_F) {
3ccc6cf7
HS		 3631 size = t4_read_reg(adap, MA_EXT_MEMORY_BAR_A);
3632 add_debugfs_mem(adap, "mc", MEM_MC,
3633 EXT_MEM_SIZE_G(size));
21a44763 3634 }
8b4e6b3c
AV		 3635
3636 if (i & HMA_MUX_F) {
3637 size = t4_read_reg(adap, MA_EXT_MEMORY1_BAR_A);
3638 add_debugfs_mem(adap, "hma", MEM_HMA,
3639 EXT_MEM1_SIZE_G(size));
3640 }
fd88b31a 3641 }
49216c1c 3642
d3757ba4 3643 de = debugfs_create_file_size("flash", 0400, adap->debugfs_root, adap,
c1d81b1c 3644 &flash_debugfs_fops, adap->params.sf_size);
d3757ba4 3645 debugfs_create_bool("use_backdoor", 0600,
0b2c2a93 3646 adap->debugfs_root, &adap->use_bd);
d3757ba4 3647 debugfs_create_bool("trace_rss", 0600,
8e3d04fd 3648 adap->debugfs_root, &adap->trace_rss);
49216c1c 3649
fd88b31a
HS		 3650 return 0;
3651}
Mirror https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git