projects / thirdparty / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 7e36e2f5 RW |
1 | /* |
| 2 | * arch/arch/mach-ixp4xx/fsg-pci.c | |
| 3 | * | |
| 4 | * FSG board-level PCI initialization | |
| 5 | * | |
| 6 | * Author: Rod Whitby <rod@whitby.id.au> | |
| 7 | * Maintainer: http://www.nslu2-linux.org/ | |
| 8 | * | |
| 9 | * based on ixdp425-pci.c: | |
| 10 | * Copyright (C) 2002 Intel Corporation. | |
| 11 | * Copyright (C) 2003-2004 MontaVista Software, Inc. | |
| 12 | * | |
| 13 | * This program is free software; you can redistribute it and/or modify | |
| 14 | * it under the terms of the GNU General Public License version 2 as | |
| 15 | * published by the Free Software Foundation. | |
| 16 | * | |
| 17 | */ | |
| 18 | ||
| 19 | #include <linux/pci.h> | |
| 20 | #include <linux/init.h> | |
| 21 | #include <linux/irq.h> | |
| 7e36e2f5 RW |
22 | #include <asm/mach/pci.h> |
| 23 | #include <asm/mach-types.h> | |
| 24 | ||
| dc8ef8cd LW |
25 | #include "irqs.h" |
| 26 | ||
| 8d3fdf31 KH |
27 | #define MAX_DEV 3 |
| 28 | #define IRQ_LINES 3 | |
| 914e7bc2 KH |
29 | |
| 30 | /* PCI controller GPIO to IRQ pin mappings */ | |
| 8d3fdf31 KH |
31 | #define INTA 6 |
| 32 | #define INTB 7 | |
| 33 | #define INTC 5 | |
| 914e7bc2 | 34 | |
| 7e36e2f5 RW |
35 | void __init fsg_pci_preinit(void) |
| 36 | { | |
| 6845664a TG |
37 | irq_set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW); |
| 38 | irq_set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW); | |
| 39 | irq_set_irq_type(IXP4XX_GPIO_IRQ(INTC), IRQ_TYPE_LEVEL_LOW); | |
| 7e36e2f5 RW |
40 | ixp4xx_pci_preinit(); |
| 41 | } | |
| 42 | ||
| d5341942 | 43 | static int __init fsg_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) |
| 7e36e2f5 | 44 | { |
| 8d3fdf31 KH |
45 | static int pci_irq_table[IRQ_LINES] = { |
| 46 | IXP4XX_GPIO_IRQ(INTC), | |
| 47 | IXP4XX_GPIO_IRQ(INTB), | |
| 48 | IXP4XX_GPIO_IRQ(INTA), | |
| 7e36e2f5 RW |
49 | }; |
| 50 | ||
| 51 | int irq = -1; | |
| 8d3fdf31 | 52 | slot -= 11; |
| 7e36e2f5 | 53 | |
| 8d3fdf31 KH |
54 | if (slot >= 1 && slot <= MAX_DEV && pin >= 1 && pin <= IRQ_LINES) |
| 55 | irq = pci_irq_table[slot - 1]; | |
| 7e36e2f5 RW |
56 | printk(KERN_INFO "%s: Mapped slot %d pin %d to IRQ %d\n", |
| 57 | __func__, slot, pin, irq); | |
| 58 | ||
| 59 | return irq; | |
| 60 | } | |
| 61 | ||
| 62 | struct hw_pci fsg_pci __initdata = { | |
| 63 | .nr_controllers = 1, | |
| c23bfc38 | 64 | .ops = &ixp4xx_ops, |
| 7e36e2f5 | 65 | .preinit = fsg_pci_preinit, |
| 7e36e2f5 | 66 | .setup = ixp4xx_setup, |
| 7e36e2f5 RW |
67 | .map_irq = fsg_map_irq, |
| 68 | }; | |
| 69 | ||
| 70 | int __init fsg_pci_init(void) | |
| 71 | { | |
| 72 | if (machine_is_fsg()) | |
| 73 | pci_common_init(&fsg_pci); | |
| 74 | return 0; | |
| 75 | } | |
| 76 | ||
| 77 | subsys_initcall(fsg_pci_init); |