[thirdparty/linux.git] / arch / arm / mach-ixp4xx / nas100d-setup.c

// SPDX-License-Identifier: GPL-2.0
/*
 * arch/arm/mach-ixp4xx/nas100d-setup.c
 *
 * NAS 100d board-setup
 *
 * Copyright (C) 2008 Rod Whitby <rod@whitby.id.au>
 *
 * based on ixdp425-setup.c:
 *      Copyright (C) 2003-2004 MontaVista Software, Inc.
 * based on nas100d-power.c:
 *	Copyright (C) 2005 Tower Technologies
 * based on nas100d-io.c
 *	Copyright (C) 2004 Karen Spearel
 *
 * Author: Alessandro Zummo <a.zummo@towertech.it>
 * Author: Rod Whitby <rod@whitby.id.au>
 * Maintainers: http://www.nslu2-linux.org/
 *
 */
#include <linux/gpio.h>
#include <linux/if_ether.h>
#include <linux/irq.h>
#include <linux/jiffies.h>
#include <linux/timer.h>
#include <linux/serial.h>
#include <linux/serial_8250.h>
#include <linux/leds.h>
#include <linux/reboot.h>
#include <linux/i2c.h>
#include <linux/gpio/machine.h>
#include <linux/io.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/flash.h>

#include "irqs.h"

#define NAS100D_SDA_PIN		5
#define NAS100D_SCL_PIN		6

/* Buttons */
#define NAS100D_PB_GPIO         14   /* power button */
#define NAS100D_RB_GPIO         4    /* reset button */

/* Power control */
#define NAS100D_PO_GPIO         12   /* power off */

/* LEDs */
#define NAS100D_LED_WLAN_GPIO	0
#define NAS100D_LED_DISK_GPIO	3
#define NAS100D_LED_PWR_GPIO	15

static struct flash_platform_data nas100d_flash_data = {
	.map_name		= "cfi_probe",
	.width			= 2,
};

static struct resource nas100d_flash_resource = {
	.flags			= IORESOURCE_MEM,
};

static struct platform_device nas100d_flash = {
	.name			= "IXP4XX-Flash",
	.id			= 0,
	.dev.platform_data	= &nas100d_flash_data,
	.num_resources		= 1,
	.resource		= &nas100d_flash_resource,
};

static struct i2c_board_info __initdata nas100d_i2c_board_info [] = {
	{
		I2C_BOARD_INFO("pcf8563", 0x51),
	},
};

static struct gpio_led nas100d_led_pins[] = {
	{
		.name		= "nas100d:green:wlan",
		.gpio		= NAS100D_LED_WLAN_GPIO,
		.active_low	= true,
	},
	{
		.name		= "nas100d:blue:power",  /* (off=flashing) */
		.gpio		= NAS100D_LED_PWR_GPIO,
		.active_low	= true,
	},
	{
		.name		= "nas100d:yellow:disk",
		.gpio		= NAS100D_LED_DISK_GPIO,
		.active_low	= true,
	},
};

static struct gpio_led_platform_data nas100d_led_data = {
	.num_leds		= ARRAY_SIZE(nas100d_led_pins),
	.leds			= nas100d_led_pins,
};

static struct platform_device nas100d_leds = {
	.name			= "leds-gpio",
	.id			= -1,
	.dev.platform_data	= &nas100d_led_data,
};

static struct gpiod_lookup_table nas100d_i2c_gpiod_table = {
	.dev_id		= "i2c-gpio.0",
	.table		= {
		GPIO_LOOKUP_IDX("IXP4XX_GPIO_CHIP", NAS100D_SDA_PIN,
				NULL, 0, GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
		GPIO_LOOKUP_IDX("IXP4XX_GPIO_CHIP", NAS100D_SCL_PIN,
				NULL, 1, GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
	},
};

static struct platform_device nas100d_i2c_gpio = {
	.name			= "i2c-gpio",
	.id			= 0,
	.dev	 = {
		.platform_data	= NULL,
	},
};

static struct resource nas100d_uart_resources[] = {
	{
		.start		= IXP4XX_UART1_BASE_PHYS,
		.end		= IXP4XX_UART1_BASE_PHYS + 0x0fff,
		.flags		= IORESOURCE_MEM,
	},
	{
		.start		= IXP4XX_UART2_BASE_PHYS,
		.end		= IXP4XX_UART2_BASE_PHYS + 0x0fff,
		.flags		= IORESOURCE_MEM,
	}
};

static struct plat_serial8250_port nas100d_uart_data[] = {
	{
		.mapbase	= IXP4XX_UART1_BASE_PHYS,
		.membase	= (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
		.irq		= IRQ_IXP4XX_UART1,
		.flags		= UPF_BOOT_AUTOCONF,
		.iotype		= UPIO_MEM,
		.regshift	= 2,
		.uartclk	= IXP4XX_UART_XTAL,
	},
	{
		.mapbase	= IXP4XX_UART2_BASE_PHYS,
		.membase	= (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
		.irq		= IRQ_IXP4XX_UART2,
		.flags		= UPF_BOOT_AUTOCONF,
		.iotype		= UPIO_MEM,
		.regshift	= 2,
		.uartclk	= IXP4XX_UART_XTAL,
	},
	{ }
};

static struct platform_device nas100d_uart = {
	.name			= "serial8250",
	.id			= PLAT8250_DEV_PLATFORM,
	.dev.platform_data	= nas100d_uart_data,
	.num_resources		= 2,
	.resource		= nas100d_uart_resources,
};

/* Built-in 10/100 Ethernet MAC interfaces */
static struct eth_plat_info nas100d_plat_eth[] = {
	{
		.phy		= 0,
		.rxq		= 3,
		.txreadyq	= 20,
	}
};

static struct platform_device nas100d_eth[] = {
	{
		.name			= "ixp4xx_eth",
		.id			= IXP4XX_ETH_NPEB,
		.dev.platform_data	= nas100d_plat_eth,
	}
};

static struct platform_device *nas100d_devices[] __initdata = {
	&nas100d_i2c_gpio,
	&nas100d_flash,
	&nas100d_leds,
	&nas100d_eth[0],
};

static void nas100d_power_off(void)
{
	/* This causes the box to drop the power and go dead. */

	/* enable the pwr cntl gpio and assert power off */
	gpio_direction_output(NAS100D_PO_GPIO, 1);
}

/* This is used to make sure the power-button pusher is serious.  The button
 * must be held until the value of this counter reaches zero.
 */
static int power_button_countdown;

/* Must hold the button down for at least this many counts to be processed */
#define PBUTTON_HOLDDOWN_COUNT 4 /* 2 secs */

static void nas100d_power_handler(struct timer_list *unused);
static DEFINE_TIMER(nas100d_power_timer, nas100d_power_handler);

static void nas100d_power_handler(struct timer_list *unused)
{
	/* This routine is called twice per second to check the
	 * state of the power button.
	 */

	if (gpio_get_value(NAS100D_PB_GPIO)) {

		/* IO Pin is 1 (button pushed) */
		if (power_button_countdown > 0)
			power_button_countdown--;

	} else {

		/* Done on button release, to allow for auto-power-on mods. */
		if (power_button_countdown == 0) {
			/* Signal init to do the ctrlaltdel action,
			 * this will bypass init if it hasn't started
			 * and do a kernel_restart.
			 */
			ctrl_alt_del();

			/* Change the state of the power LED to "blink" */
			gpio_set_value(NAS100D_LED_PWR_GPIO, 0);
		} else {
			power_button_countdown = PBUTTON_HOLDDOWN_COUNT;
		}
	}

	mod_timer(&nas100d_power_timer, jiffies + msecs_to_jiffies(500));
}

static irqreturn_t nas100d_reset_handler(int irq, void *dev_id)
{
	/* This is the paper-clip reset, it shuts the machine down directly. */
	machine_power_off();

	return IRQ_HANDLED;
}

static int __init nas100d_gpio_init(void)
{
	if (!machine_is_nas100d())
		return 0;

	/*
	 * The power button on the Iomega NAS100d is on GPIO 14, but
	 * it cannot handle interrupts on that GPIO line.  So we'll
	 * have to poll it with a kernel timer.
	 */

	/* Request the power off GPIO */
	gpio_request(NAS100D_PO_GPIO, "power off");

	/* Make sure that the power button GPIO is set up as an input */
	gpio_request(NAS100D_PB_GPIO, "power button");
	gpio_direction_input(NAS100D_PB_GPIO);

	/* Set the initial value for the power button IRQ handler */
	power_button_countdown = PBUTTON_HOLDDOWN_COUNT;

	mod_timer(&nas100d_power_timer, jiffies + msecs_to_jiffies(500));

	return 0;
}
device_initcall(nas100d_gpio_init);

static void __init nas100d_init(void)
{
	uint8_t __iomem *f;
	int i;

	ixp4xx_sys_init();

	/* gpio 14 and 15 are _not_ clocks */
	*IXP4XX_GPIO_GPCLKR = 0;

	nas100d_flash_resource.start = IXP4XX_EXP_BUS_BASE(0);
	nas100d_flash_resource.end =
		IXP4XX_EXP_BUS_BASE(0) + ixp4xx_exp_bus_size - 1;

	gpiod_add_lookup_table(&nas100d_i2c_gpiod_table);
	i2c_register_board_info(0, nas100d_i2c_board_info,
				ARRAY_SIZE(nas100d_i2c_board_info));

	/*
	 * This is only useful on a modified machine, but it is valuable
	 * to have it first in order to see debug messages, and so that
	 * it does *not* get removed if platform_add_devices fails!
	 */
	(void)platform_device_register(&nas100d_uart);

	platform_add_devices(nas100d_devices, ARRAY_SIZE(nas100d_devices));

	pm_power_off = nas100d_power_off;

	if (request_irq(gpio_to_irq(NAS100D_RB_GPIO), &nas100d_reset_handler,
		IRQF_TRIGGER_LOW, "NAS100D reset button", NULL) < 0) {

		printk(KERN_DEBUG "Reset Button IRQ %d not available\n",
			gpio_to_irq(NAS100D_RB_GPIO));
	}

	/*
	 * Map in a portion of the flash and read the MAC address.
	 * Since it is stored in BE in the flash itself, we need to
	 * byteswap it if we're in LE mode.
	 */
	f = ioremap(IXP4XX_EXP_BUS_BASE(0), 0x1000000);
	if (f) {
		for (i = 0; i < 6; i++)
#ifdef __ARMEB__
			nas100d_plat_eth[0].hwaddr[i] = readb(f + 0xFC0FD8 + i);
#else
			nas100d_plat_eth[0].hwaddr[i] = readb(f + 0xFC0FD8 + (i^3));
#endif
		iounmap(f);
	}
	printk(KERN_INFO "NAS100D: Using MAC address %pM for port 0\n",
	       nas100d_plat_eth[0].hwaddr);

}

MACHINE_START(NAS100D, "Iomega NAS 100d")
	/* Maintainer: www.nslu2-linux.org */
	.atag_offset	= 0x100,
	.map_io		= ixp4xx_map_io,
	.init_early	= ixp4xx_init_early,
	.init_irq	= ixp4xx_init_irq,
	.init_time	= ixp4xx_timer_init,
	.init_machine	= nas100d_init,
#if defined(CONFIG_PCI)
	.dma_zone_size	= SZ_64M,
#endif
	.restart	= ixp4xx_restart,
MACHINE_END
Commit	Line	Data
b2441318	1	// SPDX-License-Identifier: GPL-2.0
3145d8a6 RW	2	/*
	3	* arch/arm/mach-ixp4xx/nas100d-setup.c
	4	*
	5	* NAS 100d board-setup
	6	*
c7d1623e RW	7	* Copyright (C) 2008 Rod Whitby <rod@whitby.id.au>
	8	*
	9	* based on ixdp425-setup.c:
3145d8a6	10	* Copyright (C) 2003-2004 MontaVista Software, Inc.
c7d1623e RW	11	* based on nas100d-power.c:
	12	* Copyright (C) 2005 Tower Technologies
	13	* based on nas100d-io.c
	14	* Copyright (C) 2004 Karen Spearel
3145d8a6 RW	15	*
	16	* Author: Alessandro Zummo <a.zummo@towertech.it>
	17	* Author: Rod Whitby <rod@whitby.id.au>
	18	* Maintainers: http://www.nslu2-linux.org/
	19	*
	20	*/
2f8163ba	21	#include <linux/gpio.h>
b7edc84a	22	#include <linux/if_ether.h>
c7d1623e RW	23	#include <linux/irq.h>
	24	#include <linux/jiffies.h>
	25	#include <linux/timer.h>
3145d8a6 RW	26	#include <linux/serial.h>
3145d8a6 RW	27	#include <linux/serial_8250.h>
df6934b3	28	#include <linux/leds.h>
c7d1623e	29	#include <linux/reboot.h>
400d8231	30	#include <linux/i2c.h>
b2e63555	31	#include <linux/gpio/machine.h>
fced80c7	32	#include <linux/io.h>
3145d8a6 RW	33	#include <asm/mach-types.h>
	34	#include <asm/mach/arch.h>
	35	#include <asm/mach/flash.h>
	36
dc8ef8cd LW	37	#include "irqs.h"
dc8ef8cd LW	38
23fa6846 KH	39	#define NAS100D_SDA_PIN 5
	40	#define NAS100D_SCL_PIN 6
	41
	42	/* Buttons */
	43	#define NAS100D_PB_GPIO 14 /* power button */
	44	#define NAS100D_RB_GPIO 4 /* reset button */
	45
	46	/* Power control */
	47	#define NAS100D_PO_GPIO 12 /* power off */
	48
	49	/* LEDs */
	50	#define NAS100D_LED_WLAN_GPIO 0
	51	#define NAS100D_LED_DISK_GPIO 3
	52	#define NAS100D_LED_PWR_GPIO 15
	53
3145d8a6 RW	54	static struct flash_platform_data nas100d_flash_data = {
	55	.map_name = "cfi_probe",
	56	.width = 2,
	57	};
	58
	59	static struct resource nas100d_flash_resource = {
3145d8a6 RW	60	.flags = IORESOURCE_MEM,
	61	};
	62
	63	static struct platform_device nas100d_flash = {
	64	.name = "IXP4XX-Flash",
	65	.id = 0,
	66	.dev.platform_data = &nas100d_flash_data,
	67	.num_resources = 1,
	68	.resource = &nas100d_flash_resource,
	69	};
	70
400d8231 RW	71	static struct i2c_board_info __initdata nas100d_i2c_board_info [] = {
400d8231 RW	72	{
3760f736	73	I2C_BOARD_INFO("pcf8563", 0x51),
400d8231 RW	74	},
	75	};
	76
1208ebf2	77	static struct gpio_led nas100d_led_pins[] = {
df6934b3	78	{
6c152bee	79	.name = "nas100d:green:wlan",
1208ebf2 RW	80	.gpio = NAS100D_LED_WLAN_GPIO,
1208ebf2 RW	81	.active_low = true,
df6934b3 RW	82	},
df6934b3 RW	83	{
6c152bee	84	.name = "nas100d:blue:power", /* (off=flashing) */
1208ebf2 RW	85	.gpio = NAS100D_LED_PWR_GPIO,
1208ebf2 RW	86	.active_low = true,
df6934b3 RW	87	},
df6934b3 RW	88	{
6c152bee	89	.name = "nas100d:yellow:disk",
1208ebf2 RW	90	.gpio = NAS100D_LED_DISK_GPIO,
1208ebf2 RW	91	.active_low = true,
df6934b3 RW	92	},
	93	};
	94
1208ebf2 RW	95	static struct gpio_led_platform_data nas100d_led_data = {
	96	.num_leds = ARRAY_SIZE(nas100d_led_pins),
	97	.leds = nas100d_led_pins,
	98	};
	99
df6934b3	100	static struct platform_device nas100d_leds = {
1208ebf2	101	.name = "leds-gpio",
df6934b3	102	.id = -1,
1208ebf2	103	.dev.platform_data = &nas100d_led_data,
df6934b3	104	};
df6934b3	105
b2e63555	106	static struct gpiod_lookup_table nas100d_i2c_gpiod_table = {
f59c303b	107	.dev_id = "i2c-gpio.0",
b2e63555 LW	108	.table = {
b2e63555 LW	109	GPIO_LOOKUP_IDX("IXP4XX_GPIO_CHIP", NAS100D_SDA_PIN,
4d0ce62c	110	NULL, 0, GPIO_ACTIVE_HIGH \| GPIO_OPEN_DRAIN),
b2e63555	111	GPIO_LOOKUP_IDX("IXP4XX_GPIO_CHIP", NAS100D_SCL_PIN,
4d0ce62c	112	NULL, 1, GPIO_ACTIVE_HIGH \| GPIO_OPEN_DRAIN),
b2e63555	113	},
3145d8a6 RW	114	};
3145d8a6 RW	115
5a4a2387 MLJ	116	static struct platform_device nas100d_i2c_gpio = {
5a4a2387 MLJ	117	.name = "i2c-gpio",
3145d8a6	118	.id = 0,
5a4a2387	119	.dev = {
b2e63555	120	.platform_data = NULL,
5a4a2387	121	},
3145d8a6 RW	122	};
	123
	124	static struct resource nas100d_uart_resources[] = {
	125	{
	126	.start = IXP4XX_UART1_BASE_PHYS,
	127	.end = IXP4XX_UART1_BASE_PHYS + 0x0fff,
	128	.flags = IORESOURCE_MEM,
	129	},
	130	{
	131	.start = IXP4XX_UART2_BASE_PHYS,
	132	.end = IXP4XX_UART2_BASE_PHYS + 0x0fff,
	133	.flags = IORESOURCE_MEM,
	134	}
	135	};
	136
	137	static struct plat_serial8250_port nas100d_uart_data[] = {
	138	{
	139	.mapbase = IXP4XX_UART1_BASE_PHYS,
	140	.membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
	141	.irq = IRQ_IXP4XX_UART1,
	142	.flags = UPF_BOOT_AUTOCONF,
	143	.iotype = UPIO_MEM,
	144	.regshift = 2,
	145	.uartclk = IXP4XX_UART_XTAL,
	146	},
	147	{
	148	.mapbase = IXP4XX_UART2_BASE_PHYS,
	149	.membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
	150	.irq = IRQ_IXP4XX_UART2,
	151	.flags = UPF_BOOT_AUTOCONF,
	152	.iotype = UPIO_MEM,
	153	.regshift = 2,
	154	.uartclk = IXP4XX_UART_XTAL,
	155	},
	156	{ }
	157	};
	158
	159	static struct platform_device nas100d_uart = {
	160	.name = "serial8250",
	161	.id = PLAT8250_DEV_PLATFORM,
	162	.dev.platform_data = nas100d_uart_data,
	163	.num_resources = 2,
	164	.resource = nas100d_uart_resources,
	165	};
	166
b7edc84a RW	167	/* Built-in 10/100 Ethernet MAC interfaces */
	168	static struct eth_plat_info nas100d_plat_eth[] = {
	169	{
	170	.phy = 0,
	171	.rxq = 3,
	172	.txreadyq = 20,
	173	}
	174	};
	175
	176	static struct platform_device nas100d_eth[] = {
	177	{
	178	.name = "ixp4xx_eth",
	179	.id = IXP4XX_ETH_NPEB,
	180	.dev.platform_data = nas100d_plat_eth,
	181	}
	182	};
	183
3145d8a6	184	static struct platform_device *nas100d_devices[] __initdata = {
5a4a2387	185	&nas100d_i2c_gpio,
3145d8a6	186	&nas100d_flash,
df6934b3	187	&nas100d_leds,
b7edc84a	188	&nas100d_eth[0],
3145d8a6 RW	189	};
	190
	191	static void nas100d_power_off(void)
	192	{
	193	/* This causes the box to drop the power and go dead. */
	194
8040dd09 LW	195	/* enable the pwr cntl gpio and assert power off */
8040dd09 LW	196	gpio_direction_output(NAS100D_PO_GPIO, 1);
3145d8a6 RW	197	}
3145d8a6 RW	198
c7d1623e RW	199	/* This is used to make sure the power-button pusher is serious. The button
	200	* must be held until the value of this counter reaches zero.
	201	*/
	202	static int power_button_countdown;
	203
	204	/* Must hold the button down for at least this many counts to be processed */
	205	#define PBUTTON_HOLDDOWN_COUNT 4 /* 2 secs */
	206
24ed960a	207	static void nas100d_power_handler(struct timer_list *unused);
1d27e3e2	208	static DEFINE_TIMER(nas100d_power_timer, nas100d_power_handler);
c7d1623e	209
24ed960a	210	static void nas100d_power_handler(struct timer_list *unused)
c7d1623e RW	211	{
	212	/* This routine is called twice per second to check the
	213	* state of the power button.
	214	*/
	215
	216	if (gpio_get_value(NAS100D_PB_GPIO)) {
	217
	218	/* IO Pin is 1 (button pushed) */
	219	if (power_button_countdown > 0)
	220	power_button_countdown--;
	221
	222	} else {
	223
	224	/* Done on button release, to allow for auto-power-on mods. */
	225	if (power_button_countdown == 0) {
	226	/* Signal init to do the ctrlaltdel action,
	227	* this will bypass init if it hasn't started
	228	* and do a kernel_restart.
	229	*/
	230	ctrl_alt_del();
	231
	232	/* Change the state of the power LED to "blink" */
8040dd09	233	gpio_set_value(NAS100D_LED_PWR_GPIO, 0);
c7d1623e RW	234	} else {
	235	power_button_countdown = PBUTTON_HOLDDOWN_COUNT;
	236	}
	237	}
	238
	239	mod_timer(&nas100d_power_timer, jiffies + msecs_to_jiffies(500));
	240	}
	241
	242	static irqreturn_t nas100d_reset_handler(int irq, void *dev_id)
	243	{
	244	/* This is the paper-clip reset, it shuts the machine down directly. */
	245	machine_power_off();
	246
	247	return IRQ_HANDLED;
	248	}
	249
8040dd09 LW	250	static int __init nas100d_gpio_init(void)
	251	{
	252	if (!machine_is_nas100d())
	253	return 0;
	254
	255	/*
	256	* The power button on the Iomega NAS100d is on GPIO 14, but
	257	* it cannot handle interrupts on that GPIO line. So we'll
	258	* have to poll it with a kernel timer.
	259	*/
	260
	261	/* Request the power off GPIO */
	262	gpio_request(NAS100D_PO_GPIO, "power off");
	263
	264	/* Make sure that the power button GPIO is set up as an input */
	265	gpio_request(NAS100D_PB_GPIO, "power button");
	266	gpio_direction_input(NAS100D_PB_GPIO);
	267
	268	/* Set the initial value for the power button IRQ handler */
	269	power_button_countdown = PBUTTON_HOLDDOWN_COUNT;
	270
	271	mod_timer(&nas100d_power_timer, jiffies + msecs_to_jiffies(500));
	272
	273	return 0;
	274	}
	275	device_initcall(nas100d_gpio_init);
	276
3145d8a6 RW	277	static void __init nas100d_init(void)
3145d8a6 RW	278	{
b7edc84a RW	279	uint8_t __iomem *f;
	280	int i;
	281
3145d8a6 RW	282	ixp4xx_sys_init();
3145d8a6 RW	283
dcc8fa50 AZ	284	/* gpio 14 and 15 are _not_ clocks */
	285	*IXP4XX_GPIO_GPCLKR = 0;
	286
54e269ea DS	287	nas100d_flash_resource.start = IXP4XX_EXP_BUS_BASE(0);
	288	nas100d_flash_resource.end =
	289	IXP4XX_EXP_BUS_BASE(0) + ixp4xx_exp_bus_size - 1;
	290
b2e63555	291	gpiod_add_lookup_table(&nas100d_i2c_gpiod_table);
400d8231 RW	292	i2c_register_board_info(0, nas100d_i2c_board_info,
	293	ARRAY_SIZE(nas100d_i2c_board_info));
	294
cc50a0df MLJ	295	/*
cc50a0df MLJ	296	* This is only useful on a modified machine, but it is valuable
df6934b3 RW	297	* to have it first in order to see debug messages, and so that
	298	* it does not get removed if platform_add_devices fails!
	299	*/
	300	(void)platform_device_register(&nas100d_uart);
	301
3145d8a6	302	platform_add_devices(nas100d_devices, ARRAY_SIZE(nas100d_devices));
b7edc84a	303
c7d1623e RW	304	pm_power_off = nas100d_power_off;
	305
	306	if (request_irq(gpio_to_irq(NAS100D_RB_GPIO), &nas100d_reset_handler,
1ee6564d	307	IRQF_TRIGGER_LOW, "NAS100D reset button", NULL) < 0) {
c7d1623e RW	308
	309	printk(KERN_DEBUG "Reset Button IRQ %d not available\n",
	310	gpio_to_irq(NAS100D_RB_GPIO));
	311	}
	312
b7edc84a RW	313	/*
	314	* Map in a portion of the flash and read the MAC address.
	315	* Since it is stored in BE in the flash itself, we need to
	316	* byteswap it if we're in LE mode.
	317	*/
	318	f = ioremap(IXP4XX_EXP_BUS_BASE(0), 0x1000000);
	319	if (f) {
	320	for (i = 0; i < 6; i++)
	321	#ifdef __ARMEB__
	322	nas100d_plat_eth[0].hwaddr[i] = readb(f + 0xFC0FD8 + i);
	323	#else
	324	nas100d_plat_eth[0].hwaddr[i] = readb(f + 0xFC0FD8 + (i^3));
	325	#endif
	326	iounmap(f);
	327	}
e174961c JB	328	printk(KERN_INFO "NAS100D: Using MAC address %pM for port 0\n",
e174961c JB	329	nas100d_plat_eth[0].hwaddr);
b7edc84a	330
3145d8a6 RW	331	}
	332
	333	MACHINE_START(NAS100D, "Iomega NAS 100d")
	334	/* Maintainer: www.nslu2-linux.org */
e022c729	335	.atag_offset = 0x100,
3145d8a6	336	.map_io = ixp4xx_map_io,
f449588c	337	.init_early = ixp4xx_init_early,
3145d8a6	338	.init_irq = ixp4xx_init_irq,
6bb27d73	339	.init_time = ixp4xx_timer_init,
3145d8a6	340	.init_machine = nas100d_init,
7553ee77 NP	341	#if defined(CONFIG_PCI)
	342	.dma_zone_size = SZ_64M,
	343	#endif
d1b860fb	344	.restart = ixp4xx_restart,
3145d8a6	345	MACHINE_END