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x86-32: Fix sparse warning for the __PHYSICAL_MASK calculation
[thirdparty/linux.git] / arch / x86 / mm / init_64.c
CommitLineData
1da177e4
LT
1/*
2 * linux/arch/x86_64/mm/init.c
3 *
4 * Copyright (C) 1995 Linus Torvalds
a2531293 5 * Copyright (C) 2000 Pavel Machek <pavel@ucw.cz>
1da177e4
LT
6 * Copyright (C) 2002,2003 Andi Kleen <ak@suse.de>
7 */
8
1da177e4
LT
9#include <linux/signal.h>
10#include <linux/sched.h>
11#include <linux/kernel.h>
12#include <linux/errno.h>
13#include <linux/string.h>
14#include <linux/types.h>
15#include <linux/ptrace.h>
16#include <linux/mman.h>
17#include <linux/mm.h>
18#include <linux/swap.h>
19#include <linux/smp.h>
20#include <linux/init.h>
11034d55 21#include <linux/initrd.h>
1da177e4
LT
22#include <linux/pagemap.h>
23#include <linux/bootmem.h>
24#include <linux/proc_fs.h>
59170891 25#include <linux/pci.h>
6fb14755 26#include <linux/pfn.h>
c9cf5528 27#include <linux/poison.h>
17a941d8 28#include <linux/dma-mapping.h>
44df75e6
MT
29#include <linux/module.h>
30#include <linux/memory_hotplug.h>
ae32b129 31#include <linux/nmi.h>
5a0e3ad6 32#include <linux/gfp.h>
1da177e4
LT
33
34#include <asm/processor.h>
46eaa670 35#include <asm/bios_ebda.h>
1da177e4
LT
36#include <asm/system.h>
37#include <asm/uaccess.h>
38#include <asm/pgtable.h>
39#include <asm/pgalloc.h>
40#include <asm/dma.h>
41#include <asm/fixmap.h>
42#include <asm/e820.h>
43#include <asm/apic.h>
44#include <asm/tlb.h>
45#include <asm/mmu_context.h>
46#include <asm/proto.h>
47#include <asm/smp.h>
2bc0414e 48#include <asm/sections.h>
718fc13b 49#include <asm/kdebug.h>
aaa64e04 50#include <asm/numa.h>
7bfeab9a 51#include <asm/cacheflush.h>
4fcb2083 52#include <asm/init.h>
ea085417 53#include <linux/bootmem.h>
1da177e4 54
e18c6874
AK
55static unsigned long dma_reserve __initdata;
56
00d1c5e0
IM
57static int __init parse_direct_gbpages_off(char *arg)
58{
59 direct_gbpages = 0;
60 return 0;
61}
62early_param("nogbpages", parse_direct_gbpages_off);
63
64static int __init parse_direct_gbpages_on(char *arg)
65{
66 direct_gbpages = 1;
67 return 0;
68}
69early_param("gbpages", parse_direct_gbpages_on);
70
1da177e4
LT
71/*
72 * NOTE: pagetable_init alloc all the fixmap pagetables contiguous on the
73 * physical space so we can cache the place of the first one and move
74 * around without checking the pgd every time.
75 */
76
be43d728 77pteval_t __supported_pte_mask __read_mostly = ~_PAGE_IOMAP;
bd220a24
YL
78EXPORT_SYMBOL_GPL(__supported_pte_mask);
79
bd220a24
YL
80int force_personality32;
81
deed05b7
IM
82/*
83 * noexec32=on|off
84 * Control non executable heap for 32bit processes.
85 * To control the stack too use noexec=off
86 *
87 * on PROT_READ does not imply PROT_EXEC for 32-bit processes (default)
88 * off PROT_READ implies PROT_EXEC
89 */
bd220a24
YL
90static int __init nonx32_setup(char *str)
91{
92 if (!strcmp(str, "on"))
93 force_personality32 &= ~READ_IMPLIES_EXEC;
94 else if (!strcmp(str, "off"))
95 force_personality32 |= READ_IMPLIES_EXEC;
96 return 1;
97}
98__setup("noexec32=", nonx32_setup);
99
6afb5157
HL
100/*
101 * When memory was added/removed make sure all the processes MM have
102 * suitable PGD entries in the local PGD level page.
103 */
104void sync_global_pgds(unsigned long start, unsigned long end)
105{
106 unsigned long address;
107
108 for (address = start; address <= end; address += PGDIR_SIZE) {
109 const pgd_t *pgd_ref = pgd_offset_k(address);
110 unsigned long flags;
111 struct page *page;
112
113 if (pgd_none(*pgd_ref))
114 continue;
115
116 spin_lock_irqsave(&pgd_lock, flags);
117 list_for_each_entry(page, &pgd_list, lru) {
118 pgd_t *pgd;
119 pgd = (pgd_t *)page_address(page) + pgd_index(address);
120 if (pgd_none(*pgd))
121 set_pgd(pgd, *pgd_ref);
122 else
123 BUG_ON(pgd_page_vaddr(*pgd)
124 != pgd_page_vaddr(*pgd_ref));
125 }
126 spin_unlock_irqrestore(&pgd_lock, flags);
127 }
128}
129
8d6ea967
MS
130/*
131 * NOTE: This function is marked __ref because it calls __init function
132 * (alloc_bootmem_pages). It's safe to do it ONLY when after_bootmem == 0.
133 */
134static __ref void *spp_getpage(void)
14a62c34 135{
1da177e4 136 void *ptr;
14a62c34 137
1da177e4 138 if (after_bootmem)
9e730237 139 ptr = (void *) get_zeroed_page(GFP_ATOMIC | __GFP_NOTRACK);
1da177e4
LT
140 else
141 ptr = alloc_bootmem_pages(PAGE_SIZE);
14a62c34
TG
142
143 if (!ptr || ((unsigned long)ptr & ~PAGE_MASK)) {
144 panic("set_pte_phys: cannot allocate page data %s\n",
145 after_bootmem ? "after bootmem" : "");
146 }
1da177e4 147
10f22dde 148 pr_debug("spp_getpage %p\n", ptr);
14a62c34 149
1da177e4 150 return ptr;
14a62c34 151}
1da177e4 152
f254f390 153static pud_t *fill_pud(pgd_t *pgd, unsigned long vaddr)
1da177e4 154{
458a3e64
TH
155 if (pgd_none(*pgd)) {
156 pud_t *pud = (pud_t *)spp_getpage();
157 pgd_populate(&init_mm, pgd, pud);
158 if (pud != pud_offset(pgd, 0))
159 printk(KERN_ERR "PAGETABLE BUG #00! %p <-> %p\n",
160 pud, pud_offset(pgd, 0));
161 }
162 return pud_offset(pgd, vaddr);
163}
1da177e4 164
f254f390 165static pmd_t *fill_pmd(pud_t *pud, unsigned long vaddr)
458a3e64 166{
1da177e4 167 if (pud_none(*pud)) {
458a3e64 168 pmd_t *pmd = (pmd_t *) spp_getpage();
bb23e403 169 pud_populate(&init_mm, pud, pmd);
458a3e64 170 if (pmd != pmd_offset(pud, 0))
10f22dde 171 printk(KERN_ERR "PAGETABLE BUG #01! %p <-> %p\n",
458a3e64 172 pmd, pmd_offset(pud, 0));
1da177e4 173 }
458a3e64
TH
174 return pmd_offset(pud, vaddr);
175}
176
f254f390 177static pte_t *fill_pte(pmd_t *pmd, unsigned long vaddr)
458a3e64 178{
1da177e4 179 if (pmd_none(*pmd)) {
458a3e64 180 pte_t *pte = (pte_t *) spp_getpage();
bb23e403 181 pmd_populate_kernel(&init_mm, pmd, pte);
458a3e64 182 if (pte != pte_offset_kernel(pmd, 0))
10f22dde 183 printk(KERN_ERR "PAGETABLE BUG #02!\n");
1da177e4 184 }
458a3e64
TH
185 return pte_offset_kernel(pmd, vaddr);
186}
187
188void set_pte_vaddr_pud(pud_t *pud_page, unsigned long vaddr, pte_t new_pte)
189{
190 pud_t *pud;
191 pmd_t *pmd;
192 pte_t *pte;
193
194 pud = pud_page + pud_index(vaddr);
195 pmd = fill_pmd(pud, vaddr);
196 pte = fill_pte(pmd, vaddr);
1da177e4 197
1da177e4
LT
198 set_pte(pte, new_pte);
199
200 /*
201 * It's enough to flush this one mapping.
202 * (PGE mappings get flushed as well)
203 */
204 __flush_tlb_one(vaddr);
205}
206
458a3e64 207void set_pte_vaddr(unsigned long vaddr, pte_t pteval)
0814e0ba
EH
208{
209 pgd_t *pgd;
210 pud_t *pud_page;
211
212 pr_debug("set_pte_vaddr %lx to %lx\n", vaddr, native_pte_val(pteval));
213
214 pgd = pgd_offset_k(vaddr);
215 if (pgd_none(*pgd)) {
216 printk(KERN_ERR
217 "PGD FIXMAP MISSING, it should be setup in head.S!\n");
218 return;
219 }
220 pud_page = (pud_t*)pgd_page_vaddr(*pgd);
221 set_pte_vaddr_pud(pud_page, vaddr, pteval);
222}
223
458a3e64 224pmd_t * __init populate_extra_pmd(unsigned long vaddr)
11124411
TH
225{
226 pgd_t *pgd;
227 pud_t *pud;
228
229 pgd = pgd_offset_k(vaddr);
458a3e64
TH
230 pud = fill_pud(pgd, vaddr);
231 return fill_pmd(pud, vaddr);
232}
233
234pte_t * __init populate_extra_pte(unsigned long vaddr)
235{
236 pmd_t *pmd;
11124411 237
458a3e64
TH
238 pmd = populate_extra_pmd(vaddr);
239 return fill_pte(pmd, vaddr);
11124411
TH
240}
241
3a9e189d
JS
242/*
243 * Create large page table mappings for a range of physical addresses.
244 */
245static void __init __init_extra_mapping(unsigned long phys, unsigned long size,
246 pgprot_t prot)
247{
248 pgd_t *pgd;
249 pud_t *pud;
250 pmd_t *pmd;
251
252 BUG_ON((phys & ~PMD_MASK) || (size & ~PMD_MASK));
253 for (; size; phys += PMD_SIZE, size -= PMD_SIZE) {
254 pgd = pgd_offset_k((unsigned long)__va(phys));
255 if (pgd_none(*pgd)) {
256 pud = (pud_t *) spp_getpage();
257 set_pgd(pgd, __pgd(__pa(pud) | _KERNPG_TABLE |
258 _PAGE_USER));
259 }
260 pud = pud_offset(pgd, (unsigned long)__va(phys));
261 if (pud_none(*pud)) {
262 pmd = (pmd_t *) spp_getpage();
263 set_pud(pud, __pud(__pa(pmd) | _KERNPG_TABLE |
264 _PAGE_USER));
265 }
266 pmd = pmd_offset(pud, phys);
267 BUG_ON(!pmd_none(*pmd));
268 set_pmd(pmd, __pmd(phys | pgprot_val(prot)));
269 }
270}
271
272void __init init_extra_mapping_wb(unsigned long phys, unsigned long size)
273{
274 __init_extra_mapping(phys, size, PAGE_KERNEL_LARGE);
275}
276
277void __init init_extra_mapping_uc(unsigned long phys, unsigned long size)
278{
279 __init_extra_mapping(phys, size, PAGE_KERNEL_LARGE_NOCACHE);
280}
281
31eedd82 282/*
88f3aec7
IM
283 * The head.S code sets up the kernel high mapping:
284 *
285 * from __START_KERNEL_map to __START_KERNEL_map + size (== _end-_text)
31eedd82
TG
286 *
287 * phys_addr holds the negative offset to the kernel, which is added
288 * to the compile time generated pmds. This results in invalid pmds up
289 * to the point where we hit the physaddr 0 mapping.
290 *
291 * We limit the mappings to the region from _text to _end. _end is
292 * rounded up to the 2MB boundary. This catches the invalid pmds as
293 * well, as they are located before _text:
294 */
295void __init cleanup_highmap(void)
296{
297 unsigned long vaddr = __START_KERNEL_map;
d86bb0da 298 unsigned long end = roundup((unsigned long)_end, PMD_SIZE) - 1;
31eedd82
TG
299 pmd_t *pmd = level2_kernel_pgt;
300 pmd_t *last_pmd = pmd + PTRS_PER_PMD;
301
302 for (; pmd < last_pmd; pmd++, vaddr += PMD_SIZE) {
2884f110 303 if (pmd_none(*pmd))
31eedd82
TG
304 continue;
305 if (vaddr < (unsigned long) _text || vaddr > end)
306 set_pmd(pmd, __pmd(0));
307 }
308}
309
9482ac6e 310static __ref void *alloc_low_page(unsigned long *phys)
14a62c34 311{
298af9d8 312 unsigned long pfn = e820_table_end++;
1da177e4
LT
313 void *adr;
314
44df75e6 315 if (after_bootmem) {
9e730237 316 adr = (void *)get_zeroed_page(GFP_ATOMIC | __GFP_NOTRACK);
44df75e6 317 *phys = __pa(adr);
14a62c34 318
44df75e6
MT
319 return adr;
320 }
321
298af9d8 322 if (pfn >= e820_table_top)
14a62c34 323 panic("alloc_low_page: ran out of memory");
dafe41ee 324
14941779 325 adr = early_memremap(pfn * PAGE_SIZE, PAGE_SIZE);
44df75e6 326 memset(adr, 0, PAGE_SIZE);
dafe41ee
VG
327 *phys = pfn * PAGE_SIZE;
328 return adr;
329}
1da177e4 330
9482ac6e 331static __ref void unmap_low_page(void *adr)
14a62c34 332{
44df75e6
MT
333 if (after_bootmem)
334 return;
335
dafe41ee 336 early_iounmap(adr, PAGE_SIZE);
14a62c34 337}
1da177e4 338
7b16eb89 339static unsigned long __meminit
b27a43c1
SS
340phys_pte_init(pte_t *pte_page, unsigned long addr, unsigned long end,
341 pgprot_t prot)
4f9c11dd
JF
342{
343 unsigned pages = 0;
7b16eb89 344 unsigned long last_map_addr = end;
4f9c11dd 345 int i;
7b16eb89 346
4f9c11dd
JF
347 pte_t *pte = pte_page + pte_index(addr);
348
349 for(i = pte_index(addr); i < PTRS_PER_PTE; i++, addr += PAGE_SIZE, pte++) {
350
351 if (addr >= end) {
352 if (!after_bootmem) {
353 for(; i < PTRS_PER_PTE; i++, pte++)
354 set_pte(pte, __pte(0));
355 }
356 break;
357 }
358
b27a43c1
SS
359 /*
360 * We will re-use the existing mapping.
361 * Xen for example has some special requirements, like mapping
362 * pagetable pages as RO. So assume someone who pre-setup
363 * these mappings are more intelligent.
364 */
3afa3949
YL
365 if (pte_val(*pte)) {
366 pages++;
4f9c11dd 367 continue;
3afa3949 368 }
4f9c11dd
JF
369
370 if (0)
371 printk(" pte=%p addr=%lx pte=%016lx\n",
372 pte, addr, pfn_pte(addr >> PAGE_SHIFT, PAGE_KERNEL).pte);
4f9c11dd 373 pages++;
b27a43c1 374 set_pte(pte, pfn_pte(addr >> PAGE_SHIFT, prot));
7b16eb89 375 last_map_addr = (addr & PAGE_MASK) + PAGE_SIZE;
4f9c11dd 376 }
a2699e47 377
4f9c11dd 378 update_page_count(PG_LEVEL_4K, pages);
7b16eb89
YL
379
380 return last_map_addr;
4f9c11dd
JF
381}
382
7b16eb89 383static unsigned long __meminit
b27a43c1
SS
384phys_pte_update(pmd_t *pmd, unsigned long address, unsigned long end,
385 pgprot_t prot)
4f9c11dd
JF
386{
387 pte_t *pte = (pte_t *)pmd_page_vaddr(*pmd);
388
b27a43c1 389 return phys_pte_init(pte, address, end, prot);
4f9c11dd
JF
390}
391
cc615032 392static unsigned long __meminit
b50efd2a 393phys_pmd_init(pmd_t *pmd_page, unsigned long address, unsigned long end,
b27a43c1 394 unsigned long page_size_mask, pgprot_t prot)
44df75e6 395{
ce0c0e50 396 unsigned long pages = 0;
7b16eb89 397 unsigned long last_map_addr = end;
ce0c0e50 398
6ad91658 399 int i = pmd_index(address);
44df75e6 400
6ad91658 401 for (; i < PTRS_PER_PMD; i++, address += PMD_SIZE) {
4f9c11dd 402 unsigned long pte_phys;
6ad91658 403 pmd_t *pmd = pmd_page + pmd_index(address);
4f9c11dd 404 pte_t *pte;
b27a43c1 405 pgprot_t new_prot = prot;
44df75e6 406
5f51e139 407 if (address >= end) {
14a62c34 408 if (!after_bootmem) {
5f51e139
JB
409 for (; i < PTRS_PER_PMD; i++, pmd++)
410 set_pmd(pmd, __pmd(0));
14a62c34 411 }
44df75e6
MT
412 break;
413 }
6ad91658 414
4f9c11dd 415 if (pmd_val(*pmd)) {
8ae3a5a8
JB
416 if (!pmd_large(*pmd)) {
417 spin_lock(&init_mm.page_table_lock);
7b16eb89 418 last_map_addr = phys_pte_update(pmd, address,
b27a43c1 419 end, prot);
8ae3a5a8 420 spin_unlock(&init_mm.page_table_lock);
a2699e47 421 continue;
8ae3a5a8 422 }
b27a43c1
SS
423 /*
424 * If we are ok with PG_LEVEL_2M mapping, then we will
425 * use the existing mapping,
426 *
427 * Otherwise, we will split the large page mapping but
428 * use the same existing protection bits except for
429 * large page, so that we don't violate Intel's TLB
430 * Application note (317080) which says, while changing
431 * the page sizes, new and old translations should
432 * not differ with respect to page frame and
433 * attributes.
434 */
3afa3949
YL
435 if (page_size_mask & (1 << PG_LEVEL_2M)) {
436 pages++;
b27a43c1 437 continue;
3afa3949 438 }
b27a43c1 439 new_prot = pte_pgprot(pte_clrhuge(*(pte_t *)pmd));
4f9c11dd
JF
440 }
441
b50efd2a 442 if (page_size_mask & (1<<PG_LEVEL_2M)) {
4f9c11dd 443 pages++;
8ae3a5a8 444 spin_lock(&init_mm.page_table_lock);
4f9c11dd 445 set_pte((pte_t *)pmd,
b27a43c1
SS
446 pfn_pte(address >> PAGE_SHIFT,
447 __pgprot(pgprot_val(prot) | _PAGE_PSE)));
8ae3a5a8 448 spin_unlock(&init_mm.page_table_lock);
7b16eb89 449 last_map_addr = (address & PMD_MASK) + PMD_SIZE;
6ad91658 450 continue;
4f9c11dd 451 }
6ad91658 452
4f9c11dd 453 pte = alloc_low_page(&pte_phys);
b27a43c1 454 last_map_addr = phys_pte_init(pte, address, end, new_prot);
4f9c11dd
JF
455 unmap_low_page(pte);
456
8ae3a5a8 457 spin_lock(&init_mm.page_table_lock);
4f9c11dd 458 pmd_populate_kernel(&init_mm, pmd, __va(pte_phys));
8ae3a5a8 459 spin_unlock(&init_mm.page_table_lock);
44df75e6 460 }
ce0c0e50 461 update_page_count(PG_LEVEL_2M, pages);
7b16eb89 462 return last_map_addr;
44df75e6
MT
463}
464
cc615032 465static unsigned long __meminit
b50efd2a 466phys_pmd_update(pud_t *pud, unsigned long address, unsigned long end,
b27a43c1 467 unsigned long page_size_mask, pgprot_t prot)
44df75e6 468{
14a62c34 469 pmd_t *pmd = pmd_offset(pud, 0);
cc615032
AK
470 unsigned long last_map_addr;
471
b27a43c1 472 last_map_addr = phys_pmd_init(pmd, address, end, page_size_mask, prot);
6ad91658 473 __flush_tlb_all();
cc615032 474 return last_map_addr;
44df75e6
MT
475}
476
cc615032 477static unsigned long __meminit
b50efd2a
YL
478phys_pud_init(pud_t *pud_page, unsigned long addr, unsigned long end,
479 unsigned long page_size_mask)
14a62c34 480{
ce0c0e50 481 unsigned long pages = 0;
cc615032 482 unsigned long last_map_addr = end;
6ad91658 483 int i = pud_index(addr);
44df75e6 484
14a62c34 485 for (; i < PTRS_PER_PUD; i++, addr = (addr & PUD_MASK) + PUD_SIZE) {
6ad91658
KM
486 unsigned long pmd_phys;
487 pud_t *pud = pud_page + pud_index(addr);
1da177e4 488 pmd_t *pmd;
b27a43c1 489 pgprot_t prot = PAGE_KERNEL;
1da177e4 490
6ad91658 491 if (addr >= end)
1da177e4 492 break;
1da177e4 493
14a62c34
TG
494 if (!after_bootmem &&
495 !e820_any_mapped(addr, addr+PUD_SIZE, 0)) {
496 set_pud(pud, __pud(0));
1da177e4 497 continue;
14a62c34 498 }
1da177e4 499
6ad91658 500 if (pud_val(*pud)) {
a2699e47 501 if (!pud_large(*pud)) {
b50efd2a 502 last_map_addr = phys_pmd_update(pud, addr, end,
b27a43c1 503 page_size_mask, prot);
a2699e47
SS
504 continue;
505 }
b27a43c1
SS
506 /*
507 * If we are ok with PG_LEVEL_1G mapping, then we will
508 * use the existing mapping.
509 *
510 * Otherwise, we will split the gbpage mapping but use
511 * the same existing protection bits except for large
512 * page, so that we don't violate Intel's TLB
513 * Application note (317080) which says, while changing
514 * the page sizes, new and old translations should
515 * not differ with respect to page frame and
516 * attributes.
517 */
3afa3949
YL
518 if (page_size_mask & (1 << PG_LEVEL_1G)) {
519 pages++;
b27a43c1 520 continue;
3afa3949 521 }
b27a43c1 522 prot = pte_pgprot(pte_clrhuge(*(pte_t *)pud));
ef925766
AK
523 }
524
b50efd2a 525 if (page_size_mask & (1<<PG_LEVEL_1G)) {
ce0c0e50 526 pages++;
8ae3a5a8 527 spin_lock(&init_mm.page_table_lock);
ef925766
AK
528 set_pte((pte_t *)pud,
529 pfn_pte(addr >> PAGE_SHIFT, PAGE_KERNEL_LARGE));
8ae3a5a8 530 spin_unlock(&init_mm.page_table_lock);
cc615032 531 last_map_addr = (addr & PUD_MASK) + PUD_SIZE;
6ad91658
KM
532 continue;
533 }
534
dafe41ee 535 pmd = alloc_low_page(&pmd_phys);
b27a43c1
SS
536 last_map_addr = phys_pmd_init(pmd, addr, end, page_size_mask,
537 prot);
4f9c11dd 538 unmap_low_page(pmd);
8ae3a5a8
JB
539
540 spin_lock(&init_mm.page_table_lock);
4f9c11dd 541 pud_populate(&init_mm, pud, __va(pmd_phys));
44df75e6 542 spin_unlock(&init_mm.page_table_lock);
1da177e4 543 }
1a2b4412 544 __flush_tlb_all();
a2699e47 545
ce0c0e50 546 update_page_count(PG_LEVEL_1G, pages);
cc615032 547
1a0db38e 548 return last_map_addr;
14a62c34 549}
1da177e4 550
4f9c11dd 551static unsigned long __meminit
b50efd2a
YL
552phys_pud_update(pgd_t *pgd, unsigned long addr, unsigned long end,
553 unsigned long page_size_mask)
4f9c11dd
JF
554{
555 pud_t *pud;
556
557 pud = (pud_t *)pgd_page_vaddr(*pgd);
558
b50efd2a 559 return phys_pud_init(pud, addr, end, page_size_mask);
4f9c11dd
JF
560}
561
41d840e2 562unsigned long __meminit
f765090a
PE
563kernel_physical_mapping_init(unsigned long start,
564 unsigned long end,
565 unsigned long page_size_mask)
14a62c34 566{
9b861528 567 bool pgd_changed = false;
b50efd2a 568 unsigned long next, last_map_addr = end;
9b861528 569 unsigned long addr;
1da177e4
LT
570
571 start = (unsigned long)__va(start);
572 end = (unsigned long)__va(end);
1c5f50ee 573 addr = start;
1da177e4
LT
574
575 for (; start < end; start = next) {
44df75e6 576 pgd_t *pgd = pgd_offset_k(start);
14a62c34 577 unsigned long pud_phys;
44df75e6
MT
578 pud_t *pud;
579
e22146e6 580 next = (start + PGDIR_SIZE) & PGDIR_MASK;
4f9c11dd
JF
581 if (next > end)
582 next = end;
583
584 if (pgd_val(*pgd)) {
b50efd2a
YL
585 last_map_addr = phys_pud_update(pgd, __pa(start),
586 __pa(end), page_size_mask);
4f9c11dd
JF
587 continue;
588 }
589
8ae3a5a8 590 pud = alloc_low_page(&pud_phys);
b50efd2a
YL
591 last_map_addr = phys_pud_init(pud, __pa(start), __pa(next),
592 page_size_mask);
4f9c11dd 593 unmap_low_page(pud);
8ae3a5a8
JB
594
595 spin_lock(&init_mm.page_table_lock);
596 pgd_populate(&init_mm, pgd, __va(pud_phys));
597 spin_unlock(&init_mm.page_table_lock);
9b861528 598 pgd_changed = true;
14a62c34 599 }
9b861528
HL
600
601 if (pgd_changed)
602 sync_global_pgds(addr, end);
603
a2699e47 604 __flush_tlb_all();
1da177e4 605
b50efd2a
YL
606 return last_map_addr;
607}
7b16eb89 608
2b97690f 609#ifndef CONFIG_NUMA
8ee2debc
DR
610void __init initmem_init(unsigned long start_pfn, unsigned long end_pfn,
611 int acpi, int k8)
1f75d7e3 612{
08677214 613#ifndef CONFIG_NO_BOOTMEM
1f75d7e3
YL
614 unsigned long bootmap_size, bootmap;
615
616 bootmap_size = bootmem_bootmap_pages(end_pfn)<<PAGE_SHIFT;
617 bootmap = find_e820_area(0, end_pfn<<PAGE_SHIFT, bootmap_size,
618 PAGE_SIZE);
619 if (bootmap == -1L)
620 panic("Cannot find bootmem map of size %ld\n", bootmap_size);
1842f90c 621 reserve_early(bootmap, bootmap + bootmap_size, "BOOTMAP");
346cafec
YL
622 /* don't touch min_low_pfn */
623 bootmap_size = init_bootmem_node(NODE_DATA(0), bootmap >> PAGE_SHIFT,
624 0, end_pfn);
1f75d7e3
YL
625 e820_register_active_regions(0, start_pfn, end_pfn);
626 free_bootmem_with_active_regions(0, end_pfn);
08677214
YL
627#else
628 e820_register_active_regions(0, start_pfn, end_pfn);
629#endif
1f75d7e3 630}
3551f88f 631#endif
1f75d7e3 632
1da177e4
LT
633void __init paging_init(void)
634{
6391af17 635 unsigned long max_zone_pfns[MAX_NR_ZONES];
14a62c34 636
6391af17
MG
637 memset(max_zone_pfns, 0, sizeof(max_zone_pfns));
638 max_zone_pfns[ZONE_DMA] = MAX_DMA_PFN;
639 max_zone_pfns[ZONE_DMA32] = MAX_DMA32_PFN;
c987d12f 640 max_zone_pfns[ZONE_NORMAL] = max_pfn;
6391af17 641
3551f88f 642 sparse_memory_present_with_active_regions(MAX_NUMNODES);
44df75e6 643 sparse_init();
44b57280
YL
644
645 /*
646 * clear the default setting with node 0
647 * note: don't use nodes_clear here, that is really clearing when
648 * numa support is not compiled in, and later node_set_state
649 * will not set it back.
650 */
651 node_clear_state(0, N_NORMAL_MEMORY);
652
5cb248ab 653 free_area_init_nodes(max_zone_pfns);
1da177e4 654}
1da177e4 655
44df75e6
MT
656/*
657 * Memory hotplug specific functions
44df75e6 658 */
bc02af93 659#ifdef CONFIG_MEMORY_HOTPLUG
ea085417
SZ
660/*
661 * After memory hotplug the variables max_pfn, max_low_pfn and high_memory need
662 * updating.
663 */
664static void update_end_of_memory_vars(u64 start, u64 size)
665{
666 unsigned long end_pfn = PFN_UP(start + size);
667
668 if (end_pfn > max_pfn) {
669 max_pfn = end_pfn;
670 max_low_pfn = end_pfn;
671 high_memory = (void *)__va(max_pfn * PAGE_SIZE - 1) + 1;
672 }
673}
674
9d99aaa3
AK
675/*
676 * Memory is added always to NORMAL zone. This means you will never get
677 * additional DMA/DMA32 memory.
678 */
bc02af93 679int arch_add_memory(int nid, u64 start, u64 size)
44df75e6 680{
bc02af93 681 struct pglist_data *pgdat = NODE_DATA(nid);
776ed98b 682 struct zone *zone = pgdat->node_zones + ZONE_NORMAL;
cc615032 683 unsigned long last_mapped_pfn, start_pfn = start >> PAGE_SHIFT;
44df75e6
MT
684 unsigned long nr_pages = size >> PAGE_SHIFT;
685 int ret;
686
60817c9b 687 last_mapped_pfn = init_memory_mapping(start, start + size);
cc615032
AK
688 if (last_mapped_pfn > max_pfn_mapped)
689 max_pfn_mapped = last_mapped_pfn;
45e0b78b 690
c04fc586 691 ret = __add_pages(nid, zone, start_pfn, nr_pages);
fe8b868e 692 WARN_ON_ONCE(ret);
44df75e6 693
ea085417
SZ
694 /* update max_pfn, max_low_pfn and high_memory */
695 update_end_of_memory_vars(start, size);
696
44df75e6 697 return ret;
44df75e6 698}
bc02af93 699EXPORT_SYMBOL_GPL(arch_add_memory);
44df75e6 700
8243229f 701#if !defined(CONFIG_ACPI_NUMA) && defined(CONFIG_NUMA)
4942e998
KM
702int memory_add_physaddr_to_nid(u64 start)
703{
704 return 0;
705}
8c2676a5 706EXPORT_SYMBOL_GPL(memory_add_physaddr_to_nid);
4942e998
KM
707#endif
708
45e0b78b
KM
709#endif /* CONFIG_MEMORY_HOTPLUG */
710
81ac3ad9 711static struct kcore_list kcore_vsyscall;
1da177e4
LT
712
713void __init mem_init(void)
714{
0a43e4bf 715 long codesize, reservedpages, datasize, initsize;
11a6b0c9 716 unsigned long absent_pages;
1da177e4 717
0dc243ae 718 pci_iommu_alloc();
1da177e4 719
48ddb154 720 /* clear_bss() already clear the empty_zero_page */
1da177e4
LT
721
722 reservedpages = 0;
723
724 /* this will put all low memory onto the freelists */
2b97690f 725#ifdef CONFIG_NUMA
0a43e4bf 726 totalram_pages = numa_free_all_bootmem();
1da177e4 727#else
0a43e4bf 728 totalram_pages = free_all_bootmem();
1da177e4 729#endif
11a6b0c9
YL
730
731 absent_pages = absent_pages_in_range(0, max_pfn);
732 reservedpages = max_pfn - totalram_pages - absent_pages;
1da177e4
LT
733 after_bootmem = 1;
734
735 codesize = (unsigned long) &_etext - (unsigned long) &_text;
736 datasize = (unsigned long) &_edata - (unsigned long) &_etext;
737 initsize = (unsigned long) &__init_end - (unsigned long) &__init_begin;
738
739 /* Register memory areas for /proc/kcore */
14a62c34 740 kclist_add(&kcore_vsyscall, (void *)VSYSCALL_START,
c30bb2a2 741 VSYSCALL_END - VSYSCALL_START, KCORE_OTHER);
1da177e4 742
10f22dde 743 printk(KERN_INFO "Memory: %luk/%luk available (%ldk kernel code, "
11a6b0c9 744 "%ldk absent, %ldk reserved, %ldk data, %ldk init)\n",
cc013a88 745 nr_free_pages() << (PAGE_SHIFT-10),
c987d12f 746 max_pfn << (PAGE_SHIFT-10),
1da177e4 747 codesize >> 10,
11a6b0c9 748 absent_pages << (PAGE_SHIFT-10),
1da177e4
LT
749 reservedpages << (PAGE_SHIFT-10),
750 datasize >> 10,
751 initsize >> 10);
1da177e4
LT
752}
753
67df197b 754#ifdef CONFIG_DEBUG_RODATA
edeed305
AV
755const int rodata_test_data = 0xC3;
756EXPORT_SYMBOL_GPL(rodata_test_data);
67df197b 757
502f6604 758int kernel_set_to_readonly;
16239630
SR
759
760void set_kernel_text_rw(void)
761{
b9af7c0d 762 unsigned long start = PFN_ALIGN(_text);
e7d23dde 763 unsigned long end = PFN_ALIGN(__stop___ex_table);
16239630
SR
764
765 if (!kernel_set_to_readonly)
766 return;
767
768 pr_debug("Set kernel text: %lx - %lx for read write\n",
769 start, end);
770
e7d23dde
SS
771 /*
772 * Make the kernel identity mapping for text RW. Kernel text
773 * mapping will always be RO. Refer to the comment in
774 * static_protections() in pageattr.c
775 */
16239630
SR
776 set_memory_rw(start, (end - start) >> PAGE_SHIFT);
777}
778
779void set_kernel_text_ro(void)
780{
b9af7c0d 781 unsigned long start = PFN_ALIGN(_text);
e7d23dde 782 unsigned long end = PFN_ALIGN(__stop___ex_table);
16239630
SR
783
784 if (!kernel_set_to_readonly)
785 return;
786
787 pr_debug("Set kernel text: %lx - %lx for read only\n",
788 start, end);
789
e7d23dde
SS
790 /*
791 * Set the kernel identity mapping for text RO.
792 */
16239630
SR
793 set_memory_ro(start, (end - start) >> PAGE_SHIFT);
794}
795
67df197b
AV
796void mark_rodata_ro(void)
797{
74e08179 798 unsigned long start = PFN_ALIGN(_text);
8f0f996e
SR
799 unsigned long rodata_start =
800 ((unsigned long)__start_rodata + PAGE_SIZE - 1) & PAGE_MASK;
74e08179
SS
801 unsigned long end = (unsigned long) &__end_rodata_hpage_align;
802 unsigned long text_end = PAGE_ALIGN((unsigned long) &__stop___ex_table);
803 unsigned long rodata_end = PAGE_ALIGN((unsigned long) &__end_rodata);
804 unsigned long data_start = (unsigned long) &_sdata;
8f0f996e 805
6fb14755 806 printk(KERN_INFO "Write protecting the kernel read-only data: %luk\n",
e3ebadd9 807 (end - start) >> 10);
984bb80d
AV
808 set_memory_ro(start, (end - start) >> PAGE_SHIFT);
809
16239630
SR
810 kernel_set_to_readonly = 1;
811
984bb80d
AV
812 /*
813 * The rodata section (but not the kernel text!) should also be
814 * not-executable.
815 */
72b59d67 816 set_memory_nx(rodata_start, (end - rodata_start) >> PAGE_SHIFT);
67df197b 817
1a487252
AV
818 rodata_test();
819
0c42f392 820#ifdef CONFIG_CPA_DEBUG
10f22dde 821 printk(KERN_INFO "Testing CPA: undo %lx-%lx\n", start, end);
6d238cc4 822 set_memory_rw(start, (end-start) >> PAGE_SHIFT);
0c42f392 823
10f22dde 824 printk(KERN_INFO "Testing CPA: again\n");
6d238cc4 825 set_memory_ro(start, (end-start) >> PAGE_SHIFT);
0c42f392 826#endif
74e08179
SS
827
828 free_init_pages("unused kernel memory",
829 (unsigned long) page_address(virt_to_page(text_end)),
830 (unsigned long)
831 page_address(virt_to_page(rodata_start)));
832 free_init_pages("unused kernel memory",
833 (unsigned long) page_address(virt_to_page(rodata_end)),
834 (unsigned long) page_address(virt_to_page(data_start)));
67df197b 835}
4e4eee0e 836
67df197b
AV
837#endif
838
d2dbf343
YL
839int __init reserve_bootmem_generic(unsigned long phys, unsigned long len,
840 int flags)
14a62c34 841{
2b97690f 842#ifdef CONFIG_NUMA
8b3cd09e 843 int nid, next_nid;
6a07a0ed 844 int ret;
5e58a02a
AK
845#endif
846 unsigned long pfn = phys >> PAGE_SHIFT;
14a62c34 847
c987d12f 848 if (pfn >= max_pfn) {
14a62c34
TG
849 /*
850 * This can happen with kdump kernels when accessing
851 * firmware tables:
852 */
67794292 853 if (pfn < max_pfn_mapped)
8b2ef1d7 854 return -EFAULT;
14a62c34 855
6a07a0ed 856 printk(KERN_ERR "reserve_bootmem: illegal reserve %lx %lu\n",
5e58a02a 857 phys, len);
8b2ef1d7 858 return -EFAULT;
5e58a02a
AK
859 }
860
861 /* Should check here against the e820 map to avoid double free */
862#ifdef CONFIG_NUMA
8b3cd09e
YL
863 nid = phys_to_nid(phys);
864 next_nid = phys_to_nid(phys + len - 1);
865 if (nid == next_nid)
8b2ef1d7 866 ret = reserve_bootmem_node(NODE_DATA(nid), phys, len, flags);
8b3cd09e 867 else
8b2ef1d7
BW
868 ret = reserve_bootmem(phys, len, flags);
869
870 if (ret != 0)
871 return ret;
872
14a62c34 873#else
a6a06f7b 874 reserve_bootmem(phys, len, flags);
1da177e4 875#endif
8b3cd09e 876
0e0b864e 877 if (phys+len <= MAX_DMA_PFN*PAGE_SIZE) {
e18c6874 878 dma_reserve += len / PAGE_SIZE;
0e0b864e
MG
879 set_dma_reserve(dma_reserve);
880 }
8b2ef1d7
BW
881
882 return 0;
1da177e4
LT
883}
884
14a62c34
TG
885int kern_addr_valid(unsigned long addr)
886{
1da177e4 887 unsigned long above = ((long)addr) >> __VIRTUAL_MASK_SHIFT;
14a62c34
TG
888 pgd_t *pgd;
889 pud_t *pud;
890 pmd_t *pmd;
891 pte_t *pte;
1da177e4
LT
892
893 if (above != 0 && above != -1UL)
14a62c34
TG
894 return 0;
895
1da177e4
LT
896 pgd = pgd_offset_k(addr);
897 if (pgd_none(*pgd))
898 return 0;
899
900 pud = pud_offset(pgd, addr);
901 if (pud_none(*pud))
14a62c34 902 return 0;
1da177e4
LT
903
904 pmd = pmd_offset(pud, addr);
905 if (pmd_none(*pmd))
906 return 0;
14a62c34 907
1da177e4
LT
908 if (pmd_large(*pmd))
909 return pfn_valid(pmd_pfn(*pmd));
910
911 pte = pte_offset_kernel(pmd, addr);
912 if (pte_none(*pte))
913 return 0;
14a62c34 914
1da177e4
LT
915 return pfn_valid(pte_pfn(*pte));
916}
917
14a62c34
TG
918/*
919 * A pseudo VMA to allow ptrace access for the vsyscall page. This only
920 * covers the 64bit vsyscall page now. 32bit has a real VMA now and does
921 * not need special handling anymore:
922 */
1da177e4 923static struct vm_area_struct gate_vma = {
14a62c34
TG
924 .vm_start = VSYSCALL_START,
925 .vm_end = VSYSCALL_START + (VSYSCALL_MAPPED_PAGES * PAGE_SIZE),
926 .vm_page_prot = PAGE_READONLY_EXEC,
927 .vm_flags = VM_READ | VM_EXEC
1da177e4
LT
928};
929
1da177e4
LT
930struct vm_area_struct *get_gate_vma(struct task_struct *tsk)
931{
932#ifdef CONFIG_IA32_EMULATION
1e014410
AK
933 if (test_tsk_thread_flag(tsk, TIF_IA32))
934 return NULL;
1da177e4
LT
935#endif
936 return &gate_vma;
937}
938
939int in_gate_area(struct task_struct *task, unsigned long addr)
940{
941 struct vm_area_struct *vma = get_gate_vma(task);
14a62c34 942
1e014410
AK
943 if (!vma)
944 return 0;
14a62c34 945
1da177e4
LT
946 return (addr >= vma->vm_start) && (addr < vma->vm_end);
947}
948
14a62c34
TG
949/*
950 * Use this when you have no reliable task/vma, typically from interrupt
951 * context. It is less reliable than using the task's vma and may give
952 * false positives:
1da177e4
LT
953 */
954int in_gate_area_no_task(unsigned long addr)
955{
1e014410 956 return (addr >= VSYSCALL_START) && (addr < VSYSCALL_END);
1da177e4 957}
2e1c49db 958
2aae950b
AK
959const char *arch_vma_name(struct vm_area_struct *vma)
960{
961 if (vma->vm_mm && vma->vm_start == (long)vma->vm_mm->context.vdso)
962 return "[vdso]";
963 if (vma == &gate_vma)
964 return "[vsyscall]";
965 return NULL;
966}
0889eba5
CL
967
968#ifdef CONFIG_SPARSEMEM_VMEMMAP
969/*
970 * Initialise the sparsemem vmemmap using huge-pages at the PMD level.
971 */
c2b91e2e
YL
972static long __meminitdata addr_start, addr_end;
973static void __meminitdata *p_start, *p_end;
974static int __meminitdata node_start;
975
14a62c34
TG
976int __meminit
977vmemmap_populate(struct page *start_page, unsigned long size, int node)
0889eba5
CL
978{
979 unsigned long addr = (unsigned long)start_page;
980 unsigned long end = (unsigned long)(start_page + size);
981 unsigned long next;
982 pgd_t *pgd;
983 pud_t *pud;
984 pmd_t *pmd;
985
986 for (; addr < end; addr = next) {
7c934d39 987 void *p = NULL;
0889eba5
CL
988
989 pgd = vmemmap_pgd_populate(addr, node);
990 if (!pgd)
991 return -ENOMEM;
14a62c34 992
0889eba5
CL
993 pud = vmemmap_pud_populate(pgd, addr, node);
994 if (!pud)
995 return -ENOMEM;
996
7c934d39
JF
997 if (!cpu_has_pse) {
998 next = (addr + PAGE_SIZE) & PAGE_MASK;
999 pmd = vmemmap_pmd_populate(pud, addr, node);
1000
1001 if (!pmd)
1002 return -ENOMEM;
1003
1004 p = vmemmap_pte_populate(pmd, addr, node);
14a62c34 1005
0889eba5
CL
1006 if (!p)
1007 return -ENOMEM;
1008
7c934d39
JF
1009 addr_end = addr + PAGE_SIZE;
1010 p_end = p + PAGE_SIZE;
14a62c34 1011 } else {
7c934d39
JF
1012 next = pmd_addr_end(addr, end);
1013
1014 pmd = pmd_offset(pud, addr);
1015 if (pmd_none(*pmd)) {
1016 pte_t entry;
1017
9bdac914 1018 p = vmemmap_alloc_block_buf(PMD_SIZE, node);
7c934d39
JF
1019 if (!p)
1020 return -ENOMEM;
1021
1022 entry = pfn_pte(__pa(p) >> PAGE_SHIFT,
1023 PAGE_KERNEL_LARGE);
1024 set_pmd(pmd, __pmd(pte_val(entry)));
1025
7c934d39
JF
1026 /* check to see if we have contiguous blocks */
1027 if (p_end != p || node_start != node) {
1028 if (p_start)
1029 printk(KERN_DEBUG " [%lx-%lx] PMD -> [%p-%p] on node %d\n",
1030 addr_start, addr_end-1, p_start, p_end-1, node_start);
1031 addr_start = addr;
1032 node_start = node;
1033 p_start = p;
1034 }
49c980df
YL
1035
1036 addr_end = addr + PMD_SIZE;
1037 p_end = p + PMD_SIZE;
7c934d39
JF
1038 } else
1039 vmemmap_verify((pte_t *)pmd, node, addr, next);
14a62c34 1040 }
7c934d39 1041
0889eba5 1042 }
9b861528 1043 sync_global_pgds((unsigned long)start_page, end);
0889eba5
CL
1044 return 0;
1045}
c2b91e2e
YL
1046
1047void __meminit vmemmap_populate_print_last(void)
1048{
1049 if (p_start) {
1050 printk(KERN_DEBUG " [%lx-%lx] PMD -> [%p-%p] on node %d\n",
1051 addr_start, addr_end-1, p_start, p_end-1, node_start);
1052 p_start = NULL;
1053 p_end = NULL;
1054 node_start = 0;
1055 }
1056}
0889eba5 1057#endif