[thirdparty/linux.git] / lib / atomic64_test.c

// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * Testsuite for atomic64_t functions
 *
 * Copyright © 2010  Luca Barbieri
 */

#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt

#include <linux/init.h>
#include <linux/bug.h>
#include <linux/kernel.h>
#include <linux/atomic.h>
#include <linux/module.h>

#ifdef CONFIG_X86
#include <asm/cpufeature.h>	/* for boot_cpu_has below */
#endif

#define TEST(bit, op, c_op, val)				\
do {								\
	atomic##bit##_set(&v, v0);				\
	r = v0;							\
	atomic##bit##_##op(val, &v);				\
	r c_op val;						\
	WARN(atomic##bit##_read(&v) != r, "%Lx != %Lx\n",	\
		(unsigned long long)atomic##bit##_read(&v),	\
		(unsigned long long)r);				\
} while (0)

/*
 * Test for a atomic operation family,
 * @test should be a macro accepting parameters (bit, op, ...)
 */

#define FAMILY_TEST(test, bit, op, args...)	\
do {						\
	test(bit, op, ##args);		\
	test(bit, op##_acquire, ##args);	\
	test(bit, op##_release, ##args);	\
	test(bit, op##_relaxed, ##args);	\
} while (0)

#define TEST_RETURN(bit, op, c_op, val)				\
do {								\
	atomic##bit##_set(&v, v0);				\
	r = v0;							\
	r c_op val;						\
	BUG_ON(atomic##bit##_##op(val, &v) != r);		\
	BUG_ON(atomic##bit##_read(&v) != r);			\
} while (0)

#define TEST_FETCH(bit, op, c_op, val)				\
do {								\
	atomic##bit##_set(&v, v0);				\
	r = v0;							\
	r c_op val;						\
	BUG_ON(atomic##bit##_##op(val, &v) != v0);		\
	BUG_ON(atomic##bit##_read(&v) != r);			\
} while (0)

#define RETURN_FAMILY_TEST(bit, op, c_op, val)			\
do {								\
	FAMILY_TEST(TEST_RETURN, bit, op, c_op, val);		\
} while (0)

#define FETCH_FAMILY_TEST(bit, op, c_op, val)			\
do {								\
	FAMILY_TEST(TEST_FETCH, bit, op, c_op, val);		\
} while (0)

#define TEST_ARGS(bit, op, init, ret, expect, args...)		\
do {								\
	atomic##bit##_set(&v, init);				\
	BUG_ON(atomic##bit##_##op(&v, ##args) != ret);		\
	BUG_ON(atomic##bit##_read(&v) != expect);		\
} while (0)

#define XCHG_FAMILY_TEST(bit, init, new)				\
do {									\
	FAMILY_TEST(TEST_ARGS, bit, xchg, init, init, new, new);	\
} while (0)

#define CMPXCHG_FAMILY_TEST(bit, init, new, wrong)			\
do {									\
	FAMILY_TEST(TEST_ARGS, bit, cmpxchg, 				\
			init, init, new, init, new);			\
	FAMILY_TEST(TEST_ARGS, bit, cmpxchg,				\
			init, init, init, wrong, new);			\
} while (0)

#define INC_RETURN_FAMILY_TEST(bit, i)			\
do {							\
	FAMILY_TEST(TEST_ARGS, bit, inc_return,		\
			i, (i) + one, (i) + one);	\
} while (0)

#define DEC_RETURN_FAMILY_TEST(bit, i)			\
do {							\
	FAMILY_TEST(TEST_ARGS, bit, dec_return,		\
			i, (i) - one, (i) - one);	\
} while (0)

static __init void test_atomic(void)
{
	int v0 = 0xaaa31337;
	int v1 = 0xdeadbeef;
	int onestwos = 0x11112222;
	int one = 1;

	atomic_t v;
	int r;

	TEST(, add, +=, onestwos);
	TEST(, add, +=, -one);
	TEST(, sub, -=, onestwos);
	TEST(, sub, -=, -one);
	TEST(, or, |=, v1);
	TEST(, and, &=, v1);
	TEST(, xor, ^=, v1);
	TEST(, andnot, &= ~, v1);

	RETURN_FAMILY_TEST(, add_return, +=, onestwos);
	RETURN_FAMILY_TEST(, add_return, +=, -one);
	RETURN_FAMILY_TEST(, sub_return, -=, onestwos);
	RETURN_FAMILY_TEST(, sub_return, -=, -one);

	FETCH_FAMILY_TEST(, fetch_add, +=, onestwos);
	FETCH_FAMILY_TEST(, fetch_add, +=, -one);
	FETCH_FAMILY_TEST(, fetch_sub, -=, onestwos);
	FETCH_FAMILY_TEST(, fetch_sub, -=, -one);

	FETCH_FAMILY_TEST(, fetch_or,  |=, v1);
	FETCH_FAMILY_TEST(, fetch_and, &=, v1);
	FETCH_FAMILY_TEST(, fetch_andnot, &= ~, v1);
	FETCH_FAMILY_TEST(, fetch_xor, ^=, v1);

	INC_RETURN_FAMILY_TEST(, v0);
	DEC_RETURN_FAMILY_TEST(, v0);

	XCHG_FAMILY_TEST(, v0, v1);
	CMPXCHG_FAMILY_TEST(, v0, v1, onestwos);

}

#define INIT(c) do { atomic64_set(&v, c); r = c; } while (0)
static __init void test_atomic64(void)
{
	long long v0 = 0xaaa31337c001d00dLL;
	long long v1 = 0xdeadbeefdeafcafeLL;
	long long v2 = 0xfaceabadf00df001LL;
	long long v3 = 0x8000000000000000LL;
	long long onestwos = 0x1111111122222222LL;
	long long one = 1LL;
	int r_int;

	atomic64_t v = ATOMIC64_INIT(v0);
	long long r = v0;
	BUG_ON(v.counter != r);

	atomic64_set(&v, v1);
	r = v1;
	BUG_ON(v.counter != r);
	BUG_ON(atomic64_read(&v) != r);

	TEST(64, add, +=, onestwos);
	TEST(64, add, +=, -one);
	TEST(64, sub, -=, onestwos);
	TEST(64, sub, -=, -one);
	TEST(64, or, |=, v1);
	TEST(64, and, &=, v1);
	TEST(64, xor, ^=, v1);
	TEST(64, andnot, &= ~, v1);

	RETURN_FAMILY_TEST(64, add_return, +=, onestwos);
	RETURN_FAMILY_TEST(64, add_return, +=, -one);
	RETURN_FAMILY_TEST(64, sub_return, -=, onestwos);
	RETURN_FAMILY_TEST(64, sub_return, -=, -one);

	FETCH_FAMILY_TEST(64, fetch_add, +=, onestwos);
	FETCH_FAMILY_TEST(64, fetch_add, +=, -one);
	FETCH_FAMILY_TEST(64, fetch_sub, -=, onestwos);
	FETCH_FAMILY_TEST(64, fetch_sub, -=, -one);

	FETCH_FAMILY_TEST(64, fetch_or,  |=, v1);
	FETCH_FAMILY_TEST(64, fetch_and, &=, v1);
	FETCH_FAMILY_TEST(64, fetch_andnot, &= ~, v1);
	FETCH_FAMILY_TEST(64, fetch_xor, ^=, v1);

	INIT(v0);
	atomic64_inc(&v);
	r += one;
	BUG_ON(v.counter != r);

	INIT(v0);
	atomic64_dec(&v);
	r -= one;
	BUG_ON(v.counter != r);

	INC_RETURN_FAMILY_TEST(64, v0);
	DEC_RETURN_FAMILY_TEST(64, v0);

	XCHG_FAMILY_TEST(64, v0, v1);
	CMPXCHG_FAMILY_TEST(64, v0, v1, v2);

	INIT(v0);
	BUG_ON(atomic64_add_unless(&v, one, v0));
	BUG_ON(v.counter != r);

	INIT(v0);
	BUG_ON(!atomic64_add_unless(&v, one, v1));
	r += one;
	BUG_ON(v.counter != r);

	INIT(onestwos);
	BUG_ON(atomic64_dec_if_positive(&v) != (onestwos - 1));
	r -= one;
	BUG_ON(v.counter != r);

	INIT(0);
	BUG_ON(atomic64_dec_if_positive(&v) != -one);
	BUG_ON(v.counter != r);

	INIT(-one);
	BUG_ON(atomic64_dec_if_positive(&v) != (-one - one));
	BUG_ON(v.counter != r);

	INIT(onestwos);
	BUG_ON(!atomic64_inc_not_zero(&v));
	r += one;
	BUG_ON(v.counter != r);

	INIT(0);
	BUG_ON(atomic64_inc_not_zero(&v));
	BUG_ON(v.counter != r);

	INIT(-one);
	BUG_ON(!atomic64_inc_not_zero(&v));
	r += one;
	BUG_ON(v.counter != r);

	/* Confirm the return value fits in an int, even if the value doesn't */
	INIT(v3);
	r_int = atomic64_inc_not_zero(&v);
	BUG_ON(!r_int);
}

static __init int test_atomics_init(void)
{
	test_atomic();
	test_atomic64();

#ifdef CONFIG_X86
	pr_info("passed for %s platform %s CX8 and %s SSE\n",
#ifdef CONFIG_X86_64
		"x86-64",
#elif defined(CONFIG_X86_CMPXCHG64)
		"i586+",
#else
		"i386+",
#endif
	       boot_cpu_has(X86_FEATURE_CX8) ? "with" : "without",
	       boot_cpu_has(X86_FEATURE_XMM) ? "with" : "without");
#else
	pr_info("passed\n");
#endif

	return 0;
}

static __exit void test_atomics_exit(void) {}

module_init(test_atomics_init);
module_exit(test_atomics_exit);

MODULE_LICENSE("GPL");
Commit	Line	Data
2874c5fd	1	// SPDX-License-Identifier: GPL-2.0-or-later
86a89380 LB	2	/*
	3	* Testsuite for atomic64_t functions
	4	*
	5	* Copyright © 2010 Luca Barbieri
86a89380	6	*/
b3b16d28 FF	7
	8	#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
	9
86a89380	10	#include <linux/init.h>
50af5ead	11	#include <linux/bug.h>
0dbdd1bf	12	#include <linux/kernel.h>
60063497	13	#include <linux/atomic.h>
55ded955	14	#include <linux/module.h>
86a89380	15
153a4334	16	#ifdef CONFIG_X86
cd4d09ec	17	#include <asm/cpufeature.h> /* for boot_cpu_has below */
153a4334 AK	18	#endif
153a4334 AK	19
41b9e9fc PZ	20	#define TEST(bit, op, c_op, val) \
	21	do { \
	22	atomic##bit##_set(&v, v0); \
	23	r = v0; \
	24	atomic##bit##_##op(val, &v); \
	25	r c_op val; \
	26	WARN(atomic##bit##_read(&v) != r, "%Lx != %Lx\n", \
	27	(unsigned long long)atomic##bit##_read(&v), \
	28	(unsigned long long)r); \
	29	} while (0)
	30
978e5a36 BF	31	/*
	32	* Test for a atomic operation family,
	33	* @test should be a macro accepting parameters (bit, op, ...)
	34	*/
	35
	36	#define FAMILY_TEST(test, bit, op, args...) \
	37	do { \
	38	test(bit, op, ##args); \
	39	test(bit, op##_acquire, ##args); \
	40	test(bit, op##_release, ##args); \
	41	test(bit, op##_relaxed, ##args); \
	42	} while (0)
	43
	44	#define TEST_RETURN(bit, op, c_op, val) \
	45	do { \
	46	atomic##bit##_set(&v, v0); \
	47	r = v0; \
	48	r c_op val; \
	49	BUG_ON(atomic##bit##_##op(val, &v) != r); \
	50	BUG_ON(atomic##bit##_read(&v) != r); \
	51	} while (0)
	52
28aa2bda PZ	53	#define TEST_FETCH(bit, op, c_op, val) \
	54	do { \
	55	atomic##bit##_set(&v, v0); \
	56	r = v0; \
	57	r c_op val; \
	58	BUG_ON(atomic##bit##_##op(val, &v) != v0); \
	59	BUG_ON(atomic##bit##_read(&v) != r); \
	60	} while (0)
	61
978e5a36 BF	62	#define RETURN_FAMILY_TEST(bit, op, c_op, val) \
	63	do { \
	64	FAMILY_TEST(TEST_RETURN, bit, op, c_op, val); \
	65	} while (0)
	66
28aa2bda PZ	67	#define FETCH_FAMILY_TEST(bit, op, c_op, val) \
	68	do { \
	69	FAMILY_TEST(TEST_FETCH, bit, op, c_op, val); \
	70	} while (0)
	71
978e5a36 BF	72	#define TEST_ARGS(bit, op, init, ret, expect, args...) \
	73	do { \
	74	atomic##bit##_set(&v, init); \
	75	BUG_ON(atomic##bit##_##op(&v, ##args) != ret); \
	76	BUG_ON(atomic##bit##_read(&v) != expect); \
	77	} while (0)
	78
	79	#define XCHG_FAMILY_TEST(bit, init, new) \
	80	do { \
	81	FAMILY_TEST(TEST_ARGS, bit, xchg, init, init, new, new); \
	82	} while (0)
	83
	84	#define CMPXCHG_FAMILY_TEST(bit, init, new, wrong) \
	85	do { \
	86	FAMILY_TEST(TEST_ARGS, bit, cmpxchg, \
	87	init, init, new, init, new); \
	88	FAMILY_TEST(TEST_ARGS, bit, cmpxchg, \
	89	init, init, init, wrong, new); \
	90	} while (0)
	91
	92	#define INC_RETURN_FAMILY_TEST(bit, i) \
	93	do { \
	94	FAMILY_TEST(TEST_ARGS, bit, inc_return, \
	95	i, (i) + one, (i) + one); \
	96	} while (0)
	97
	98	#define DEC_RETURN_FAMILY_TEST(bit, i) \
	99	do { \
	100	FAMILY_TEST(TEST_ARGS, bit, dec_return, \
	101	i, (i) - one, (i) - one); \
	102	} while (0)
	103
41b9e9fc PZ	104	static __init void test_atomic(void)
	105	{
	106	int v0 = 0xaaa31337;
	107	int v1 = 0xdeadbeef;
	108	int onestwos = 0x11112222;
	109	int one = 1;
	110
	111	atomic_t v;
	112	int r;
	113
	114	TEST(, add, +=, onestwos);
	115	TEST(, add, +=, -one);
	116	TEST(, sub, -=, onestwos);
	117	TEST(, sub, -=, -one);
	118	TEST(, or, \|=, v1);
	119	TEST(, and, &=, v1);
	120	TEST(, xor, ^=, v1);
	121	TEST(, andnot, &= ~, v1);
978e5a36 BF	122
	123	RETURN_FAMILY_TEST(, add_return, +=, onestwos);
	124	RETURN_FAMILY_TEST(, add_return, +=, -one);
	125	RETURN_FAMILY_TEST(, sub_return, -=, onestwos);
	126	RETURN_FAMILY_TEST(, sub_return, -=, -one);
	127
28aa2bda PZ	128	FETCH_FAMILY_TEST(, fetch_add, +=, onestwos);
	129	FETCH_FAMILY_TEST(, fetch_add, +=, -one);
	130	FETCH_FAMILY_TEST(, fetch_sub, -=, onestwos);
	131	FETCH_FAMILY_TEST(, fetch_sub, -=, -one);
	132
	133	FETCH_FAMILY_TEST(, fetch_or, \|=, v1);
	134	FETCH_FAMILY_TEST(, fetch_and, &=, v1);
	135	FETCH_FAMILY_TEST(, fetch_andnot, &= ~, v1);
	136	FETCH_FAMILY_TEST(, fetch_xor, ^=, v1);
	137
978e5a36 BF	138	INC_RETURN_FAMILY_TEST(, v0);
	139	DEC_RETURN_FAMILY_TEST(, v0);
	140
	141	XCHG_FAMILY_TEST(, v0, v1);
	142	CMPXCHG_FAMILY_TEST(, v0, v1, onestwos);
	143
41b9e9fc PZ	144	}
41b9e9fc PZ	145
86a89380	146	#define INIT(c) do { atomic64_set(&v, c); r = c; } while (0)
41b9e9fc	147	static __init void test_atomic64(void)
86a89380 LB	148	{
	149	long long v0 = 0xaaa31337c001d00dLL;
	150	long long v1 = 0xdeadbeefdeafcafeLL;
	151	long long v2 = 0xfaceabadf00df001LL;
ffba19cc	152	long long v3 = 0x8000000000000000LL;
86a89380 LB	153	long long onestwos = 0x1111111122222222LL;
86a89380 LB	154	long long one = 1LL;
ffba19cc	155	int r_int;
86a89380 LB	156
	157	atomic64_t v = ATOMIC64_INIT(v0);
	158	long long r = v0;
	159	BUG_ON(v.counter != r);
	160
	161	atomic64_set(&v, v1);
	162	r = v1;
	163	BUG_ON(v.counter != r);
	164	BUG_ON(atomic64_read(&v) != r);
	165
41b9e9fc PZ	166	TEST(64, add, +=, onestwos);
	167	TEST(64, add, +=, -one);
	168	TEST(64, sub, -=, onestwos);
	169	TEST(64, sub, -=, -one);
	170	TEST(64, or, \|=, v1);
	171	TEST(64, and, &=, v1);
	172	TEST(64, xor, ^=, v1);
	173	TEST(64, andnot, &= ~, v1);
86a89380	174
978e5a36 BF	175	RETURN_FAMILY_TEST(64, add_return, +=, onestwos);
	176	RETURN_FAMILY_TEST(64, add_return, +=, -one);
	177	RETURN_FAMILY_TEST(64, sub_return, -=, onestwos);
	178	RETURN_FAMILY_TEST(64, sub_return, -=, -one);
86a89380	179
28aa2bda PZ	180	FETCH_FAMILY_TEST(64, fetch_add, +=, onestwos);
	181	FETCH_FAMILY_TEST(64, fetch_add, +=, -one);
	182	FETCH_FAMILY_TEST(64, fetch_sub, -=, onestwos);
	183	FETCH_FAMILY_TEST(64, fetch_sub, -=, -one);
	184
	185	FETCH_FAMILY_TEST(64, fetch_or, \|=, v1);
	186	FETCH_FAMILY_TEST(64, fetch_and, &=, v1);
	187	FETCH_FAMILY_TEST(64, fetch_andnot, &= ~, v1);
	188	FETCH_FAMILY_TEST(64, fetch_xor, ^=, v1);
	189
86a89380 LB	190	INIT(v0);
	191	atomic64_inc(&v);
	192	r += one;
	193	BUG_ON(v.counter != r);
	194
86a89380 LB	195	INIT(v0);
	196	atomic64_dec(&v);
	197	r -= one;
	198	BUG_ON(v.counter != r);
	199
978e5a36 BF	200	INC_RETURN_FAMILY_TEST(64, v0);
978e5a36 BF	201	DEC_RETURN_FAMILY_TEST(64, v0);
86a89380	202
978e5a36 BF	203	XCHG_FAMILY_TEST(64, v0, v1);
978e5a36 BF	204	CMPXCHG_FAMILY_TEST(64, v0, v1, v2);
86a89380 LB	205
86a89380 LB	206	INIT(v0);
9efbcd59	207	BUG_ON(atomic64_add_unless(&v, one, v0));
86a89380 LB	208	BUG_ON(v.counter != r);
	209
	210	INIT(v0);
9efbcd59	211	BUG_ON(!atomic64_add_unless(&v, one, v1));
86a89380 LB	212	r += one;
	213	BUG_ON(v.counter != r);
	214
	215	INIT(onestwos);
	216	BUG_ON(atomic64_dec_if_positive(&v) != (onestwos - 1));
	217	r -= one;
	218	BUG_ON(v.counter != r);
	219
	220	INIT(0);
	221	BUG_ON(atomic64_dec_if_positive(&v) != -one);
	222	BUG_ON(v.counter != r);
	223
	224	INIT(-one);
	225	BUG_ON(atomic64_dec_if_positive(&v) != (-one - one));
	226	BUG_ON(v.counter != r);
	227
	228	INIT(onestwos);
25a304f2	229	BUG_ON(!atomic64_inc_not_zero(&v));
86a89380 LB	230	r += one;
	231	BUG_ON(v.counter != r);
	232
	233	INIT(0);
25a304f2	234	BUG_ON(atomic64_inc_not_zero(&v));
86a89380 LB	235	BUG_ON(v.counter != r);
	236
	237	INIT(-one);
25a304f2	238	BUG_ON(!atomic64_inc_not_zero(&v));
86a89380 LB	239	r += one;
86a89380 LB	240	BUG_ON(v.counter != r);
ffba19cc ME	241
	242	/* Confirm the return value fits in an int, even if the value doesn't */
	243	INIT(v3);
	244	r_int = atomic64_inc_not_zero(&v);
	245	BUG_ON(!r_int);
41b9e9fc PZ	246	}
41b9e9fc PZ	247
55ded955	248	static __init int test_atomics_init(void)
41b9e9fc PZ	249	{
	250	test_atomic();
	251	test_atomic64();
86a89380 LB	252
86a89380 LB	253	#ifdef CONFIG_X86
b3b16d28	254	pr_info("passed for %s platform %s CX8 and %s SSE\n",
a5c9161f	255	#ifdef CONFIG_X86_64
b3b16d28	256	"x86-64",
a5c9161f	257	#elif defined(CONFIG_X86_CMPXCHG64)
b3b16d28	258	"i586+",
86a89380	259	#else
b3b16d28	260	"i386+",
86a89380	261	#endif
a5c9161f PA	262	boot_cpu_has(X86_FEATURE_CX8) ? "with" : "without",
a5c9161f PA	263	boot_cpu_has(X86_FEATURE_XMM) ? "with" : "without");
86a89380	264	#else
b3b16d28	265	pr_info("passed\n");
86a89380 LB	266	#endif
	267
	268	return 0;
	269	}
	270
55ded955 GU	271	static __exit void test_atomics_exit(void) {}
	272
	273	module_init(test_atomics_init);
	274	module_exit(test_atomics_exit);
	275
	276	MODULE_LICENSE("GPL");