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ARM: dts: meson8b: Add more L2 (PL310) cache properties
authorMartin Blumenstingl <martin.blumenstingl@googlemail.com>
Sat, 14 Jan 2023 23:34:55 +0000 (00:34 +0100)
committerNeil Armstrong <neil.armstrong@linaro.org>
Thu, 19 Jan 2023 07:57:14 +0000 (08:57 +0100)
commit46f73c1c037eed8e5fd61cc39c77b0988148b50b
treea099629d3e4e754c68376d10f55e863112d57d23tree | snapshot
parent12cdc236cf83eb55560f52dd378f05d5798452bacommit | diff
ARM: dts: meson8b: Add more L2 (PL310) cache properties

Add more L2 cache properties which are used by the 3.10 vendor kernel
but have not made it upstream yet.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Link: https://lore.kernel.org/r/20230114233455.2005047-3-martin.blumenstingl@googlemail.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
arch/arm/boot/dts/meson8b.dtsi diff | blob | blame | history
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