thirdparty/pciutils.git
3 weeks agolspci: Add PCIe 5.0 data rate (32 GT/s) support master
Gustavo Pimentel [Tue, 4 Jun 2019 16:24:46 +0000 (18:24 +0200)]
lspci: Add PCIe 5.0 data rate (32 GT/s) support

This enables "lspci" to show PCIe 5.0 data rate (32 GT/s) properly
according to the contents in register PCI_EXP_LNKCAP, PCI_EXP_LNKSTA
and PCI_EXP_LNKCTL2.

Signed-off-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
4 months agolspci: Decode all defined fields in the Device Capabilities 2 register
Frederick Lawler [Fri, 22 Feb 2019 05:13:26 +0000 (23:13 -0600)]
lspci: Decode all defined fields in the Device Capabilities 2 register

Decode all defined fields in the Device Capabilities 2 register.

The difference from "lspci -vv" output now looks like this:

-               DevCap2: Completion Timeout: Range ABC, TimeoutDis+, LTR+, OBFF Not Supported ARIFwd+
+               DevCap2: Completion Timeout: Range ABC, TimeoutDis+, NROPrPrP-, LTR+
+                        10BitTagComp-, 10BitTagReq-, OBFF Not Supported, ExtFmt-, EETLPPrefix-
+                        EmergencyPowerReduction Not Supported, EmergencyPowerReductionInit-
+                        FRS-, LN System CLS Not Supported, TPHComp-, ExtTPHComp-, ARIFwd+

Signed-off-by: Frederick Lawler <fred@fredlawl.com>
4 months agoSet PCI_HAVE_64BIT_ADDRESS for NetBSD.
Masanobu SAITOH [Fri, 25 Jan 2019 03:06:06 +0000 (12:06 +0900)]
Set PCI_HAVE_64BIT_ADDRESS for NetBSD.

4 months agolspci: Fix extra newline if L1.2 is not supported.
Vinson Lee [Wed, 2 Jan 2019 19:39:17 +0000 (19:39 +0000)]
lspci: Fix extra newline if L1.2 is not supported.

Fixes: fb17077dc378 ("Cleaned up the previous patch")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
4 months agoFixed memory initialization bug in previous commit
Martin Mares [Wed, 13 Feb 2019 09:01:30 +0000 (10:01 +0100)]
Fixed memory initialization bug in previous commit

5 months agoLibrary: The list of capabilities is ordered properly
Martin Mares [Mon, 31 Dec 2018 14:28:25 +0000 (15:28 +0100)]
Library: The list of capabilities is ordered properly

Ordering of our cached list of capabilities now respects the original
order in the device's configuration space.

5 months ago"Function-Level Reset" device capability is displayed for RCiEP
Martin Mares [Mon, 31 Dec 2018 14:21:36 +0000 (15:21 +0100)]
"Function-Level Reset" device capability is displayed for RCiEP

According to discussion in GitHub PR #8, Root complex integrated
endpoints also support FLR.

5 months agoCosmetic cleanups of the previous commit
Martin Mares [Mon, 31 Dec 2018 14:15:09 +0000 (15:15 +0100)]
Cosmetic cleanups of the previous commit

5 months agolspci: Add support for Secondary PCI Express Extended Capability
Basavaraja M S [Mon, 19 Nov 2018 07:15:08 +0000 (07:15 +0000)]
lspci: Add support for Secondary PCI Express Extended Capability

Signed-off-by: Basavaraja M S <basavam@cadence.com>
5 months agoFix solaris build
Andrew Stormont [Mon, 13 Aug 2018 13:39:16 +0000 (14:39 +0100)]
Fix solaris build

5 months agoREADME.Windows: Replaced broken link to winio
Martin Mares [Mon, 31 Dec 2018 14:07:12 +0000 (15:07 +0100)]
README.Windows: Replaced broken link to winio

New URLs suggested by GitHub PR #20.

7 months agosetpci: Add capability names
Bjorn Helgaas [Tue, 6 Nov 2018 21:52:38 +0000 (15:52 -0600)]
setpci: Add capability names

Add capability names for all the capabilities known to lspci.

Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
7 months agolspci: Decode Multicast Extended Capability
Bjorn Helgaas [Tue, 6 Nov 2018 21:52:31 +0000 (15:52 -0600)]
lspci: Decode Multicast Extended Capability

Decode the Multicast Extended Capability described in PCIe r4.0, sec
7.9.11.

Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
7 months agosetpci: Pluralize 'capability' in error if needed
Daniel Schaefer [Tue, 16 Oct 2018 19:00:33 +0000 (21:00 +0200)]
setpci: Pluralize 'capability' in error if needed

7 months agoCaps: fixed silly bug introduced in d7d9e30534eb55145e7033018ee945b09de6928a
Martin Mares [Mon, 12 Nov 2018 21:22:16 +0000 (22:22 +0100)]
Caps: fixed silly bug introduced in d7d9e30534eb55145e7033018ee945b09de6928a

8 months agoAdd a couple of missing va_end's
Michal Hlavinka [Tue, 16 Oct 2018 16:25:32 +0000 (18:25 +0200)]
Add a couple of missing va_end's

Found by Coverity scan.

8 months agoFix device_class calculatoin for non-root FreeBSD users
Oleksandr Tymoshenko [Sun, 19 Aug 2018 19:48:07 +0000 (12:48 -0700)]
Fix device_class calculatoin for non-root FreeBSD users

libpci uses PCIOCGETCONF for non-privileged access to /dev/pci
and calculates device_class value based on pc_class/pc_subclass
fields expecting the former to be higher 8 bits of the target value.
0f3d0ca73ecedaba180bf4607bb57fb8abe6d405 errorneously swapped
order of class/subclass during calculations.

Signed-off-by: Oleksandr Tymoshenko <gonzo@bluezbox.com>
8 months agolspci: Allow -s with -t to show a subtree
Gera Kazakov [Tue, 18 Sep 2018 23:51:07 +0000 (17:51 -0600)]
lspci: Allow -s with -t to show a subtree

8 months agoCleaned up pci_find_cap_nr()
Martin Mares [Sun, 14 Oct 2018 20:53:52 +0000 (22:53 +0200)]
Cleaned up pci_find_cap_nr()

The cap_number is always set to the total number of capability instances
found, regardless of whether a match was found or not.

8 months agoEnable setpci to target n-th capability of id
Daniel Schaefer [Sun, 14 Oct 2018 20:48:57 +0000 (22:48 +0200)]
Enable setpci to target n-th capability of id

Because a capability can exist multiple times with the same id,
there needs to be a way to target a specific one. Instead of
the current behaviour which always targets the first one.
Now you can optionally add `@number` (e.g `@1`) after the width to
choose which one to target.

8 months agolibpci is now able to find a specific instance of a capability
Daniel Schaefer [Sun, 14 Oct 2018 20:47:53 +0000 (22:47 +0200)]
libpci is now able to find a specific instance of a capability

8 months agoDocs: Prefer https
Martin Mares [Sun, 14 Oct 2018 20:37:31 +0000 (22:37 +0200)]
Docs: Prefer https

Suggested by Milan Kral.

8 months agoupdate-pciids: Download pci.ids over HTTPS
Martin Mares [Sun, 14 Oct 2018 20:36:13 +0000 (22:36 +0200)]
update-pciids: Download pci.ids over HTTPS

8 months agoPrint Root complex related registers on RCEC, too
Masanobu SAITOH [Thu, 4 Oct 2018 08:33:21 +0000 (17:33 +0900)]
Print Root complex related registers on RCEC, too

PCIe spec says root ports and root complex event collectors must implement
root CAP, STAT and CTRL registers, so call cap_express_root() not only for
PCI_EXP_TYPE_ROOT_PORT but also for PCI_EXP_TYPE_ROOT_EC.

10 months agoReleased as 3.6.2 v3.6.2
Martin Mares [Sun, 12 Aug 2018 10:59:26 +0000 (12:59 +0200)]
Released as 3.6.2

10 months agoUpdated pci.ids to today's snapshot
Martin Mares [Sun, 12 Aug 2018 10:57:13 +0000 (12:57 +0200)]
Updated pci.ids to today's snapshot

10 months agoAdded test cases for topology computation
Martin Mares [Sun, 12 Aug 2018 10:47:25 +0000 (12:47 +0200)]
Added test cases for topology computation

Contributed by Matthew Wilcox

10 months agoTopology now works in combination with filters
Martin Mares [Sun, 12 Aug 2018 09:24:06 +0000 (11:24 +0200)]
Topology now works in combination with filters

If bus topology is needed, we scan all devices regardless of filters,
and apply the filters later when showing devices.

Also, we forbid several impossible combinations of options: tree mode
with filters, bus mapping mode with anything requiring topology.

10 months agoTree: Detect bridges properly
Martin Mares [Sun, 12 Aug 2018 09:13:05 +0000 (11:13 +0200)]
Tree: Detect bridges properly

Previously, only PCI_CLASS_BRIDGE_PCI was considered, which excluded
CardBus bridges. We now accept anything of the base class "bridge"
with the proper header type.

Also added a bunch of debugging messages.

10 months agoAdded an option for displaying bus paths
Martin Mares [Fri, 10 Aug 2018 10:28:49 +0000 (12:28 +0200)]
Added an option for displaying bus paths

Originally implemented by Matthew Wilcox as a stand-alone feature.
I modified it to make use of bus topology calculated by ls-tree.c.

10 months agoGeneralized topology computation in ls-tree.c
Martin Mares [Fri, 10 Aug 2018 10:11:39 +0000 (12:11 +0200)]
Generalized topology computation in ls-tree.c

The topology tree is now independent of the plain device list
and it can be traversed in both top-to-bottom and bottom-to-top
directions.

11 months agoReleased as 3.6.1 v3.6.1
Martin Mares [Thu, 12 Jul 2018 12:02:43 +0000 (14:02 +0200)]
Released as 3.6.1

11 months agoSysfs: fixed sysfs_deref_link()
Martin Mares [Thu, 12 Jul 2018 11:59:52 +0000 (13:59 +0200)]
Sysfs: fixed sysfs_deref_link()

The function canonicalize_file_name() is GLIBC-specific, use realpath()
instead, which is available also on MUSL libc.

Also, it leaked memory.

11 months agomaint/release: Perl does not have "." in @INC any longer
Martin Mares [Sat, 30 Jun 2018 21:56:10 +0000 (23:56 +0200)]
maint/release: Perl does not have "." in @INC any longer

11 months agoReleased as 3.6.0 v3.6.0
Martin Mares [Sat, 30 Jun 2018 21:54:30 +0000 (23:54 +0200)]
Released as 3.6.0

11 months agoUpdated pci.ids to today's snapshot
Martin Mares [Sat, 30 Jun 2018 21:42:12 +0000 (23:42 +0200)]
Updated pci.ids to today's snapshot

11 months agoConvert other string properties to the generic mechanism
Martin Mares [Tue, 26 Jun 2018 10:14:18 +0000 (12:14 +0200)]
Convert other string properties to the generic mechanism

This removes the need of explicit memory management and fixes
PCI_FILL_RESCAN.

To keep backward compatibility, I am keeping the raw pointers
in struct pci_dev, but they point inside the pci_property instead
of separately allocated memory.

11 months agoCreated a generic interface for device properties
Martin Mares [Tue, 26 Jun 2018 10:08:37 +0000 (12:08 +0200)]
Created a generic interface for device properties

Introduction of device tree node properties broke library ABI.

I gave up on creating new symbol versions whenever we add a new
device property, so I introduced a generic property interface
with which new string properties can be added while keeping ABI
compatibility.

11 months agoAdd device-tree node path to the verbose output
Oliver O'Halloran [Tue, 15 May 2018 05:39:05 +0000 (15:39 +1000)]
Add device-tree node path to the verbose output

Adds the path of the device-tree node of a PCI device to the lspci -v
output, like so:

0021:00:00.0 PCI bridge: IBM Device 03dc (prog-if 00 [Normal decode])
DT Node: /sys/firmware/devicetree/base/pciex@3fffe41100000/pci@0

This is added as a generic property to struct pci_device and populated
by the sysfs backend. Other platforms may find it useful though.

Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
11 months agopciutils: add tags\TAGS generation
Viktor Prutyanov [Thu, 22 Mar 2018 16:51:37 +0000 (19:51 +0300)]
pciutils: add tags\TAGS generation

This patch adds 'ctags' and 'TAGS' targets to Makefile

Signed-off-by: Viktor Prutyanov <viktor.prutyanov@virtuozzo.com>
12 months agoVPD: Cleanup
Martin Mares [Tue, 19 Jun 2018 09:44:42 +0000 (11:44 +0200)]
VPD: Cleanup

12 months agopciutils: Add decoding of vendor specific VPD fields
return.0 [Mon, 18 Jun 2018 22:00:31 +0000 (17:00 -0500)]
pciutils: Add decoding of vendor specific VPD fields

IBM has defined several VPD fields that are not part of the PCI
spec, but are frequently used on embedded and pluggable pcie
adapters.

Since these fields are "Unknown", they are listed in hex
and less readable.

This patch adds commonly used vendor specific VPD keywords
described in "Table 160. LoPAPR VPD Fields" of the Linux on Power
Architecture Platform Reference (LoPAPR).

Signed-off-by: John Walthour <return.0@me.com>
12 months agolspci: "virtual" resource regions recognized properly
Martin Mares [Sun, 27 May 2018 11:49:55 +0000 (13:49 +0200)]
lspci: "virtual" resource regions recognized properly

We wanted to add a "[virtual]" marker to all resources which are
known to the kernel, but not configured in the hardware. That is,
those where the BAR is all zero.

However, the test was never triggered for I/O regions, since their
BAR is never zero: it always has the region type bit set.

Now, we test only the address part of the BAR.

14 months agolspci: Use spec name for RCRB ((Root Complex Register Block)
Bjorn Helgaas [Thu, 19 Apr 2018 20:16:47 +0000 (15:16 -0500)]
lspci: Use spec name for RCRB ((Root Complex Register Block)

Extended Capability ID 0x000a is the RCRB (Root Complex Register Block)
capability.  Change the #define and the capability label to match the
terminology used in the specs.

Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
14 months agolspci: Print names of capabilities even if we can't decode the rest
Bjorn Helgaas [Thu, 19 Apr 2018 20:16:40 +0000 (15:16 -0500)]
lspci: Print names of capabilities even if we can't decode the rest

We don't have decoders for many new capabilities, so we currently print
just the capability ID, e.g.,

  Capabilities: [220 v1] Extended Capability ID 0x19

Print the names, even if we don't yet know how to decode the contents,
e.g.,

  Capabilities: [220 v1] Secondary PCI Express <?>

The capability IDs are taken from the PCI Code and ID Assignment spec,
r1.10.  The #defines are named to match those in Linux when possible.

Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
14 months agolspci: Decode Null Capability
Bjorn Helgaas [Thu, 19 Apr 2018 20:16:33 +0000 (15:16 -0500)]
lspci: Decode Null Capability

The PCI Code and ID Assignment spec, r1.9, sec 2, defines a "Null
Capability" containing no registers other than the 8-bit Capability ID
(00h) and an 8-bit Next Capability Pointer.

Some devices, e.g., the Intel [8086:2058] implement this Capability.

Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
14 months agolspci: Clarify unknown capability IDs
Bjorn Helgaas [Thu, 19 Apr 2018 20:16:26 +0000 (15:16 -0500)]
lspci: Clarify unknown capability IDs

For capabilities we don't know how to decode, we print the config address,
version, and capability ID:

  Capabilities: [220 v1] #19

This doesn't clearly identify the capability ID ("19"), whether it is a
PCI-compatible Capability ID or an Extended Capability ID (although you can
infer this by whether the address is 2 or 3 digits), or the fact that the
ID is printed in hex, which makes it hard to parse this manually.

Add a label ("Capability ID" or "Extended Capability ID") and print a "0x"
prefix so it's clear the value is in hex:

  Capabilities: [220 v1] Extended Capability ID 0x19

Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
14 months agolspci.man: Removed one remaining reference to the sf.net site
Martin Mares [Tue, 10 Apr 2018 09:38:46 +0000 (11:38 +0200)]
lspci.man: Removed one remaining reference to the sf.net site

15 months agolspci: Avoid "%1$c" style format strings in HT capability
Martin Mares [Sat, 24 Mar 2018 15:34:35 +0000 (16:34 +0100)]
lspci: Avoid "%1$c" style format strings in HT capability

This kind of format strings is not available on some compilers.

Also added a test case for the HT capability.

15 months agoSylixos: README sylixos
GongYuJian [Tue, 20 Mar 2018 03:33:09 +0000 (11:33 +0800)]
Sylixos: README

15 months agoSylixos: Bits of Makefile and configure
GongYuJian [Tue, 20 Mar 2018 04:29:53 +0000 (12:29 +0800)]
Sylixos: Bits of Makefile and configure

15 months agolspci: fix printing DeviceName
Viktor Prutyanov [Tue, 20 Mar 2018 19:20:34 +0000 (22:20 +0300)]
lspci: fix printing DeviceName

In commit ef6c9ec3a45992d9e7ef4716d444252baf2013e1 pci_fill_info() calls were moved
and the label field is filled after its output.
Before this patch lspci never prints 'DeviceName'.

Signed-off-by: Viktor Prutyanov <viktor.prutyanov@virtuozzo.com>
15 months agoSylixos: Trying to simplify probing mechanism
Martin Mares [Sun, 18 Mar 2018 17:53:18 +0000 (18:53 +0100)]
Sylixos: Trying to simplify probing mechanism

15 months agoSylixos: Coding style cleanup
Martin Mares [Sun, 18 Mar 2018 17:47:42 +0000 (18:47 +0100)]
Sylixos: Coding style cleanup

15 months agoSylixos port
Martin Mares [Sun, 18 Mar 2018 17:40:56 +0000 (18:40 +0100)]
Sylixos port

Contributed by YuJian Gong.

15 months agoIntroduced an explicit probe sequence
Martin Mares [Sat, 17 Mar 2018 15:28:15 +0000 (16:28 +0100)]
Introduced an explicit probe sequence

Previously, the probe order was determined by the order of back-ends.
However, new back-ends must be always added at the end of the list
to maintain ABI compatibility, so they were always probed last.

15 months agoAvoid "optarg" as an identifier
Martin Mares [Sat, 17 Mar 2018 11:41:24 +0000 (12:41 +0100)]
Avoid "optarg" as an identifier

On SylixOS, it is defined as a macro.

15 months agoAdjust prototypes of xmalloc(), xrealloc() and xstrdup()
Martin Mares [Sat, 17 Mar 2018 11:39:00 +0000 (12:39 +0100)]
Adjust prototypes of xmalloc(), xrealloc() and xstrdup()

SylixOS defines its own versions of these functions in its standard
library, which collide with ours. However, their prototypes make
more sense, because they follow the prototypes of the non-x versions
in the C standard, so there is no harm in following them.

15 months agolspci: Report if the PCIe link speed/width is full or downgraded github/master origin/master public/master
Martin Mares [Fri, 16 Mar 2018 16:53:42 +0000 (17:53 +0100)]
lspci: Report if the PCIe link speed/width is full or downgraded

Based on an idea by Dmitry Monakhov.

15 months agolspci: Make DevCtl, DevSta, and AER decoding more consistent
Bjorn Helgaas [Wed, 31 Jan 2018 21:19:13 +0000 (15:19 -0600)]
lspci: Make DevCtl, DevSta, and AER decoding more consistent

Change DevCtl error reporting enables so they match the corresponding
DevSta bits:

-  DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
+  DevCtl: CorrErr- NonFatalErr- FatalErr- UnsupReq-

PCIe r4.0, sec 6.2.2, classifies errors as Correctable or Uncorrectable.
Uncorrectable includes both Non-Fatal and Fatal errors.  Decode the DevSta
"Non-Fatal Error Detected" bit as "NonFatalErr", not "UncorrErr":

-  DevSta: CorrErr+ UncorrErr- FatalErr- UnsuppReq+ AuxPwr- TransPend-
+  DevSta: CorrErr+ NonFatalErr- FatalErr- UnsupReq+ AuxPwr- TransPend-

Change the "Unsupported" and "UnsuppReq" labels in DevCtl and DevSta to
match the "UnsupReq" used in AER.

The Correctable error category doesn't include Non-Fatal errors, so change
the AER Correctable Error Status "Advisory Non-Fatal Error Status" from
"NonFatalErr" to "AdvNonFatalErr":

-  CESta:  RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
+  CESta:  RxErr- BadTLP- BadDLLP- Rollover- Timeout- AdvNonFatalErr-

Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
17 months agofbsd-device should compile again
Martin Mares [Thu, 11 Jan 2018 08:39:38 +0000 (09:39 +0100)]
fbsd-device should compile again

17 months agofbsd-device: Hopefully fixed a bug in fbsd_scan() sylixos/master
Martin Mares [Sun, 31 Dec 2017 17:24:15 +0000 (18:24 +0100)]
fbsd-device: Hopefully fixed a bug in fbsd_scan()

The previous version was obviously wrong: as Andriy Gapon pointed
out, we assign twice to t->dev, but never to t->func.

Not tested, though, as I have no FreeBSD system at hand.

17 months agolspci: Decode "VGA 16-bit decode" in bridge control register
Bjorn Helgaas [Fri, 8 Dec 2017 21:24:10 +0000 (15:24 -0600)]
lspci: Decode "VGA 16-bit decode" in bridge control register

Decode the "VGA 16-bit decode" bit in the bridge control register.  This
bit was added in the PCI-to-PCI Bridge Arch Spec, r1.2, sec 3.2.5.18.
Note that the bit is only meaningful if the VGA Enable bit or the VGA
Palette Snoop Enable bit is set.

Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
17 months agopciutils: Add the support for a DOS/DJGPP environment
Rudolf Marek [Fri, 29 Dec 2017 20:58:41 +0000 (21:58 +0100)]
pciutils: Add the support for a DOS/DJGPP environment

Here is bit a blast from the past. The flashrom still supports the DOS/DJGPP environment, which requires
pciutils to be compiled with DJGPP. I originally developed this patch in 2010,
and I respun it for latest pciutils.

* Add DJGPP as an OS target
* Stop if endianess macros are not defined
* Introduce new intel_io_lock/unclock function to synchronize
  I/O operations.

There is a small issue left that "lspci" and "lspci.exe" are created. The ".exe" variants
are not installed and also not cleaned. No idea if you want to fix that or not.

Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Compiled with:

 make ZLIB=no DNS=no HOST=i386-djgpp-djgpp CROSS_COMPILE=i586-pc-msdosdjgpp- \
     PREFIX=/ DESTDIR=$PWD/../libpci-libgetopt  \
     STRIP="--strip-program=i586-pc-msdosdjgpp-strip -s" install install-lib

If you put to C:\share\pci.ids file, the lspci.exe will also display the human readable output.

19 months agoREADME: kernel.org does not speak FTP any longer
Martin Mares [Sun, 19 Nov 2017 10:39:27 +0000 (11:39 +0100)]
README: kernel.org does not speak FTP any longer

19 months agoForgot the ChangeLog for v3.5.6. v3.5.6
Martin Mares [Fri, 17 Nov 2017 13:04:04 +0000 (14:04 +0100)]
Forgot the ChangeLog for v3.5.6.

19 months agoReleased as 3.5.6
Martin Mares [Fri, 17 Nov 2017 13:01:56 +0000 (14:01 +0100)]
Released as 3.5.6

19 months agoUpdated pci.ids to today's snapshot
Martin Mares [Fri, 17 Nov 2017 13:01:11 +0000 (14:01 +0100)]
Updated pci.ids to today's snapshot

19 months agopciutils: change MN VPD keyword to F_TEXT
Martin Mares [Fri, 17 Nov 2017 12:58:23 +0000 (13:58 +0100)]
pciutils: change MN VPD keyword to F_TEXT

The PCI spec defines all keyword data fields as ASCII unless
otherwise noted. The MN keyword is not otherwise noted. To make
the MN field human readable in lspci verbose outputs, this patch
changes the MN keyword definition from F_BINARY to F_TEXT.

Signed-off-by: John Walthour <return.0@me.com>
19 months agofbsd-device: Use PCIOCGETCONF and PCIOCGETBAR when /dev/pci fd is readonly.
Imre Vadász [Fri, 14 Jul 2017 21:05:53 +0000 (23:05 +0200)]
fbsd-device: Use PCIOCGETCONF and PCIOCGETBAR when /dev/pci fd is readonly.

This way we can at least fulfill some of the common requests without root
privileges. This allows various applications (for example the google chrome
webbrowser) to successfully probe the list of PCI devices without needing
read-write access to the /dev/pci device file.

Signed-off-by: Imre Vadász <imrevdsz@gmail.com>
19 months agofbsd-device: Make extended configuration space available.
Imre Vadász [Fri, 14 Jul 2017 21:13:35 +0000 (23:13 +0200)]
fbsd-device: Make extended configuration space available.

Signed-off-by: Imre Vadász <imrevdsz@gmail.com>
19 months agofbsd-device: Fix fbsd-device backend on DragonFly BSD.
Imre Vadász [Fri, 14 Jul 2017 21:12:15 +0000 (23:12 +0200)]
fbsd-device: Fix fbsd-device backend on DragonFly BSD.

DragonFly also supports PCI domains same as FreeBSD.

Signed-off-by: Imre Vadász <imrevdsz@gmail.com>
19 months agoconfigure: use simpler/more portable echo_n
Mike Frysinger [Mon, 20 Jun 2016 04:21:38 +0000 (00:21 -0400)]
configure: use simpler/more portable echo_n

The `echo -n` behavior is not in POSIX and not all shells support it.
Use the portable `printf` func as defined by POSIX.

23 months agoReleased as 3.5.5 v3.5.5
Martin Mares [Wed, 5 Jul 2017 13:21:46 +0000 (15:21 +0200)]
Released as 3.5.5

23 months agoUpdated pci.ids to today's snapshot
Martin Mares [Wed, 5 Jul 2017 13:16:20 +0000 (15:16 +0200)]
Updated pci.ids to today's snapshot

23 months agolspci: Fix wrong read size for RootSta
Jeffy Chen [Fri, 30 Jun 2017 10:09:00 +0000 (18:09 +0800)]
lspci: Fix wrong read size for RootSta

We are reading wrong size(word) for this cap, since:

RootSta has:
PCI_EXP_RTSTA_PME_STATUS  0x00010000 /* PME Status */
PCI_EXP_RTSTA_PME_PENDING 0x00020000 /* PME is Pending */

Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
Reviewed-by: Bjorn Helgaas <bhelgaas@google.com>
2 years agolspci: Fix "Auxiliary" spelling error
Bjorn Helgaas [Fri, 21 Apr 2017 19:32:41 +0000 (14:32 -0500)]
lspci: Fix "Auxiliary" spelling error

Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2 years agolspci: Use #defines for greppability
Bjorn Helgaas [Fri, 21 Apr 2017 19:32:34 +0000 (14:32 -0500)]
lspci: Use #defines for greppability

Use existing #defines when possible so grep/cscope/etc are more useful.  No
functional change intended.

Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2 years agolspci: Decode only supported ASPM exit latencies
Bjorn Helgaas [Fri, 21 Apr 2017 19:32:26 +0000 (14:32 -0500)]
lspci: Decode only supported ASPM exit latencies

Per PCIe spec r3.1, sec 7.8.6, the L0s Exit Latency is only valid when L0s
is supported, and similarly the L1 Exit Latency is only valid when L1 is
supported.

Only decode the L0s and L1 Exit Latencies if they are defined.

For example, on a device that supports L1 but not L0s, the difference in
the "lspci -vv" output looks like this:

-   LnkCap: Port #1, Speed 8GT/s, Width x1, ASPM L1, Exit Latency L0s <1us, L1 <16us
+   LnkCap: Port #1, Speed 8GT/s, Width x1, ASPM L1, Exit Latency L1 <16us

Correct the comments on the PCI_EXP_LNKCAP_L0S and PCI_EXP_LNKCAP_L1
definitions.

Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2 years agolspci: Decode "Slot Implemented" for PCI/PCI-X to PCIe Bridges
Bjorn Helgaas [Fri, 21 Apr 2017 19:32:18 +0000 (14:32 -0500)]
lspci: Decode "Slot Implemented" for PCI/PCI-X to PCIe Bridges

The secondary side of a PCI/PCI-X to PCIe Bridge (a "reverse bridge") is a
PCIe Downstream Port and could support a slot just like Root Ports and
Switch Downstream Ports.

Decode "Slot Implemented" for reverse bridges and, if true, the Slot
Capabilities, Control, and Status registers.

For a reverse bridge with no slot, the difference in the "lspci -vv" output
looks like this:

-    Capabilities: [40] Express (v2) PCI/PCI-X to PCI-Express Bridge, MSI 00
+    Capabilities: [40] Express (v2) PCI/PCI-X to PCI-Express Bridge (Slot-), MSI 00

Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2 years agolspci: Indent PCIe Capability DevCap2 & DevCtl2 correctly
Bjorn Helgaas [Fri, 21 Apr 2017 19:32:09 +0000 (14:32 -0500)]
lspci: Indent PCIe Capability DevCap2 & DevCtl2 correctly

Indent the AtomicOpsCap and AtomicOpsCtl fields to make it clear that these
are part of the DevCap2 and DevCtl2 registers.

The difference in the "lspci -vv" output looks like this:

        DevCap2: Completion Timeout: Range ABC, TimeoutDis+, LTR+, OBFF Not Supported ARIFwd+
-       AtomicOpsCap: Routing- 32bit- 64bit- 128bitCAS-
+                AtomicOpsCap: Routing- 32bit- 64bit- 128bitCAS-
        DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR+, OBFF Disabled ARIFwd-
-       AtomicOpsCtl: ReqEn- EgressBlck-
+                AtomicOpsCtl: ReqEn- EgressBlck-

Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2 years agolspci: Include "ECRC" in the ECRC generate/check labels
Bjorn Helgaas [Fri, 21 Apr 2017 19:32:00 +0000 (14:32 -0500)]
lspci: Include "ECRC" in the ECRC generate/check labels

Include "ECRC" in the ECRC generate/check labels.

The difference in the "lspci -vv" output looks like this:

-       AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
+       AERCap: First Error Pointer: 00, ECRCGenCap- ECRCGenEn- ECRCChkCap- ECRCChkEn-

Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2 years agolspci: Decode AER Root Error Command, Root Error Status, Error Source
Bjorn Helgaas [Fri, 21 Apr 2017 19:31:50 +0000 (14:31 -0500)]
lspci: Decode AER Root Error Command, Root Error Status, Error Source

Decode the AER Root Error Command, Root Error Status, and Error Source
Identification registers.

Per PCIe r3.1, sec 7.10, these registers are only available for Root Ports
and Root Complex Event Collectors, so we have to check the Device/Port Type
from the PCIe capability.

The difference in the "lspci -vv" output looks like this (for a Root Port):

+       RootCmd: CERptEn- NFERptEn- FERptEn-
+       RootSta: CERcvd- MultCERcvd- UERcvd- MultUERcvd-
+                FirstFatal- NonFatalMsg- FatalMsg- IntMsg 0
+       ErrorSrc: ERR_COR: 0000 ERR_FATAL/NONFATAL: 0000

Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2 years agolspci: Dump AER Header Log
Bjorn Helgaas [Fri, 21 Apr 2017 19:31:42 +0000 (14:31 -0500)]
lspci: Dump AER Header Log

Dump the AER Header Log register.  This contains the header for the TLP
corresponding to a detected error.

It's probably beyond the scope of lspci to decode the header itself, but
it's interesting to at least show the data as a hint for human readers.
The difference in the "lspci -vv" output looks like this:

+       HeaderLog: 00000000 00000000 00000000 00000000

Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2 years agolspci: Decode AER Multiple Header and TLP Prefix Log bits
Bjorn Helgaas [Fri, 21 Apr 2017 19:31:33 +0000 (14:31 -0500)]
lspci: Decode AER Multiple Header and TLP Prefix Log bits

Decode the AER Multiple Header Recording and TLP Prefix Log Present bits in
the AER Capabilities and Control register.

The difference in the "lspci -vv" output looks like this:

-       AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
+       AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
+               MultHdrRecCap- MultHdrRecEn- TLPPfxPres- HdrLogCap-

Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2 years agoReleased as 3.5.4 v3.5.4
Martin Mares [Sat, 25 Feb 2017 23:00:20 +0000 (00:00 +0100)]
Released as 3.5.4

2 years agotypes.h: Provide u64 on all systems
Martin Mares [Fri, 24 Feb 2017 20:23:53 +0000 (21:23 +0100)]
types.h: Provide u64 on all systems

Recent changes in lspci.c require u64 to be present regardless
of PCI_HAVE_64BIT_ADDRESS.

2 years agoReleased as 3.5.3 v3.5.3
Martin Mares [Wed, 15 Feb 2017 09:17:55 +0000 (10:17 +0100)]
Released as 3.5.3

2 years agoUpdated pci.ids to today's snapshot
Martin Mares [Wed, 15 Feb 2017 09:16:31 +0000 (10:16 +0100)]
Updated pci.ids to today's snapshot

2 years agols-caps: Minor cleanup of cap_express_dev2()
Martin Mares [Wed, 15 Feb 2017 09:09:50 +0000 (10:09 +0100)]
ls-caps: Minor cleanup of cap_express_dev2()

2 years agopciutils: Add test case for pci atomic ops
Satanand Burla [Fri, 10 Feb 2017 02:31:51 +0000 (18:31 -0800)]
pciutils: Add test case for pci atomic ops

This patch adds test case for atomic ops

Signed-off-by: Satanand Burla <satananda.burla@caviumnetworks.com>
2 years agopciutils: Add decode for Atomic Ops in lspci
Satanand Burla [Tue, 27 Dec 2016 23:52:36 +0000 (15:52 -0800)]
pciutils: Add decode for Atomic Ops in lspci

This adds support for decoding Atomic ops added in ECN
https://pcisig.com/sites/default/files/specification_documents/ECN_Atomic_Ops_080417.pdf

Signed-off-by: Satanand Burla <satananda.burla@caviumnetworks.com>
2 years agolspci: Support GEN4 speed (16GT/s)
Gavin Shan [Tue, 14 Feb 2017 23:53:45 +0000 (10:53 +1100)]
lspci: Support GEN4 speed (16GT/s)

This enables "lspci" to show GEN4 speed (16GT/s) properly according
to the contents in register PCI_EXP_LNKCAP, PCI_EXP_LNKSTA and
PCI_EXP_LNKCTL2.

Reported-by: Carol Soto <clsoto@us.ibm.com>
Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
2 years agolspci: better display of ranges behind a bridge
Martin Mares [Sat, 31 Dec 2016 15:55:23 +0000 (16:55 +0100)]
lspci: better display of ranges behind a bridge

When the range is non-empty, it is always printed together with
its size.

If it is empty, the output depends on the verbosity level chosen:

  - no verbosity: nothing is printed
  - -vvv: full range is printed
  - anything between: "none" is printed

Thanks to Harry Mallon and Bjorn Helgaas for inspiration.

2 years agols-kernel: use libkmod's default to find modules
Vladimír Čunát [Thu, 24 Nov 2016 15:56:09 +0000 (16:56 +0100)]
ls-kernel: use libkmod's default to find modules

2 years agoReleased as 3.5.2 v3.5.2
Martin Mares [Mon, 3 Oct 2016 19:58:48 +0000 (21:58 +0200)]
Released as 3.5.2

2 years agoUpdated pci.ids to today's snapshot
Martin Mares [Mon, 3 Oct 2016 19:56:37 +0000 (21:56 +0200)]
Updated pci.ids to today's snapshot

2 years agoMerge branch 'l1pm'
Martin Mares [Mon, 3 Oct 2016 19:49:11 +0000 (21:49 +0200)]
Merge branch 'l1pm'

2 years agopciutils: Update the tests/cap-l1-pm with actual device data
Rajat Jain [Sat, 1 Oct 2016 00:41:44 +0000 (17:41 -0700)]
pciutils: Update the tests/cap-l1-pm with actual device data

Update the test data using lspci output taken from a card that supports
L1 PM supstates.

Signed-off-by: Rajat Jain <rajatja@google.com>
2 years agosetpci: fix length of SUBSYSTEM_VENDOR_ID
Charles.Rose@dell.com [Mon, 26 Sep 2016 15:00:19 +0000 (15:00 +0000)]
setpci: fix length of SUBSYSTEM_VENDOR_ID

SUBSYSTEM_VENDOR_ID should be 2 bytes, not 4.
Thanks to Christopher Arzola for catching this.

Signed-off-by: Charles Rose <charles_rose@dell.com>