Mingjie Shen [Wed, 18 Jun 2025 21:47:28 +0000 (17:47 -0400)]
Use snprintf instead of sprintf to prevent buffer overruns
In bitops.h, update the TABLE macro to call snprintf(buf, sizeof(buf),
...) rather than unbounded sprintf, ensuring that out-of-range indices
produce a bounded "??%d" string.
In setpci.c, change the device slot formatting from sprintf(slot, ...) to
snprintf(slot, sizeof(slot), ...), capping output to the 16-byte buffer
and avoiding overflow when printing PCI domain, bus, dev, and func
values.
Pali Rohár [Sat, 18 Jan 2025 18:05:50 +0000 (19:05 +0100)]
libpci: win32-kldbg: Implement registration driver from non-native process
It is common that 32-bit application is running on 64-bit host system, or
nowadays also that 64-bit AMD64 application is running on ARM64 system.
For all these cases the win32-kldbg.c code horrible fails with just generic
error message when trying to register kldbgdrv.sys driver.
Add code which detects machine type of running process, machine type of
kldbgdrv.sys driver and machine type of the host system. If machine type of
driver and system machines then allow to register driver. Otherwise print
debug verbose message why it is not possible to use kldbgdrv.sys driver
from kd.exe/windbg.exe binary. This could allow to debug issues via command
lspci -G why win32-kldbg refused to load driver from windbg.exe binary.
At the same time relax checks in win32_check_driver() to not depend on the
constants related to process type as process architecture is not relevant
here. Important is always only driver and native system architecture,
process may be running under WoW64 (e.g. i386 process or AMD64 system).
Pali Rohár [Sat, 18 Jan 2025 17:57:05 +0000 (18:57 +0100)]
libpci: win32-kldbg: Fix calling IOCTL_KLDBG from 32-bit process on 64-bit system
32-bit process on 64-bit system needs to pass all pointers in 64-bit format
for IOCTL_KLDBG call.
So for 32-bit builds (determined by not defined _WIN64 macro) define new
SYSDBG_BUS_DATA64 and KLDBG64 structures with u64 type for pointer members.
Compiler will automatically align all structure members and inserts padding
between members as needed, in the same way as for 64-bit builds. Due to
alignment restrictions, adding just one dummy 32-bit member after each
pointer member does not work.
32-bit code then needs to figure out if the host system is 32-bit or 64-bit
and choose which structure (process native or 64-bit) needs to be passed to
the IOCTL_KLDBG call for successful execution. This is determined by the
win32_is_32bit_on_64bit_system() helper function.
With this change 32-bit i386 lspci.exe binary is working fine on 64-bit
AMD64 system and via win32-kldbg can access PCIe config space if the
AMD64 kldbgdrv.sys driver is registered in the host system.
libpci: win32-cfgmgr32: Improve parsing of driver path
Remove NT prefix "\\??\\" prefix only for drive letters when converting it
to Win32 path. And convert unhandled absolute NT path to Win32 path via
"GLOBALROOT" symlink (which points to NT root path) available in Win32
"\\\\?\\" path. With this change libpci's driver path on windows should be
always valid Win32 path.
Pali Rohár [Thu, 21 Nov 2024 23:36:29 +0000 (00:36 +0100)]
windows: Do not manually load ntdll.dll library
Per Windows Internals, Part 1, Image Loader section, the ntdll.dll library
is always loaded into every process on all NT systems.
So remove code which dynamically loads ntdll.dll library via LoadLibrary()
function and remove also code which changes error reporting mode (used just
for LoadLibrary) as both are not needed.
Also Microsoft C/C++ compilers optimize EXE applications in a way which
expects that the ntdll.dll library is loaded as the first module into the
process before the main EXE module itself.
Pali Rohár [Thu, 21 Nov 2024 22:51:26 +0000 (23:51 +0100)]
windows: Do not cast FARPROC to LPVOID and then to some function pointer
FARPROC is function pointer type intptr_t(__stdcall*)() and LPVOID is data
pointer type void*. Casting from function pointer to data pointer and back
is undefined in C, and moreover in all cases it is not needed. In all cases
it is just needed to cast FARPROC function pointer type to some specific
function pointer type, and casting via intermediate LPVOID was there just
to mute compiler warnings about casting between two incompatible function
pointer types. To mute that compiler warning, do casting via intermediate
generic function pointer type void(*)(void) which is preferred according to
gcc documentation and does not throw any compiler warnings neither by gcc,
nor by msvc compilers.
Changyuan Lyu [Sat, 30 Dec 2023 01:37:28 +0000 (17:37 -0800)]
lspci: add VirtIO SharedMemory capability support
This patch adds the support for VirtIO share memory capability [1].
A shared memory region is defined in a `struct virtio_pci_cap64`
where the highest 32 bits of `offset` and `size` are appened to the
original `struct virtio_pci_cap`.
With this patch, a VirtIO PMEM device (ID 27) shows like the
following:
Intel Vendor specific capabilities are present on following devices:
* Intel Host Bridge / DRAM Controller
* Intel Integrated Graphics Controller
* Intel LPC Controller
Intel Host Bridge / DRAM Controller is on BDF address 00:00.0, so following
command should should parse and show Intel Vendor specific capabilities:
lspci -s 00:00.0 -vv
Currently only Intel Capabilities Version 1 is supported for now. This is
used since second generation of the Intel Core processors (Sandy Bridge).
Pali Rohár [Mon, 8 May 2023 19:25:12 +0000 (21:25 +0200)]
libpci: Add Windows physmem support for PCIe ECAM access
It requires either access to NT Section \Device\PhysicalMemory (or
compatible) or to have available kernel32.dll VxDCall2 function or
w32skrnl.dll DPMI function.
Pali Rohár [Mon, 8 May 2023 19:22:59 +0000 (21:22 +0200)]
libpci: Add DJGPP physmem support for PCIe ECAM access
It requires either Device Mapping support on DPMI host or Physical Address
Mapping support together with support for changing DS descriptor limit to
maximal size 4 GB which enables address wrapping and so access to addresses
below the process base address.
Nikita Proshkin [Mon, 27 May 2024 15:22:55 +0000 (18:22 +0300)]
pcilmr: Fix margining for ports with Lane reversal
Current implementation interacts only with first Negotiated Link Width
lanes even when Maximum Link Width for the port is bigger than that and
Lane reversal is used. Utility in such situation may try to margin lane
which is not used right now and erroneously fail with
'Error during caps reading' message. Fix that behaviour.
Nikita Proshkin [Wed, 22 May 2024 16:06:33 +0000 (19:06 +0300)]
pcilmr: Apply grading quirk for Ice Lake RC ports
Ice Lake RC ports don't support two side independent timing margining,
however the entire margin across the eye is what is reported by one side
margining. Utility already has quirks for Ice Lake RC, so expand them
based on this grading information.
Nikita Proshkin [Wed, 22 May 2024 16:06:31 +0000 (19:06 +0300)]
pcilmr: Add new grading option
Original version of the utility used values from the Table 8-11 of the
PCIe Base Spec Rev 5.0 to evaluate lanes. But it seems that these values
relate only to the margining equipment and are not relevant to evaluating
the quality of connections.
The PCIe Base Spec Rev 5.0 sets the minimum values for the eye in the
section 8.4.2. Change default grading values in the utility according to
this section.
The specification uses the values of the full width and height of the eye,
so add these values to the output of the utility.
In addition, manufacturers can provide criteria for their devices that
differ from the standard ones. Usually this information falls under the
NDA, so add an option to the utility that will allow the user to set
necessary criteria for evaluating the quality of lanes.
Implement the following syntax for the -g(rading) option:
-g 1t=15ps,f | -g 6v=20
Use passed per link receiver criteria for the eye width (timing - t) or
height (voltage - v) in the utility results.
Additional flag f is for situations when port doesn't support two side
independent margining. In such cases by default calculate EW or EH as a
double one side result. User can add f flag for -g option to tell the
utility that the result in one direction is actually the measurement of
the full eye (for example, Ice Lake RC ports work in this way) and it does
not need to be multiplied.
Nikita Proshkin [Wed, 22 May 2024 16:06:30 +0000 (19:06 +0300)]
pcilmr: Move most of pcilmr arguments parsing logic to the separate file
Also change arguments parsing logic: now link parameters (selected lane
numbers, timing or voltage steps, etc) need to be specified after link port
and will affect only this link margining (previously, one option was
applied to all links).
Nikita Proshkin [Wed, 22 May 2024 16:06:29 +0000 (19:06 +0300)]
pcilmr: Ensure that utility can accept either Downstream or Upstream link port
Previously, the utility expected only the Upstream Port to be input and,
in fact, passing the Downstream Port led to strange and buggy error
messages. Improve arguments parsing logic to accept any side of the link.
It seems that the only use case that will not be available now is margining
the internal links of the switch, but this scenario looks as strange as
possible.
Konrad Sztyber [Wed, 22 May 2024 10:16:44 +0000 (12:16 +0200)]
dump: allow 6-digit domains
The SPDK VMD driver assigns domains for the devices behind a VMD by
concatenating bus/device/function of the VMD, each on a separate byte.
For instance, a device behind a VMD with an address of 5d:05.5 would be
assigned domain 5d0505.
Signed-off-by: Konrad Sztyber <konrad.sztyber@intel.com>
PCIe r6.0, sec 7.9.26.4.2 "Link IDE Stream Status Register defines"
the link state as:
0000b Insecure
0010b Secure
The same definition applies to selective streams as well.
The existing code wrongly assumes "secure" is 0001b, fix that for both
link and selective streams.
While at this, add missing "Selective IDE for Configuration Requests Enable".
Also fix the base and limit parsing for the memory and RID ranges.
Fixes: 42fc4263ec0e ("ls-ecaps: Add decode support for IDE Extended Capability") Signed-off-by: Alexey Kardashevskiy <aik@amd.com>
Pali Rohár [Fri, 29 Mar 2024 20:19:27 +0000 (21:19 +0100)]
windows: Do not show unwanted file-not-found GUI message box
Sometimes SEM_FAILCRITICALERRORS flag (disable critical-error-handler GUI
messages) is not enough for LoadLibrary() and SEM_NOOPENFILEERRORBOX flag
(disable file-not-found GUI messages) is needed too to prevent showing GUI
messages on LoadLibrary() failures.
Pali Rohár [Tue, 27 Feb 2024 23:32:08 +0000 (00:32 +0100)]
libpci: ecam: Fix scanning of Extended BIOS Data Area for ACPI RSDP
At physical address 0x40E (part of BDA) is stored indirect 16-bit paragraph
offset to the EBDA, and not the EBDA itself. Fix it.
ACPI code in linux kernel checks if the EBDA offset in BDA is above
physical address 0x400. Do the same check here. It is for detection if EBDA
is present as it does not have to be on the old computers or in some
virtualised environments.
Pali Rohár [Sun, 25 Feb 2024 02:22:08 +0000 (03:22 +0100)]
Makefile: Pass CFLAGS also when linking executable
Optimization flags like -O2 from $(OPT) passed via $(CFLAGS) used during
compiling individual object files are ignored when gcc's LTO is enabled for
the linking final executable.
Optimization flags used for compiling individual object files should be
same as optimization flags for linking final executable.
Fix propagation of $(CFLAGS) and $(OPT) when LTO is enabled.
PCIe r6.1, sec 7.5.3.3 defines "TEE-IO Supported" in the PCI Express Device
Capabilities Register which indicates that the function implements
the TEE-IO functionality as described by the TEE Device Interface Security
Protocol (TDISP, PCIe r6.1, chapter 11).
ls-ecaps: Add decode support for IDE Extended Capability
IDE (Integrity & Data Encryption) Extended Capability defined in [1]
implements control of the PCI link encryption. The verbose level > 2 prints
offsets of the fields to make running setpci easier.
Pali Rohár [Sat, 24 Feb 2024 15:12:26 +0000 (16:12 +0100)]
libpci: Define STATIC_ALIAS for DLL Windows builds
Windows builds for versioned symbols use inline asm .set directive which in
some cases makes x86-64 LTO compiler to drop the referenced value. Define
STATIC_ALIAS macro with VERSIONED_ABI (used) attribute which forces LTO
compiler to not drop the symbol from the final DLL library.
Pali Rohár [Sat, 24 Feb 2024 15:09:35 +0000 (16:09 +0100)]
libpci: win32-cfgmgr32: Do not include resolver for cfgmgr32 function for MinGW-w64
MinGW-w64 toolchain (as opposite to MinGW32) provides all needed cfgmgr32
functions in import library. Use import library and do not resolve
functions at runtime.