]> git.ipfire.org Git - thirdparty/pciutils.git/log
thirdparty/pciutils.git
7 days agoheader.h: Fix type 1 header comment master
Rong Tao [Mon, 23 Jun 2025 08:30:43 +0000 (16:30 +0800)] 
header.h: Fix type 1 header comment

Should be 0x35-0x37 is reserved.

Signed-off-by: Rong Tao <rongtao@cestc.cn>
9 days agoMaint: Another typo in maint/release
Martin Mares [Sat, 21 Jun 2025 16:09:03 +0000 (18:09 +0200)] 
Maint: Another typo in maint/release

9 days agoMaint: Fix typo in maint/release v3.14.0
Martin Mares [Sat, 21 Jun 2025 16:06:20 +0000 (18:06 +0200)] 
Maint: Fix typo in maint/release

9 days agoReleased as v3.14.0
Martin Mares [Sat, 21 Jun 2025 16:05:08 +0000 (18:05 +0200)] 
Released as v3.14.0

9 days agoUpdate pci.ids to the current snapshot
Martin Mares [Sat, 21 Jun 2025 15:55:07 +0000 (17:55 +0200)] 
Update pci.ids to the current snapshot

9 days agolibpci: djgpp: Handle Windows NTVDM zero error codes
Pali [Sat, 21 Jun 2025 15:21:01 +0000 (17:21 +0200)] 
libpci: djgpp: Handle Windows NTVDM zero error codes

Windows NTVDM DPMI host clears the AX register for unsupported DPMI calls.
So handle zero error code as ENOSYS instead of default case EACCES.

9 days agoFix formatting of 64-bit integers
Martin Mares [Sat, 21 Jun 2025 15:19:12 +0000 (17:19 +0200)] 
Fix formatting of 64-bit integers

PCI_U64_FMT_X is needed.

9 days agoUse snprintf instead of sprintf to prevent buffer overruns
Mingjie Shen [Wed, 18 Jun 2025 21:47:28 +0000 (17:47 -0400)] 
Use snprintf instead of sprintf to prevent buffer overruns

In bitops.h, update the TABLE macro to call snprintf(buf, sizeof(buf),
...) rather than unbounded sprintf, ensuring that out-of-range indices
produce a bounded "??%d" string.

In setpci.c, change the device slot formatting from sprintf(slot, ...) to
snprintf(slot, sizeof(slot), ...), capping output to the 16-byte buffer
and avoiding overflow when printing PCI domain, bus, dev, and func
values.

Signed-off-by: Mingjie Shen <shen497@purdue.edu>
9 days agoLMR: <string.h> is required for memset()
Martin Mares [Sat, 21 Jun 2025 15:08:50 +0000 (17:08 +0200)] 
LMR: <string.h> is required for memset()

2 weeks agoTables of strings should have both pointers and the actual strings const
Martin Mares [Sun, 15 Jun 2025 20:52:58 +0000 (22:52 +0200)] 
Tables of strings should have both pointers and the actual strings const

2 weeks agoRemove trailing whitespace
Martin Mares [Sun, 15 Jun 2025 20:50:53 +0000 (22:50 +0200)] 
Remove trailing whitespace

2 weeks agoFlit Mode and Device 3 Capability
Paul Cassidy [Fri, 28 Feb 2025 00:09:01 +0000 (00:09 +0000)] 
Flit Mode and Device 3 Capability

2 weeks agoheader.h: Classes and capabilities from PCI Code and ID Assignment rev 1.18
Martin Mares [Wed, 11 Jun 2025 21:04:09 +0000 (23:04 +0200)] 
header.h: Classes and capabilities from PCI Code and ID Assignment rev 1.18

2 weeks agoPort to RT-Thread Smart DM PCI
GuEe-GUI [Thu, 28 Nov 2024 06:37:12 +0000 (14:37 +0800)] 
Port to RT-Thread Smart DM PCI

Signed-off-by: GuEe-GUI <2991707448@qq.com>
3 weeks agolspci: Add test case for Physical Layer 16 GT/s and 32 GT/s extended capability registers
Tristan Watts-Willis [Mon, 9 Jun 2025 18:40:35 +0000 (11:40 -0700)] 
lspci: Add test case for Physical Layer 16 GT/s and 32 GT/s extended capability registers

3 weeks agoUpdate pci.ids to the current snapshot
Martin Mares [Sun, 8 Jun 2025 16:11:04 +0000 (18:11 +0200)] 
Update pci.ids to the current snapshot

3 weeks agopcilib.man: Update information about win32-kldbg
Pali Rohár [Sat, 18 Jan 2025 18:20:08 +0000 (19:20 +0100)] 
pcilib.man: Update information about win32-kldbg

3 weeks agolibpci: win32-kldbg: Implement registration driver from non-native process
Pali Rohár [Sat, 18 Jan 2025 18:05:50 +0000 (19:05 +0100)] 
libpci: win32-kldbg: Implement registration driver from non-native process

It is common that 32-bit application is running on 64-bit host system, or
nowadays also that 64-bit AMD64 application is running on ARM64 system.

For all these cases the win32-kldbg.c code horrible fails with just generic
error message when trying to register kldbgdrv.sys driver.

Add code which detects machine type of running process, machine type of
kldbgdrv.sys driver and machine type of the host system. If machine type of
driver and system machines then allow to register driver. Otherwise print
debug verbose message why it is not possible to use kldbgdrv.sys driver
from kd.exe/windbg.exe binary. This could allow to debug issues via command
lspci -G why win32-kldbg refused to load driver from windbg.exe binary.

At the same time relax checks in win32_check_driver() to not depend on the
constants related to process type as process architecture is not relevant
here. Important is always only driver and native system architecture,
process may be running under WoW64 (e.g. i386 process or AMD64 system).

3 weeks agolibpci: win32-kldbg: Fix calling IOCTL_KLDBG from 32-bit process on 64-bit system
Pali Rohár [Sat, 18 Jan 2025 17:57:05 +0000 (18:57 +0100)] 
libpci: win32-kldbg: Fix calling IOCTL_KLDBG from 32-bit process on 64-bit system

32-bit process on 64-bit system needs to pass all pointers in 64-bit format
for IOCTL_KLDBG call.

So for 32-bit builds (determined by not defined _WIN64 macro) define new
SYSDBG_BUS_DATA64 and KLDBG64 structures with u64 type for pointer members.
Compiler will automatically align all structure members and inserts padding
between members as needed, in the same way as for 64-bit builds. Due to
alignment restrictions, adding just one dummy 32-bit member after each
pointer member does not work.

32-bit code then needs to figure out if the host system is 32-bit or 64-bit
and choose which structure (process native or 64-bit) needs to be passed to
the IOCTL_KLDBG call for successful execution. This is determined by the
win32_is_32bit_on_64bit_system() helper function.

With this change 32-bit i386 lspci.exe binary is working fine on 64-bit
AMD64 system and via win32-kldbg can access PCIe config space if the
AMD64 kldbgdrv.sys driver is registered in the host system.

3 weeks agolibpci: win32-cfgmgr32: Improve parsing of driver path
Pali Rohár [Fri, 20 Sep 2024 21:10:42 +0000 (23:10 +0200)] 
libpci: win32-cfgmgr32: Improve parsing of driver path

Remove NT prefix "\\??\\" prefix only for drive letters when converting it
to Win32 path. And convert unhandled absolute NT path to Win32 path via
"GLOBALROOT" symlink (which points to NT root path) available in Win32
"\\\\?\\" path. With this change libpci's driver path on windows should be
always valid Win32 path.

3 weeks agolibpci: win32-cfgmgr32: Define error messages for all CR_* error constants
Pali Rohár [Fri, 5 Apr 2024 17:16:55 +0000 (19:16 +0200)] 
libpci: win32-cfgmgr32: Define error messages for all CR_* error constants

3 weeks agowindows: Fix declaration of GetSystemFirmwareTable function pointer
Pali Rohár [Sat, 18 Jan 2025 17:37:13 +0000 (18:37 +0100)] 
windows: Fix declaration of GetSystemFirmwareTable function pointer

Function pointer attributes have to be specified on the left side of the *.

3 weeks agowindows: Update comment about RtlNtStatusToDosError() side effect
Pali Rohár [Sat, 11 Jan 2025 13:10:37 +0000 (14:10 +0100)] 
windows: Update comment about RtlNtStatusToDosError() side effect

3 weeks agowindows: Check for SizeOfOptionalHeader before dereferencing OptionalHeader
Pali Rohár [Wed, 4 Dec 2024 17:20:18 +0000 (18:20 +0100)] 
windows: Check for SizeOfOptionalHeader before dereferencing OptionalHeader

offsetof(IMAGE_OPTIONAL_HEADER, DataDirectory) is the minimal size of
variable length OptionalHeader (IMAGE_OPTIONAL_HEADER) structure.

3 weeks agowindows: Improve win32_change_error_mode()
Pali Rohár [Thu, 21 Nov 2024 23:24:51 +0000 (00:24 +0100)] 
windows: Improve win32_change_error_mode()

Attempt to do two other thread safe methods before doing fallback to thread
unsafe SetErrorMode() method.

3 weeks agowindows: Do not manually load ntdll.dll library
Pali Rohár [Thu, 21 Nov 2024 23:36:29 +0000 (00:36 +0100)] 
windows: Do not manually load ntdll.dll library

Per Windows Internals, Part 1, Image Loader section, the ntdll.dll library
is always loaded into every process on all NT systems.

So remove code which dynamically loads ntdll.dll library via LoadLibrary()
function and remove also code which changes error reporting mode (used just
for LoadLibrary) as both are not needed.

Also Microsoft C/C++ compilers optimize EXE applications in a way which
expects that the ntdll.dll library is loaded as the first module into the
process before the main EXE module itself.

3 weeks agowindows: Do not cast FARPROC to LPVOID and then to some function pointer
Pali Rohár [Thu, 21 Nov 2024 22:51:26 +0000 (23:51 +0100)] 
windows: Do not cast FARPROC to LPVOID and then to some function pointer

FARPROC is function pointer type intptr_t(__stdcall*)() and LPVOID is data
pointer type void*. Casting from function pointer to data pointer and back
is undefined in C, and moreover in all cases it is not needed. In all cases
it is just needed to cast FARPROC function pointer type to some specific
function pointer type, and casting via intermediate LPVOID was there just
to mute compiler warnings about casting between two incompatible function
pointer types. To mute that compiler warning, do casting via intermediate
generic function pointer type void(*)(void) which is preferred according to
gcc documentation and does not throw any compiler warnings neither by gcc,
nor by msvc compilers.

3 weeks agolibpci: add some missing PCI_CLASS constants
Ronan Pigott [Fri, 9 May 2025 05:57:43 +0000 (22:57 -0700)] 
libpci: add some missing PCI_CLASS constants

The names and values are taken from the pci.ids file.

3 weeks agoAllow pci.h to be included from C++
Martin Mares [Sun, 8 Jun 2025 14:58:09 +0000 (16:58 +0200)] 
Allow pci.h to be included from C++

3 weeks agoAdd CXL DVSEC GPF time_scale 10s support
yeeli [Fri, 7 Feb 2025 06:37:12 +0000 (14:37 +0800)] 
Add CXL DVSEC GPF time_scale 10s support

Ref CXL Spec chapter 8.1.6 and 8.1.7, Add time_scale 10s support.

When time_scale is 7h

Old code shows:
GPF Phase 1 Timeout: 20<?>

New code shows
GPF Phase 1 Timeout: 20s

The changes do not affect Reserved time scale encoding shows <?>.

Signed-off-by: yeeli <seven.yi.lee@gmail.com>
3 weeks agolspci: Decode Physical Layer 64 GT/s extended capability register
Tristan Watts-Willis [Thu, 6 Feb 2025 01:38:51 +0000 (17:38 -0800)] 
lspci: Decode Physical Layer 64 GT/s extended capability register

3 weeks agolspci: Decode Physical Layer 16 GT/s and 32 GT/s extended capability registers
Tristan Watts-Willis [Thu, 6 Feb 2025 01:20:27 +0000 (17:20 -0800)] 
lspci: Decode Physical Layer 16 GT/s and 32 GT/s extended capability registers

7 months agoExtend the GNU/Hurd back-end to work on 64-bit systems
Samuel Thibault [Mon, 25 Nov 2024 12:54:11 +0000 (13:54 +0100)] 
Extend the GNU/Hurd back-end to work on 64-bit systems

11 months agolspci: add VirtIO SharedMemory capability support
Changyuan Lyu [Sat, 30 Dec 2023 01:37:28 +0000 (17:37 -0800)] 
lspci: add VirtIO SharedMemory capability support

This patch adds the support for VirtIO share memory capability [1].
A shared memory region is defined in a `struct virtio_pci_cap64`
where the highest 32 bits of `offset` and `size` are appened to the
original `struct virtio_pci_cap`.

With this patch, a VirtIO PMEM device (ID 27) shows like the
following:

```
00:02.0 Class ffff: Device 1af4:105b (rev 01)
        Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+
        Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
        Latency: 0
        Region 0: Memory at 100001000 (64-bit, non-prefetchable) [size=4K]
        Region 2: Memory at 101000000 (64-bit, non-prefetchable) [size=16M]
        Capabilities: [40] Vendor Specific Information: VirtIO: CommonCfg
                BAR=0 offset=00000000 size=0000003c
        Capabilities: [50] Vendor Specific Information: VirtIO: ISR
                BAR=0 offset=0000003c size=00000001
        Capabilities: [60] Vendor Specific Information: VirtIO: Notify
                BAR=0 offset=00000040 size=00000002 multiplier=00000002
        Capabilities: [78] MSI-X: Enable+ Count=2 Masked-
                Vector table: BAR=0 offset=00000058
                PBA: BAR=0 offset=00000078
        Capabilities: [88] Vendor Specific Information: VirtIO: DeviceCfg
                BAR=0 offset=00000044 size=00000010
        Capabilities: [98] Vendor Specific Information: VirtIO: SharedMemory
                BAR=2 offset=0000000000000000 size=0000000001000000 id=0
        Kernel driver in use: virtio-pci
```

[1] Sec 4.1.4.7 https://docs.oasis-open.org/virtio/virtio/v1.2/csd01/virtio-v1.2-csd01.html#x1-1240004

Signed-off-by: Changyuan Lyu <changyuan.lv@gmail.com>
11 months agoECAM: Fix memory leak
Martin Mares [Fri, 5 Jul 2024 18:06:25 +0000 (20:06 +0200)] 
ECAM: Fix memory leak

11 months agoECAM: Spell "ACPI" in capitals in debug messages
Martin Mares [Fri, 5 Jul 2024 18:03:35 +0000 (20:03 +0200)] 
ECAM: Spell "ACPI" in capitals in debug messages

11 months agolspci: Parse Intel Vendor specific capabilities
Pali Rohár [Fri, 5 Jul 2024 09:40:06 +0000 (11:40 +0200)] 
lspci: Parse Intel Vendor specific capabilities

Intel Vendor specific capabilities are present on following devices:
* Intel Host Bridge / DRAM Controller
* Intel Integrated Graphics Controller
* Intel LPC Controller

Intel Host Bridge / DRAM Controller is on BDF address 00:00.0, so following
command should should parse and show Intel Vendor specific capabilities:

  lspci -s 00:00.0 -vv

Currently only Intel Capabilities Version 1 is supported for now. This is
used since second generation of the Intel Core processors (Sandy Bridge).

12 months agolibpci: Update manpage documentation for devmem.path
Pali Rohár [Sun, 18 Feb 2024 14:26:00 +0000 (15:26 +0100)] 
libpci: Update manpage documentation for devmem.path

12 months agolibpci: Document physmem API
Pali Rohár [Sat, 17 Feb 2024 15:30:30 +0000 (16:30 +0100)] 
libpci: Document physmem API

12 months agolibpci: Add Windows physmem support for PCIe ECAM access
Pali Rohár [Mon, 8 May 2023 19:25:12 +0000 (21:25 +0200)] 
libpci: Add Windows physmem support for PCIe ECAM access

It requires either access to NT Section \Device\PhysicalMemory (or
compatible) or to have available kernel32.dll VxDCall2 function or
w32skrnl.dll DPMI function.

12 months agolibpci: Add DJGPP physmem support for PCIe ECAM access
Pali Rohár [Mon, 8 May 2023 19:22:59 +0000 (21:22 +0200)] 
libpci: Add DJGPP physmem support for PCIe ECAM access

It requires either Device Mapping support on DPMI host or Physical Address
Mapping support together with support for changing DS descriptor limit to
maximal size 4 GB which enables address wrapping and so access to addresses
below the process base address.

12 months agoMaintainer scripts: Create GitHub releases
Martin Mares [Sat, 8 Jun 2024 18:46:00 +0000 (20:46 +0200)] 
Maintainer scripts: Create GitHub releases

13 months agoReleased as v3.13.0 v3.13.0
Martin Mares [Thu, 30 May 2024 15:58:10 +0000 (17:58 +0200)] 
Released as v3.13.0

13 months agoUpdated pci.ids
Martin Mares [Thu, 30 May 2024 15:54:02 +0000 (17:54 +0200)] 
Updated pci.ids

13 months agoABI version bump for pci_fill_info()
Martin Mares [Thu, 30 May 2024 15:52:26 +0000 (17:52 +0200)] 
ABI version bump for pci_fill_info()

We have new flags and new fields in struct pci_dev.

13 months agoChangeLog was missing a 3.12 release
Martin Mares [Thu, 30 May 2024 15:46:57 +0000 (17:46 +0200)] 
ChangeLog was missing a 3.12 release

13 months agoRCD: Cleanup
Martin Mares [Thu, 30 May 2024 15:46:01 +0000 (17:46 +0200)] 
RCD: Cleanup

13 months agoAdd display function for cxl1.1 device link status information. (#183)
Kobayashi Daisuke [Thu, 30 May 2024 15:41:28 +0000 (00:41 +0900)] 
Add display function for cxl1.1 device link status information. (#183)

* Add display function for cxl1.1 device link status information.

* Modifications according to comments. Adding a description, Fix odd indent, and remove unnecessary statement.

13 months agopcilmr: Fix margining for ports with Lane reversal
Nikita Proshkin [Mon, 27 May 2024 15:22:55 +0000 (18:22 +0300)] 
pcilmr: Fix margining for ports with Lane reversal

Current implementation interacts only with first Negotiated Link Width
lanes even when Maximum Link Width for the port is bigger than that and
Lane reversal is used. Utility in such situation may try to margin lane
which is not used right now and erroneously fail with
'Error during caps reading' message. Fix that behaviour.

Signed-off-by: Nikita Proshkin <n.proshkin@yadro.com>
13 months agopcilmr.man: Fix whitespace errors
Martin Mares [Mon, 27 May 2024 12:36:34 +0000 (14:36 +0200)] 
pcilmr.man: Fix whitespace errors

13 months agopcilmr: Update usage and man: new arguments format and grading
Nikita Proshkin [Wed, 22 May 2024 16:06:34 +0000 (19:06 +0300)] 
pcilmr: Update usage and man: new arguments format and grading

Signed-off-by: Nikita Proshkin <n.proshkin@yadro.com>
13 months agopcilmr: Apply grading quirk for Ice Lake RC ports
Nikita Proshkin [Wed, 22 May 2024 16:06:33 +0000 (19:06 +0300)] 
pcilmr: Apply grading quirk for Ice Lake RC ports

Ice Lake RC ports don't support two side independent timing margining,
however the entire margin across the eye is what is reported by one side
margining. Utility already has quirks for Ice Lake RC, so expand them
based on this grading information.

Signed-off-by: Nikita Proshkin <n.proshkin@yadro.com>
13 months agopcilmr: Add option to configure margining dwell time
Nikita Proshkin [Wed, 22 May 2024 16:06:32 +0000 (19:06 +0300)] 
pcilmr: Add option to configure margining dwell time

Signed-off-by: Nikita Proshkin <n.proshkin@yadro.com>
13 months agopcilmr: Add new grading option
Nikita Proshkin [Wed, 22 May 2024 16:06:31 +0000 (19:06 +0300)] 
pcilmr: Add new grading option

Original version of the utility used values from the Table 8-11 of the
PCIe Base Spec Rev 5.0 to evaluate lanes. But it seems that these values
relate only to the margining equipment and are not relevant to evaluating
the quality of connections.

The PCIe Base Spec Rev 5.0 sets the minimum values for the eye in the
section 8.4.2. Change default grading values in the utility according to
this section.

The specification uses the values of the full width and height of the eye,
so add these values to the output of the utility.

In addition, manufacturers can provide criteria for their devices that
differ from the standard ones. Usually this information falls under the
NDA, so add an option to the utility that will allow the user to set
necessary criteria for evaluating the quality of lanes.

Implement the following syntax for the -g(rading) option:
-g 1t=15ps,f | -g 6v=20

Use passed per link receiver criteria for the eye width (timing - t) or
height (voltage - v) in the utility results.

Additional flag f is for situations when port doesn't support two side
independent margining. In such cases by default calculate EW or EH as a
double one side result. User can add f flag for -g option to tell the
utility that the result in one direction is actually the measurement of
the full eye (for example, Ice Lake RC ports work in this way) and it does
not need to be multiplied.

Signed-off-by: Nikita Proshkin <n.proshkin@yadro.com>
13 months agopcilmr: Move most of pcilmr arguments parsing logic to the separate file
Nikita Proshkin [Wed, 22 May 2024 16:06:30 +0000 (19:06 +0300)] 
pcilmr: Move most of pcilmr arguments parsing logic to the separate file

Also change arguments parsing logic: now link parameters (selected lane
numbers, timing or voltage steps, etc) need to be specified after link port
and will affect only this link margining (previously, one option was
applied to all links).

See updated man for syntax and example.

Signed-off-by: Nikita Proshkin <n.proshkin@yadro.com>
13 months agopcilmr: Ensure that utility can accept either Downstream or Upstream link port
Nikita Proshkin [Wed, 22 May 2024 16:06:29 +0000 (19:06 +0300)] 
pcilmr: Ensure that utility can accept either Downstream or Upstream link port

Previously, the utility expected only the Upstream Port to be input and,
in fact, passing the Downstream Port led to strange and buggy error
messages. Improve arguments parsing logic to accept any side of the link.

It seems that the only use case that will not be available now is margining
the internal links of the switch, but this scenario looks as strange as
possible.

Signed-off-by: Nikita Proshkin <n.proshkin@yadro.com>
13 months agosysfs: Include <libgen.h> for basename()
Martin Mares [Mon, 27 May 2024 12:21:29 +0000 (14:21 +0200)] 
sysfs: Include <libgen.h> for basename()

Otherwise, it fails to build with musl libc.

13 months agodump: allow 6-digit domains
Konrad Sztyber [Wed, 22 May 2024 10:16:44 +0000 (12:16 +0200)] 
dump: allow 6-digit domains

The SPDK VMD driver assigns domains for the devices behind a VMD by
concatenating bus/device/function of the VMD, each on a separate byte.
For instance, a device behind a VMD with an address of 5d:05.5 would be
assigned domain 5d0505.

Signed-off-by: Konrad Sztyber <konrad.sztyber@intel.com>
14 months agols-ecaps: extend decode support for more fields for AER CE and UE status
Shuai Xue [Fri, 26 Apr 2024 08:38:25 +0000 (16:38 +0800)] 
ls-ecaps: extend decode support for more fields for AER CE and UE status

Extend decode support for more fields for AER CE and UE status prior to
PCIe r6.0.

Signed-off-by: Shuai Xue <xueshuai@linux.alibaba.com>
14 months agols-ecaps: Correct the link state reporting
Alexey Kardashevskiy [Wed, 24 Apr 2024 10:20:11 +0000 (20:20 +1000)] 
ls-ecaps: Correct the link state reporting

PCIe r6.0, sec 7.9.26.4.2 "Link IDE Stream Status Register defines"
the link state as:

0000b Insecure
0010b Secure

The same definition applies to selective streams as well.
The existing code wrongly assumes "secure" is 0001b, fix that for both
link and selective streams.

While at this, add missing "Selective IDE for Configuration Requests Enable".
Also fix the base and limit parsing for the memory and RID ranges.

Fixes: 42fc4263ec0e ("ls-ecaps: Add decode support for IDE Extended Capability")
Signed-off-by: Alexey Kardashevskiy <aik@amd.com>
14 months agomaint/README: Use release-prog
Martin Mares [Fri, 5 Apr 2024 21:38:16 +0000 (23:38 +0200)] 
maint/README: Use release-prog

14 months agomaint/README: git push --tags is done by push-to-public
Martin Mares [Fri, 5 Apr 2024 21:36:11 +0000 (23:36 +0200)] 
maint/README: git push --tags is done by push-to-public

14 months agoReleased as v3.12.0 v3.12.0
Martin Mares [Fri, 5 Apr 2024 21:31:56 +0000 (23:31 +0200)] 
Released as v3.12.0

14 months agoUpdate pci.ids to today's snapshot
Martin Mares [Fri, 5 Apr 2024 21:29:11 +0000 (23:29 +0200)] 
Update pci.ids to today's snapshot

14 months agoREADME.Windows: Fix typo
Martin Mares [Fri, 5 Apr 2024 20:51:49 +0000 (22:51 +0200)] 
README.Windows: Fix typo

14 months agoREADME: Copy win32-kldbg info from manpage
Pali Rohár [Fri, 5 Apr 2024 16:36:14 +0000 (18:36 +0200)] 
README: Copy win32-kldbg info from manpage

14 months agolibpci: hwdb: Remove ID_SUBSYSTEM and ID_GEN_SUBSYSTEM usage from pci_id_hwdb_lookup()
Pali Rohár [Sat, 30 Mar 2024 10:06:25 +0000 (11:06 +0100)] 
libpci: hwdb: Remove ID_SUBSYSTEM and ID_GEN_SUBSYSTEM usage from pci_id_hwdb_lookup()

Currently used udev hwdb key "ID_MODEL_FROM_DATABASE" does not return
subsystem, but returns device name.

There is no udev hwdb key which returns subsystem or generic subsystem.
So remove ID_SUBSYSTEM and ID_GEN_SUBSYSTEM from pci_id_hwdb_lookup().

This change fixes issue that pci_id_hwdb_lookup() as subsystem name always
returned device name.

14 months agowindows: Do not show unwanted file-not-found GUI message box
Pali Rohár [Fri, 29 Mar 2024 20:19:27 +0000 (21:19 +0100)] 
windows: Do not show unwanted file-not-found GUI message box

Sometimes SEM_FAILCRITICALERRORS flag (disable critical-error-handler GUI
messages) is not enough for LoadLibrary() and SEM_NOOPENFILEERRORBOX flag
(disable file-not-found GUI messages) is needed too to prevent showing GUI
messages on LoadLibrary() failures.

14 months agowindows: Correctly propagate error code from win32_call_func_with_tcb_privilege()
Pali Rohár [Wed, 28 Feb 2024 00:06:38 +0000 (01:06 +0100)] 
windows: Correctly propagate error code from win32_call_func_with_tcb_privilege()

Cleanup phase may change error code as it calls other WinAPI functions.

14 months agolibpci: ecam: Fix scanning of Extended BIOS Data Area for ACPI RSDP
Pali Rohár [Tue, 27 Feb 2024 23:32:08 +0000 (00:32 +0100)] 
libpci: ecam: Fix scanning of Extended BIOS Data Area for ACPI RSDP

At physical address 0x40E (part of BDA) is stored indirect 16-bit paragraph
offset to the EBDA, and not the EBDA itself. Fix it.

ACPI code in linux kernel checks if the EBDA offset in BDA is above
physical address 0x400. Do the same check here. It is for detection if EBDA
is present as it does not have to be on the old computers or in some
virtualised environments.

14 months agoMakefile: Pass CFLAGS also when linking executable
Pali Rohár [Sun, 25 Feb 2024 02:22:08 +0000 (03:22 +0100)] 
Makefile: Pass CFLAGS also when linking executable

Optimization flags like -O2 from $(OPT) passed via $(CFLAGS) used during
compiling individual object files are ignored when gcc's LTO is enabled for
the linking final executable.

Optimization flags used for compiling individual object files should be
same as optimization flags for linking final executable.

Fix propagation of $(CFLAGS) and $(OPT) when LTO is enabled.

15 months agomaint/push-to-public: git push --tags requires branches
Martin Mares [Fri, 29 Mar 2024 22:25:43 +0000 (23:25 +0100)] 
maint/push-to-public: git push --tags requires branches

15 months agopci.h: Document PCI_FILL_xxx flags
Martin Mares [Fri, 29 Mar 2024 22:10:49 +0000 (23:10 +0100)] 
pci.h: Document PCI_FILL_xxx flags

15 months agoUse C99 named initializers for struct pci_methods
Martin Mares [Fri, 29 Mar 2024 21:47:48 +0000 (22:47 +0100)] 
Use C99 named initializers for struct pci_methods

15 months agoMerge remote-tracking branch 'github/master'
Martin Mares [Wed, 13 Mar 2024 17:55:25 +0000 (18:55 +0100)] 
Merge remote-tracking branch 'github/master'

15 months agoMerge pull request #178 from OscarL/haiku-fix-build-with-dns
Martin Mareš [Wed, 13 Mar 2024 17:55:15 +0000 (18:55 +0100)] 
Merge pull request #178 from OscarL/haiku-fix-build-with-dns

Haiku: fix build with DNS=yes.

15 months agoMerge pull request #177 from OscarL/cache-loc-on-man-pages
Martin Mareš [Wed, 13 Mar 2024 17:54:24 +0000 (18:54 +0100)] 
Merge pull request #177 from OscarL/cache-loc-on-man-pages

lspci.man: update the path used to store the cached files.

15 months agoHaiku: fix build with DNS=yes.
Oscar Lesta [Wed, 13 Mar 2024 06:26:13 +0000 (03:26 -0300)] 
Haiku: fix build with DNS=yes.

15 months agolspci.man: update the path used to store the cached files.
Oscar Lesta [Wed, 13 Mar 2024 05:56:34 +0000 (02:56 -0300)] 
lspci.man: update the path used to store the cached files.

15 months agosysfs: Avoid close() potentially clobbering errno
Martin Mares [Tue, 12 Mar 2024 19:47:28 +0000 (20:47 +0100)] 
sysfs: Avoid close() potentially clobbering errno

15 months agoMerge remote-tracking branch 'github/master'
Martin Mares [Tue, 12 Mar 2024 11:22:48 +0000 (12:22 +0100)] 
Merge remote-tracking branch 'github/master'

15 months agoMerge pull request #176 from OscarL/haiku-build-fix
Martin Mareš [Tue, 12 Mar 2024 11:22:35 +0000 (12:22 +0100)] 
Merge pull request #176 from OscarL/haiku-build-fix

Build fix on Haiku.

15 months agoBuild fix on Haiku.
Zoltán Mizsei [Sun, 1 Jul 2018 16:42:31 +0000 (18:42 +0200)] 
Build fix on Haiku.

16 months agomaint/push-to-public: Push including tags
Martin Mares [Mon, 26 Feb 2024 20:16:23 +0000 (21:16 +0100)] 
maint/push-to-public: Push including tags

16 months agolspci: Add TEE-IO extended capability bit
Alexey Kardashevskiy [Mon, 26 Feb 2024 06:01:35 +0000 (17:01 +1100)] 
lspci: Add TEE-IO extended capability bit

PCIe r6.1, sec 7.5.3.3 defines "TEE-IO Supported" in the PCI Express Device
Capabilities Register which indicates that the function implements
the TEE-IO functionality as described by the TEE Device Interface Security
Protocol (TDISP, PCIe r6.1, chapter 11).

tests/cap-ide is an example of such device.

Signed-off-by: Alexey Kardashevskiy <aik@amd.com>
16 months agols-ecaps: Add decode support for IDE Extended Capability
Alexey Kardashevskiy [Mon, 26 Feb 2024 06:01:34 +0000 (17:01 +1100)] 
ls-ecaps: Add decode support for IDE Extended Capability

IDE (Integrity & Data Encryption) Extended Capability defined in [1]
implements control of the PCI link encryption. The verbose level > 2 prints
offsets of the fields to make running setpci easier.

The example output is:

Capabilities: [830 v1] Integrity & Data Encryption
IDECap: Lnk=0 Sel=1 FlowThru- PartHdr- Aggr- PCPC- IDE_KM+ Alg='AES-GCM-256-96b' TCs=8 TeeLim+
IDECtl: FTEn-
SelectiveIDE#0 Cap: RID#=1
SelectiveIDE#0 Ctl: En- NPR- PR- CPL- PCRC- HdrEnc=no Alg='AES-GCM-256-96b' TC0 ID0
SelectiveIDE#0 Sta: insecure RecvChkFail-
SelectiveIDE#0 RID: Valid- Base=0 Limit=0 SegBase=0
SelectiveIDE#0 RID#0: Valid- Base=0 Limit=0

[1] PCIe r6.0.1, sections 6.33, 7.9.26

Signed-off-by: Alexey Kardashevskiy <aik@amd.com>
16 months agomaint/README: Mention maint/push-to-public
Martin Mares [Sat, 24 Feb 2024 23:12:16 +0000 (00:12 +0100)] 
maint/README: Mention maint/push-to-public

16 months agoReleasing as v3.11.1. v3.11.1
Martin Mares [Sat, 24 Feb 2024 23:11:10 +0000 (00:11 +0100)] 
Releasing as v3.11.1.

16 months agoREADME: Update information about Windows support
Pali Rohár [Sat, 24 Feb 2024 22:57:35 +0000 (23:57 +0100)] 
README: Update information about Windows support

16 months agolib/init.c: Fixed a typo causing compilation on Windows to fail
Martin Mares [Sat, 24 Feb 2024 22:38:10 +0000 (23:38 +0100)] 
lib/init.c: Fixed a typo causing compilation on Windows to fail

The typo was introduced by merging the AmigaOS back-end.

16 months agoReleased as v3.11.0 v3.11.0
Martin Mares [Sat, 24 Feb 2024 21:59:12 +0000 (22:59 +0100)] 
Released as v3.11.0

16 months agoREADME: Update copyright year and mention pcilmr
Martin Mares [Sat, 24 Feb 2024 21:21:16 +0000 (22:21 +0100)] 
README: Update copyright year and mention pcilmr

16 months agoUpdated pci.ids to today's snapshot
Martin Mares [Sat, 24 Feb 2024 20:29:47 +0000 (21:29 +0100)] 
Updated pci.ids to today's snapshot

16 months agolibpci: Add missing dependences for i386-ports.o target
Pali Rohár [Tue, 20 Feb 2024 17:44:43 +0000 (18:44 +0100)] 
libpci: Add missing dependences for i386-ports.o target

16 months agolibpci: i386-io-sunos.h: Implement intel_cleanup_io
Pali Rohár [Tue, 20 Feb 2024 17:44:06 +0000 (18:44 +0100)] 
libpci: i386-io-sunos.h: Implement intel_cleanup_io

Call 'sysi86(SI86V86, V86SC_IOPL, 0);' - same what is X11 and FlashROM doing.

16 months agolibpci: Define STATIC_ALIAS for DLL Windows builds
Pali Rohár [Sat, 24 Feb 2024 15:12:26 +0000 (16:12 +0100)] 
libpci: Define STATIC_ALIAS for DLL Windows builds

Windows builds for versioned symbols use inline asm .set directive which in
some cases makes x86-64 LTO compiler to drop the referenced value. Define
STATIC_ALIAS macro with VERSIONED_ABI (used) attribute which forces LTO
compiler to not drop the symbol from the final DLL library.

16 months agolibpci: win32-cfgmgr32: Do not include resolver for cfgmgr32 function for MinGW-w64
Pali Rohár [Sat, 24 Feb 2024 15:09:35 +0000 (16:09 +0100)] 
libpci: win32-cfgmgr32: Do not include resolver for cfgmgr32 function for MinGW-w64

MinGW-w64 toolchain (as opposite to MinGW32) provides all needed cfgmgr32
functions in import library. Use import library and do not resolve
functions at runtime.

16 months agolibpci: win32-cfgmgr32: Define mMD_Prefetchable constant
Pali Rohár [Sat, 24 Feb 2024 15:08:13 +0000 (16:08 +0100)] 
libpci: win32-cfgmgr32: Define mMD_Prefetchable constant

Older version of cfgmgr32.h header file use define name fMD_Prefetchable
instead of mMD_Prefetchable. Define constant to fix compilation.

16 months agowindows: Try to return error message from win32_strerror() in US English language
Pali Rohár [Sat, 24 Feb 2024 15:05:43 +0000 (16:05 +0100)] 
windows: Try to return error message from win32_strerror() in US English language

The default LANG_NEUTRAL language is the system language, not the "C" locale.

16 months agoMerge branch 'amiga'
Martin Mares [Fri, 23 Feb 2024 13:56:39 +0000 (14:56 +0100)] 
Merge branch 'amiga'