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Better support for dma_addr_t variables
[thirdparty/qemu.git] / dma-helpers.c
CommitLineData
244ab90e
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1/*
2 * DMA helper functions
3 *
4 * Copyright (c) 2009 Red Hat
5 *
6 * This work is licensed under the terms of the GNU General Public License
7 * (GNU GPL), version 2 or later.
8 */
9
10#include "dma.h"
c57c4658 11#include "trace.h"
244ab90e
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12
13void qemu_sglist_init(QEMUSGList *qsg, int alloc_hint)
14{
7267c094 15 qsg->sg = g_malloc(alloc_hint * sizeof(ScatterGatherEntry));
244ab90e
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16 qsg->nsg = 0;
17 qsg->nalloc = alloc_hint;
18 qsg->size = 0;
19}
20
d3231181 21void qemu_sglist_add(QEMUSGList *qsg, dma_addr_t base, dma_addr_t len)
244ab90e
AL
22{
23 if (qsg->nsg == qsg->nalloc) {
24 qsg->nalloc = 2 * qsg->nalloc + 1;
7267c094 25 qsg->sg = g_realloc(qsg->sg, qsg->nalloc * sizeof(ScatterGatherEntry));
244ab90e
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26 }
27 qsg->sg[qsg->nsg].base = base;
28 qsg->sg[qsg->nsg].len = len;
29 qsg->size += len;
30 ++qsg->nsg;
31}
32
33void qemu_sglist_destroy(QEMUSGList *qsg)
34{
7267c094 35 g_free(qsg->sg);
244ab90e
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36}
37
59a703eb 38typedef struct {
37b7842c 39 BlockDriverAIOCB common;
59a703eb
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40 BlockDriverState *bs;
41 BlockDriverAIOCB *acb;
42 QEMUSGList *sg;
43 uint64_t sector_num;
43cf8ae6 44 DMADirection dir;
c3adb5b9 45 bool in_cancel;
59a703eb 46 int sg_cur_index;
d3231181 47 dma_addr_t sg_cur_byte;
59a703eb
AL
48 QEMUIOVector iov;
49 QEMUBH *bh;
cb144ccb 50 DMAIOFunc *io_func;
37b7842c 51} DMAAIOCB;
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52
53static void dma_bdrv_cb(void *opaque, int ret);
54
55static void reschedule_dma(void *opaque)
56{
37b7842c 57 DMAAIOCB *dbs = (DMAAIOCB *)opaque;
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58
59 qemu_bh_delete(dbs->bh);
60 dbs->bh = NULL;
c3adb5b9 61 dma_bdrv_cb(dbs, 0);
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62}
63
64static void continue_after_map_failure(void *opaque)
65{
37b7842c 66 DMAAIOCB *dbs = (DMAAIOCB *)opaque;
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67
68 dbs->bh = qemu_bh_new(reschedule_dma, dbs);
69 qemu_bh_schedule(dbs->bh);
70}
71
7403b14e 72static void dma_bdrv_unmap(DMAAIOCB *dbs)
59a703eb 73{
59a703eb
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74 int i;
75
59a703eb
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76 for (i = 0; i < dbs->iov.niov; ++i) {
77 cpu_physical_memory_unmap(dbs->iov.iov[i].iov_base,
43cf8ae6
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78 dbs->iov.iov[i].iov_len,
79 dbs->dir != DMA_DIRECTION_TO_DEVICE,
59a703eb
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80 dbs->iov.iov[i].iov_len);
81 }
c3adb5b9
PB
82 qemu_iovec_reset(&dbs->iov);
83}
84
85static void dma_complete(DMAAIOCB *dbs, int ret)
86{
c57c4658
KW
87 trace_dma_complete(dbs, ret, dbs->common.cb);
88
c3adb5b9
PB
89 dma_bdrv_unmap(dbs);
90 if (dbs->common.cb) {
91 dbs->common.cb(dbs->common.opaque, ret);
92 }
93 qemu_iovec_destroy(&dbs->iov);
94 if (dbs->bh) {
95 qemu_bh_delete(dbs->bh);
96 dbs->bh = NULL;
97 }
98 if (!dbs->in_cancel) {
99 /* Requests may complete while dma_aio_cancel is in progress. In
100 * this case, the AIOCB should not be released because it is still
101 * referenced by dma_aio_cancel. */
102 qemu_aio_release(dbs);
103 }
7403b14e
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104}
105
856ae5c3 106static void dma_bdrv_cb(void *opaque, int ret)
7403b14e
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107{
108 DMAAIOCB *dbs = (DMAAIOCB *)opaque;
c227f099 109 target_phys_addr_t cur_addr, cur_len;
7403b14e
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110 void *mem;
111
c57c4658
KW
112 trace_dma_bdrv_cb(dbs, ret);
113
7403b14e
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114 dbs->acb = NULL;
115 dbs->sector_num += dbs->iov.size / 512;
116 dma_bdrv_unmap(dbs);
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117
118 if (dbs->sg_cur_index == dbs->sg->nsg || ret < 0) {
c3adb5b9 119 dma_complete(dbs, ret);
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120 return;
121 }
122
123 while (dbs->sg_cur_index < dbs->sg->nsg) {
124 cur_addr = dbs->sg->sg[dbs->sg_cur_index].base + dbs->sg_cur_byte;
125 cur_len = dbs->sg->sg[dbs->sg_cur_index].len - dbs->sg_cur_byte;
43cf8ae6
DG
126 mem = cpu_physical_memory_map(cur_addr, &cur_len,
127 dbs->dir != DMA_DIRECTION_TO_DEVICE);
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128 if (!mem)
129 break;
130 qemu_iovec_add(&dbs->iov, mem, cur_len);
131 dbs->sg_cur_byte += cur_len;
132 if (dbs->sg_cur_byte == dbs->sg->sg[dbs->sg_cur_index].len) {
133 dbs->sg_cur_byte = 0;
134 ++dbs->sg_cur_index;
135 }
136 }
137
138 if (dbs->iov.size == 0) {
c57c4658 139 trace_dma_map_wait(dbs);
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140 cpu_register_map_client(dbs, continue_after_map_failure);
141 return;
142 }
143
cb144ccb
CH
144 dbs->acb = dbs->io_func(dbs->bs, dbs->sector_num, &dbs->iov,
145 dbs->iov.size / 512, dma_bdrv_cb, dbs);
6bee44ea 146 assert(dbs->acb);
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147}
148
c16b5a2c
CH
149static void dma_aio_cancel(BlockDriverAIOCB *acb)
150{
151 DMAAIOCB *dbs = container_of(acb, DMAAIOCB, common);
152
c57c4658
KW
153 trace_dma_aio_cancel(dbs);
154
c16b5a2c 155 if (dbs->acb) {
c3adb5b9
PB
156 BlockDriverAIOCB *acb = dbs->acb;
157 dbs->acb = NULL;
158 dbs->in_cancel = true;
159 bdrv_aio_cancel(acb);
160 dbs->in_cancel = false;
c16b5a2c 161 }
c3adb5b9
PB
162 dbs->common.cb = NULL;
163 dma_complete(dbs, 0);
c16b5a2c
CH
164}
165
166static AIOPool dma_aio_pool = {
167 .aiocb_size = sizeof(DMAAIOCB),
168 .cancel = dma_aio_cancel,
169};
170
cb144ccb 171BlockDriverAIOCB *dma_bdrv_io(
59a703eb 172 BlockDriverState *bs, QEMUSGList *sg, uint64_t sector_num,
cb144ccb 173 DMAIOFunc *io_func, BlockDriverCompletionFunc *cb,
43cf8ae6 174 void *opaque, DMADirection dir)
59a703eb 175{
cb144ccb 176 DMAAIOCB *dbs = qemu_aio_get(&dma_aio_pool, bs, cb, opaque);
59a703eb 177
43cf8ae6 178 trace_dma_bdrv_io(dbs, bs, sector_num, (dir == DMA_DIRECTION_TO_DEVICE));
c57c4658 179
37b7842c 180 dbs->acb = NULL;
59a703eb 181 dbs->bs = bs;
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182 dbs->sg = sg;
183 dbs->sector_num = sector_num;
184 dbs->sg_cur_index = 0;
185 dbs->sg_cur_byte = 0;
43cf8ae6 186 dbs->dir = dir;
cb144ccb 187 dbs->io_func = io_func;
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188 dbs->bh = NULL;
189 qemu_iovec_init(&dbs->iov, sg->nsg);
190 dma_bdrv_cb(dbs, 0);
37b7842c 191 return &dbs->common;
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192}
193
194
195BlockDriverAIOCB *dma_bdrv_read(BlockDriverState *bs,
196 QEMUSGList *sg, uint64_t sector,
197 void (*cb)(void *opaque, int ret), void *opaque)
198{
43cf8ae6
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199 return dma_bdrv_io(bs, sg, sector, bdrv_aio_readv, cb, opaque,
200 DMA_DIRECTION_FROM_DEVICE);
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201}
202
203BlockDriverAIOCB *dma_bdrv_write(BlockDriverState *bs,
204 QEMUSGList *sg, uint64_t sector,
205 void (*cb)(void *opaque, int ret), void *opaque)
206{
43cf8ae6
DG
207 return dma_bdrv_io(bs, sg, sector, bdrv_aio_writev, cb, opaque,
208 DMA_DIRECTION_TO_DEVICE);
59a703eb 209}
8171ee35
PB
210
211
212static uint64_t dma_buf_rw(uint8_t *ptr, int32_t len, QEMUSGList *sg, bool to_dev)
213{
214 uint64_t resid;
215 int sg_cur_index;
216
217 resid = sg->size;
218 sg_cur_index = 0;
219 len = MIN(len, resid);
220 while (len > 0) {
221 ScatterGatherEntry entry = sg->sg[sg_cur_index++];
222 int32_t xfer = MIN(len, entry.len);
223 cpu_physical_memory_rw(entry.base, ptr, xfer, !to_dev);
224 ptr += xfer;
225 len -= xfer;
226 resid -= xfer;
227 }
228
229 return resid;
230}
231
232uint64_t dma_buf_read(uint8_t *ptr, int32_t len, QEMUSGList *sg)
233{
234 return dma_buf_rw(ptr, len, sg, 0);
235}
236
237uint64_t dma_buf_write(uint8_t *ptr, int32_t len, QEMUSGList *sg)
238{
239 return dma_buf_rw(ptr, len, sg, 1);
240}
84a69356
PB
241
242void dma_acct_start(BlockDriverState *bs, BlockAcctCookie *cookie,
243 QEMUSGList *sg, enum BlockAcctType type)
244{
245 bdrv_acct_start(bs, cookie, sg->size, type);
246}