]> git.ipfire.org Git - thirdparty/qemu.git/commit
tcg/i386: Add vector operations
authorRichard Henderson <richard.henderson@linaro.org>
Thu, 17 Aug 2017 21:47:43 +0000 (14:47 -0700)
committerRichard Henderson <richard.henderson@linaro.org>
Thu, 8 Feb 2018 15:54:08 +0000 (15:54 +0000)
commit770c2fc7bb70804ae9869995fd02dadd6d7656ac
treeeebf85125304f66591faaf92ec7d9b8381fbac3f
parent064e265d5680e5c605d6ee8370fc1e8da094e66d
tcg/i386: Add vector operations

The x86 vector instruction set is extremely irregular.  With newer
editions, Intel has filled in some of the blanks.  However, we don't
get many 64-bit operations until SSE4.2, introduced in 2009.

The subsequent edition was for AVX1, introduced in 2011, which added
three-operand addressing, and adjusts how all instructions should be
encoded.

Given the relatively narrow 2 year window between possible to support
and desirable to support, and to vastly simplify code maintainence,
I am only planning to support AVX1 and later cpus.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
tcg/i386/tcg-target.h
tcg/i386/tcg-target.inc.c
tcg/i386/tcg-target.opc.h [new file with mode: 0644]