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83d290c5 1# SPDX-License-Identifier: GPL-2.0+
c609719b 2#
eca3aeb3 3# (C) Copyright 2000 - 2013
c609719b 4# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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5
6Summary:
7========
8
24ee89b9 9This directory contains the source code for U-Boot, a boot loader for
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10Embedded boards based on PowerPC, ARM, MIPS and several other
11processors, which can be installed in a boot ROM and used to
12initialize and test the hardware or to download and run application
13code.
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14
15The development of U-Boot is closely related to Linux: some parts of
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16the source code originate in the Linux source tree, we have some
17header files in common, and special provision has been made to
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18support booting of Linux images.
19
20Some attention has been paid to make this software easily
21configurable and extendable. For instance, all monitor commands are
22implemented with the same call interface, so that it's very easy to
23add new commands. Also, instead of permanently adding rarely used
24code (for instance hardware test utilities) to the monitor, you can
25load and run it dynamically.
26
27
28Status:
29=======
30
31In general, all boards for which a configuration option exists in the
24ee89b9 32Makefile have been tested to some extent and can be considered
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33"working". In fact, many of them are used in production systems.
34
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35In case of problems see the CHANGELOG file to find out who contributed
36the specific port. In addition, there are various MAINTAINERS files
37scattered throughout the U-Boot source identifying the people or
38companies responsible for various boards and subsystems.
c609719b 39
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40Note: As of August, 2010, there is no longer a CHANGELOG file in the
41actual U-Boot source tree; however, it can be created dynamically
42from the Git log using:
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43
44 make CHANGELOG
45
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46
47Where to get help:
48==================
49
24ee89b9 50In case you have questions about, problems with or contributions for
7207b366 51U-Boot, you should send a message to the U-Boot mailing list at
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52<u-boot@lists.denx.de>. There is also an archive of previous traffic
53on the mailing list - please search the archive before asking FAQ's.
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54Please see https://lists.denx.de/pipermail/u-boot and
55https://marc.info/?l=u-boot
c609719b 56
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57Where to get source code:
58=========================
59
7207b366 60The U-Boot source code is maintained in the Git repository at
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61https://source.denx.de/u-boot/u-boot.git ; you can browse it online at
62https://source.denx.de/u-boot/u-boot
218ca724 63
c4bd51e2 64The "Tags" links on this page allow you to download tarballs of
11ccc33f 65any version you might be interested in. Official releases are also
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66available from the DENX file server through HTTPS or FTP.
67https://ftp.denx.de/pub/u-boot/
68ftp://ftp.denx.de/pub/u-boot/
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69
70
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71Where we come from:
72===================
73
74- start from 8xxrom sources
047f6ec0 75- create PPCBoot project (https://sourceforge.net/projects/ppcboot)
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76- clean up code
77- make it easier to add custom boards
78- make it possible to add other [PowerPC] CPUs
79- extend functions, especially:
80 * Provide extended interface to Linux boot loader
81 * S-Record download
82 * network boot
9e5616de 83 * ATA disk / SCSI ... boot
047f6ec0 84- create ARMBoot project (https://sourceforge.net/projects/armboot)
c609719b 85- add other CPU families (starting with ARM)
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86- create U-Boot project (https://sourceforge.net/projects/u-boot)
87- current project page: see https://www.denx.de/wiki/U-Boot
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88
89
90Names and Spelling:
91===================
92
93The "official" name of this project is "Das U-Boot". The spelling
94"U-Boot" shall be used in all written text (documentation, comments
95in source files etc.). Example:
96
97 This is the README file for the U-Boot project.
98
99File names etc. shall be based on the string "u-boot". Examples:
100
101 include/asm-ppc/u-boot.h
102
103 #include <asm/u-boot.h>
104
105Variable names, preprocessor constants etc. shall be either based on
106the string "u_boot" or on "U_BOOT". Example:
107
108 U_BOOT_VERSION u_boot_logo
109 IH_OS_U_BOOT u_boot_hush_start
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110
111
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112Versioning:
113===========
114
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115Starting with the release in October 2008, the names of the releases
116were changed from numerical release numbers without deeper meaning
117into a time stamp based numbering. Regular releases are identified by
118names consisting of the calendar year and month of the release date.
119Additional fields (if present) indicate release candidates or bug fix
120releases in "stable" maintenance trees.
121
122Examples:
c0f40859 123 U-Boot v2009.11 - Release November 2009
360d883a 124 U-Boot v2009.11.1 - Release 1 in version November 2009 stable tree
0de21ecb 125 U-Boot v2010.09-rc1 - Release candidate 1 for September 2010 release
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126
127
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128Directory Hierarchy:
129====================
130
6e73ed00 131/arch Architecture-specific files
6eae68e4 132 /arc Files generic to ARC architecture
8d321b81 133 /arm Files generic to ARM architecture
8d321b81 134 /m68k Files generic to m68k architecture
8d321b81 135 /microblaze Files generic to microblaze architecture
8d321b81 136 /mips Files generic to MIPS architecture
afc1ce82 137 /nds32 Files generic to NDS32 architecture
8d321b81 138 /nios2 Files generic to Altera NIOS2 architecture
a47a12be 139 /powerpc Files generic to PowerPC architecture
3fafced7 140 /riscv Files generic to RISC-V architecture
7207b366 141 /sandbox Files generic to HW-independent "sandbox"
8d321b81 142 /sh Files generic to SH architecture
33c7731b 143 /x86 Files generic to x86 architecture
e4eb313a 144 /xtensa Files generic to Xtensa architecture
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145/api Machine/arch-independent API for external apps
146/board Board-dependent files
19a91f24 147/boot Support for images and booting
740f7e5c 148/cmd U-Boot commands functions
6e73ed00 149/common Misc architecture-independent functions
7207b366 150/configs Board default configuration files
8d321b81 151/disk Code for disk drive partition handling
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152/doc Documentation (a mix of ReST and READMEs)
153/drivers Device drivers
154/dts Makefile for building internal U-Boot fdt.
155/env Environment support
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156/examples Example code for standalone applications, etc.
157/fs Filesystem code (cramfs, ext2, jffs2, etc.)
158/include Header Files
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159/lib Library routines generic to all architectures
160/Licenses Various license files
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161/net Networking code
162/post Power On Self Test
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163/scripts Various build scripts and Makefiles
164/test Various unit test files
6e73ed00 165/tools Tools to build and sign FIT images, etc.
c609719b 166
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167Software Configuration:
168=======================
169
170Configuration is usually done using C preprocessor defines; the
171rationale behind that is to avoid dead code whenever possible.
172
173There are two classes of configuration variables:
174
175* Configuration _OPTIONS_:
176 These are selectable by the user and have names beginning with
177 "CONFIG_".
178
179* Configuration _SETTINGS_:
180 These depend on the hardware etc. and should not be meddled with if
181 you don't know what you're doing; they have names beginning with
6d0f6bcf 182 "CONFIG_SYS_".
c609719b 183
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184Previously, all configuration was done by hand, which involved creating
185symbolic links and editing configuration files manually. More recently,
186U-Boot has added the Kbuild infrastructure used by the Linux kernel,
187allowing you to use the "make menuconfig" command to configure your
188build.
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189
190
191Selection of Processor Architecture and Board Type:
192---------------------------------------------------
193
194For all supported boards there are ready-to-use default
ab584d67 195configurations available; just type "make <board_name>_defconfig".
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196
197Example: For a TQM823L module type:
198
199 cd u-boot
ab584d67 200 make TQM823L_defconfig
c609719b 201
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202Note: If you're looking for the default configuration file for a board
203you're sure used to be there but is now missing, check the file
204doc/README.scrapyard for a list of no longer supported boards.
c609719b 205
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206Sandbox Environment:
207--------------------
208
209U-Boot can be built natively to run on a Linux host using the 'sandbox'
210board. This allows feature development which is not board- or architecture-
211specific to be undertaken on a native platform. The sandbox is also used to
212run some of U-Boot's tests.
213
bbb140ed 214See doc/arch/sandbox.rst for more details.
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215
216
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217Board Initialisation Flow:
218--------------------------
219
220This is the intended start-up flow for boards. This should apply for both
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221SPL and U-Boot proper (i.e. they both follow the same rules).
222
223Note: "SPL" stands for "Secondary Program Loader," which is explained in
224more detail later in this file.
225
226At present, SPL mostly uses a separate code path, but the function names
227and roles of each function are the same. Some boards or architectures
228may not conform to this. At least most ARM boards which use
229CONFIG_SPL_FRAMEWORK conform to this.
230
231Execution typically starts with an architecture-specific (and possibly
232CPU-specific) start.S file, such as:
233
234 - arch/arm/cpu/armv7/start.S
235 - arch/powerpc/cpu/mpc83xx/start.S
236 - arch/mips/cpu/start.S
db910353 237
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238and so on. From there, three functions are called; the purpose and
239limitations of each of these functions are described below.
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240
241lowlevel_init():
242 - purpose: essential init to permit execution to reach board_init_f()
243 - no global_data or BSS
244 - there is no stack (ARMv7 may have one but it will soon be removed)
245 - must not set up SDRAM or use console
246 - must only do the bare minimum to allow execution to continue to
247 board_init_f()
248 - this is almost never needed
249 - return normally from this function
250
251board_init_f():
252 - purpose: set up the machine ready for running board_init_r():
253 i.e. SDRAM and serial UART
254 - global_data is available
255 - stack is in SRAM
256 - BSS is not available, so you cannot use global/static variables,
257 only stack variables and global_data
258
259 Non-SPL-specific notes:
260 - dram_init() is called to set up DRAM. If already done in SPL this
261 can do nothing
262
263 SPL-specific notes:
264 - you can override the entire board_init_f() function with your own
265 version as needed.
266 - preloader_console_init() can be called here in extremis
267 - should set up SDRAM, and anything needed to make the UART work
499696e4 268 - there is no need to clear BSS, it will be done by crt0.S
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269 - for specific scenarios on certain architectures an early BSS *can*
270 be made available (via CONFIG_SPL_EARLY_BSS by moving the clearing
271 of BSS prior to entering board_init_f()) but doing so is discouraged.
272 Instead it is strongly recommended to architect any code changes
273 or additions such to not depend on the availability of BSS during
274 board_init_f() as indicated in other sections of this README to
275 maintain compatibility and consistency across the entire code base.
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276 - must return normally from this function (don't call board_init_r()
277 directly)
278
279Here the BSS is cleared. For SPL, if CONFIG_SPL_STACK_R is defined, then at
280this point the stack and global_data are relocated to below
281CONFIG_SPL_STACK_R_ADDR. For non-SPL, U-Boot is relocated to run at the top of
282memory.
283
284board_init_r():
285 - purpose: main execution, common code
286 - global_data is available
287 - SDRAM is available
288 - BSS is available, all static/global variables can be used
289 - execution eventually continues to main_loop()
290
291 Non-SPL-specific notes:
292 - U-Boot is relocated to the top of memory and is now running from
293 there.
294
295 SPL-specific notes:
296 - stack is optionally in SDRAM, if CONFIG_SPL_STACK_R is defined and
297 CONFIG_SPL_STACK_R_ADDR points into SDRAM
298 - preloader_console_init() can be called here - typically this is
0680f1b1 299 done by selecting CONFIG_SPL_BOARD_INIT and then supplying a
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300 spl_board_init() function containing this call
301 - loads U-Boot or (in falcon mode) Linux
302
303
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304Configuration Options:
305----------------------
306
307Configuration depends on the combination of board and CPU type; all
308such information is kept in a configuration file
309"include/configs/<board_name>.h".
310
311Example: For a TQM823L module, all configuration settings are in
312"include/configs/TQM823L.h".
313
314
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315Many of the options are named exactly as the corresponding Linux
316kernel configuration options. The intention is to make it easier to
317build a config tool - later.
318
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319- ARM Platform Bus Type(CCI):
320 CoreLink Cache Coherent Interconnect (CCI) is ARM BUS which
321 provides full cache coherency between two clusters of multi-core
322 CPUs and I/O coherency for devices and I/O masters
323
324 CONFIG_SYS_FSL_HAS_CCI400
325
326 Defined For SoC that has cache coherent interconnect
327 CCN-400
7f6c2cbc 328
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329 CONFIG_SYS_FSL_HAS_CCN504
330
331 Defined for SoC that has cache coherent interconnect CCN-504
332
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333The following options need to be configured:
334
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335- CPU Type: Define exactly one, e.g. CONFIG_MPC85XX.
336
337- Board Type: Define exactly one, e.g. CONFIG_MPC8540ADS.
6ccec449 338
66412c63 339- 85xx CPU Options:
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340 CONFIG_SYS_PPC64
341
342 Specifies that the core is a 64-bit PowerPC implementation (implements
343 the "64" category of the Power ISA). This is necessary for ePAPR
344 compliance, among other possible reasons.
345
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346 CONFIG_SYS_FSL_TBCLK_DIV
347
348 Defines the core time base clock divider ratio compared to the
349 system clock. On most PQ3 devices this is 8, on newer QorIQ
350 devices it can be 16 or 32. The ratio varies from SoC to Soc.
351
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352 CONFIG_SYS_FSL_PCIE_COMPAT
353
354 Defines the string to utilize when trying to match PCIe device
355 tree nodes for the given platform.
356
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357 CONFIG_SYS_FSL_ERRATUM_A004510
358
359 Enables a workaround for erratum A004510. If set,
360 then CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV and
361 CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY must be set.
362
363 CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV
364 CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV2 (optional)
365
366 Defines one or two SoC revisions (low 8 bits of SVR)
367 for which the A004510 workaround should be applied.
368
369 The rest of SVR is either not relevant to the decision
370 of whether the erratum is present (e.g. p2040 versus
371 p2041) or is implied by the build target, which controls
372 whether CONFIG_SYS_FSL_ERRATUM_A004510 is set.
373
374 See Freescale App Note 4493 for more information about
375 this erratum.
376
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377 CONFIG_A003399_NOR_WORKAROUND
378 Enables a workaround for IFC erratum A003399. It is only
b445bbb4 379 required during NOR boot.
74fa22ed 380
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381 CONFIG_A008044_WORKAROUND
382 Enables a workaround for T1040/T1042 erratum A008044. It is only
b445bbb4 383 required during NAND boot and valid for Rev 1.0 SoC revision
9f074e67 384
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385 CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY
386
387 This is the value to write into CCSR offset 0x18600
388 according to the A004510 workaround.
389
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390 CONFIG_SYS_FSL_DSP_DDR_ADDR
391 This value denotes start offset of DDR memory which is
392 connected exclusively to the DSP cores.
393
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394 CONFIG_SYS_FSL_DSP_M2_RAM_ADDR
395 This value denotes start offset of M2 memory
396 which is directly connected to the DSP core.
397
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398 CONFIG_SYS_FSL_DSP_M3_RAM_ADDR
399 This value denotes start offset of M3 memory which is directly
400 connected to the DSP core.
401
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402 CONFIG_SYS_FSL_DSP_CCSRBAR_DEFAULT
403 This value denotes start offset of DSP CCSR space.
404
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405 CONFIG_SYS_FSL_SINGLE_SOURCE_CLK
406 Single Source Clock is clocking mode present in some of FSL SoC's.
407 In this mode, a single differential clock is used to supply
408 clocks to the sysclock, ddrclock and usbclock.
409
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410 CONFIG_SYS_CPC_REINIT_F
411 This CONFIG is defined when the CPC is configured as SRAM at the
a187559e 412 time of U-Boot entry and is required to be re-initialized.
fb4a2409 413
aade2004 414 CONFIG_DEEP_SLEEP
b445bbb4 415 Indicates this SoC supports deep sleep feature. If deep sleep is
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416 supported, core will start to execute uboot when wakes up.
417
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418- Generic CPU options:
419 CONFIG_SYS_BIG_ENDIAN, CONFIG_SYS_LITTLE_ENDIAN
420
421 Defines the endianess of the CPU. Implementation of those
422 values is arch specific.
423
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424 CONFIG_SYS_FSL_DDR
425 Freescale DDR driver in use. This type of DDR controller is
1c58857a 426 found in mpc83xx, mpc85xx as well as some ARM core SoCs.
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427
428 CONFIG_SYS_FSL_DDR_ADDR
429 Freescale DDR memory-mapped register base.
430
431 CONFIG_SYS_FSL_DDR_EMU
432 Specify emulator support for DDR. Some DDR features such as
433 deskew training are not available.
434
435 CONFIG_SYS_FSL_DDRC_GEN1
436 Freescale DDR1 controller.
437
438 CONFIG_SYS_FSL_DDRC_GEN2
439 Freescale DDR2 controller.
440
441 CONFIG_SYS_FSL_DDRC_GEN3
442 Freescale DDR3 controller.
443
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444 CONFIG_SYS_FSL_DDRC_GEN4
445 Freescale DDR4 controller.
446
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447 CONFIG_SYS_FSL_DDRC_ARM_GEN3
448 Freescale DDR3 controller for ARM-based SoCs.
449
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450 CONFIG_SYS_FSL_DDR1
451 Board config to use DDR1. It can be enabled for SoCs with
452 Freescale DDR1 or DDR2 controllers, depending on the board
453 implemetation.
454
455 CONFIG_SYS_FSL_DDR2
62a3b7dd 456 Board config to use DDR2. It can be enabled for SoCs with
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457 Freescale DDR2 or DDR3 controllers, depending on the board
458 implementation.
459
460 CONFIG_SYS_FSL_DDR3
461 Board config to use DDR3. It can be enabled for SoCs with
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462 Freescale DDR3 or DDR3L controllers.
463
464 CONFIG_SYS_FSL_DDR3L
465 Board config to use DDR3L. It can be enabled for SoCs with
466 DDR3L controllers.
5614e71b 467
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468 CONFIG_SYS_FSL_IFC_BE
469 Defines the IFC controller register space as Big Endian
470
471 CONFIG_SYS_FSL_IFC_LE
472 Defines the IFC controller register space as Little Endian
473
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474 CONFIG_SYS_FSL_IFC_CLK_DIV
475 Defines divider of platform clock(clock input to IFC controller).
476
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477 CONFIG_SYS_FSL_LBC_CLK_DIV
478 Defines divider of platform clock(clock input to eLBC controller).
479
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480 CONFIG_SYS_FSL_DDR_BE
481 Defines the DDR controller register space as Big Endian
482
483 CONFIG_SYS_FSL_DDR_LE
484 Defines the DDR controller register space as Little Endian
485
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486 CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY
487 Physical address from the view of DDR controllers. It is the
488 same as CONFIG_SYS_DDR_SDRAM_BASE for all Power SoCs. But
489 it could be different for ARM SoCs.
490
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491 CONFIG_SYS_FSL_DDR_INTLV_256B
492 DDR controller interleaving on 256-byte. This is a special
493 interleaving mode, handled by Dickens for Freescale layerscape
494 SoCs with ARM core.
495
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496 CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS
497 Number of controllers used as main memory.
498
499 CONFIG_SYS_FSL_OTHER_DDR_NUM_CTRLS
500 Number of controllers used for other than main memory.
501
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502 CONFIG_SYS_FSL_HAS_DP_DDR
503 Defines the SoC has DP-DDR used for DPAA.
504
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505 CONFIG_SYS_FSL_SEC_BE
506 Defines the SEC controller register space as Big Endian
507
508 CONFIG_SYS_FSL_SEC_LE
509 Defines the SEC controller register space as Little Endian
510
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511- MIPS CPU options:
512 CONFIG_SYS_INIT_SP_OFFSET
513
514 Offset relative to CONFIG_SYS_SDRAM_BASE for initial stack
515 pointer. This is needed for the temporary stack before
516 relocation.
517
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518 CONFIG_XWAY_SWAP_BYTES
519
520 Enable compilation of tools/xway-swap-bytes needed for Lantiq
521 XWAY SoCs for booting from NOR flash. The U-Boot image needs to
522 be swapped if a flash programmer is used.
523
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524- ARM options:
525 CONFIG_SYS_EXCEPTION_VECTORS_HIGH
526
527 Select high exception vectors of the ARM core, e.g., do not
528 clear the V bit of the c1 register of CP15.
529
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530 COUNTER_FREQUENCY
531 Generic timer clock source frequency.
532
533 COUNTER_FREQUENCY_REAL
534 Generic timer clock source frequency if the real clock is
535 different from COUNTER_FREQUENCY, and can only be determined
536 at run time.
537
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538- Tegra SoC options:
539 CONFIG_TEGRA_SUPPORT_NON_SECURE
540
541 Support executing U-Boot in non-secure (NS) mode. Certain
542 impossible actions will be skipped if the CPU is in NS mode,
543 such as ARM architectural timer initialization.
544
5da627a4 545- Linux Kernel Interface:
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546 CONFIG_MEMSIZE_IN_BYTES [relevant for MIPS only]
547
b445bbb4 548 When transferring memsize parameter to Linux, some versions
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549 expect it to be in bytes, others in MB.
550 Define CONFIG_MEMSIZE_IN_BYTES to make it in bytes.
551
fec6d9ee 552 CONFIG_OF_LIBFDT
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553
554 New kernel versions are expecting firmware settings to be
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555 passed using flattened device trees (based on open firmware
556 concepts).
557
558 CONFIG_OF_LIBFDT
559 * New libfdt-based support
560 * Adds the "fdt" command
3bb342fc 561 * The bootm command automatically updates the fdt
213bf8c8 562
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563 OF_TBCLK - The timebase frequency.
564
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565 boards with QUICC Engines require OF_QE to set UCC MAC
566 addresses
3bb342fc 567
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568 CONFIG_OF_SYSTEM_SETUP
569
570 Other code has addition modification that it wants to make
571 to the flat device tree before handing it off to the kernel.
572 This causes ft_system_setup() to be called before booting
573 the kernel.
574
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575 CONFIG_OF_IDE_FIXUP
576
577 U-Boot can detect if an IDE device is present or not.
578 If not, and this new config option is activated, U-Boot
579 removes the ATA node from the DTS before booting Linux,
580 so the Linux IDE driver does not probe the device and
581 crash. This is needed for buggy hardware (uc101) where
582 no pull down resistor is connected to the signal IDE5V_DD7.
583
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584- vxWorks boot parameters:
585
586 bootvx constructs a valid bootline using the following
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587 environments variables: bootdev, bootfile, ipaddr, netmask,
588 serverip, gatewayip, hostname, othbootargs.
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589 It loads the vxWorks image pointed bootfile.
590
81a05d9b 591 Note: If a "bootargs" environment is defined, it will override
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592 the defaults discussed just above.
593
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594- Cache Configuration for ARM:
595 CONFIG_SYS_L2_PL310 - Enable support for ARM PL310 L2 cache
596 controller
597 CONFIG_SYS_PL310_BASE - Physical base address of PL310
598 controller register space
599
6705d81e 600- Serial Ports:
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601 CONFIG_PL011_CLOCK
602
603 If you have Amba PrimeCell PL011 UARTs, set this variable to
604 the clock speed of the UARTs.
605
606 CONFIG_PL01x_PORTS
607
608 If you have Amba PrimeCell PL010 or PL011 UARTs on your board,
609 define this to a list of base addresses for each (supported)
610 port. See e.g. include/configs/versatile.h
611
d57dee57
KM
612 CONFIG_SERIAL_HW_FLOW_CONTROL
613
614 Define this variable to enable hw flow control in serial driver.
615 Current user of this option is drivers/serial/nsl16550.c driver
6705d81e 616
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617- Serial Download Echo Mode:
618 CONFIG_LOADS_ECHO
619 If defined to 1, all characters received during a
620 serial download (using the "loads" command) are
621 echoed back. This might be needed by some terminal
622 emulations (like "cu"), but may as well just take
623 time on others. This setting #define's the initial
624 value of the "loads_echo" environment variable.
625
302a6487
SG
626- Removal of commands
627 If no commands are needed to boot, you can disable
628 CONFIG_CMDLINE to remove them. In this case, the command line
629 will not be available, and when U-Boot wants to execute the
630 boot command (on start-up) it will call board_run_command()
631 instead. This can reduce image size significantly for very
632 simple boot procedures.
633
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WD
634- Regular expression support:
635 CONFIG_REGEX
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636 If this variable is defined, U-Boot is linked against
637 the SLRE (Super Light Regular Expression) library,
638 which adds regex support to some commands, as for
639 example "env grep" and "setexpr".
a5ecbe62 640
c609719b 641- Watchdog:
933ada56
RV
642 CONFIG_SYS_WATCHDOG_FREQ
643 Some platforms automatically call WATCHDOG_RESET()
644 from the timer interrupt handler every
645 CONFIG_SYS_WATCHDOG_FREQ interrupts. If not set by the
646 board configuration file, a default of CONFIG_SYS_HZ/2
647 (i.e. 500) is used. Setting CONFIG_SYS_WATCHDOG_FREQ
648 to 0 disables calling WATCHDOG_RESET() from the timer
649 interrupt.
650
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651- Real-Time Clock:
652
602ad3b3 653 When CONFIG_CMD_DATE is selected, the type of the RTC
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WD
654 has to be selected, too. Define exactly one of the
655 following options:
656
c609719b 657 CONFIG_RTC_PCF8563 - use Philips PCF8563 RTC
4e8b7544 658 CONFIG_RTC_MC13XXX - use MC13783 or MC13892 RTC
c609719b 659 CONFIG_RTC_MC146818 - use MC146818 RTC
1cb8e980 660 CONFIG_RTC_DS1307 - use Maxim, Inc. DS1307 RTC
c609719b 661 CONFIG_RTC_DS1337 - use Maxim, Inc. DS1337 RTC
7f70e853 662 CONFIG_RTC_DS1338 - use Maxim, Inc. DS1338 RTC
412921d2 663 CONFIG_RTC_DS1339 - use Maxim, Inc. DS1339 RTC
3bac3513 664 CONFIG_RTC_DS164x - use Dallas DS164x RTC
9536dfcc 665 CONFIG_RTC_ISL1208 - use Intersil ISL1208 RTC
4c0d4c3b 666 CONFIG_RTC_MAX6900 - use Maxim, Inc. MAX6900 RTC
2bd3cab3 667 CONFIG_RTC_DS1337_NOOSC - Turn off the OSC output for DS1337
71d19f30
HS
668 CONFIG_SYS_RV3029_TCR - enable trickle charger on
669 RV3029 RTC.
c609719b 670
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671 Note that if the RTC uses I2C, then the I2C interface
672 must also be configured. See I2C Support, below.
673
e92739d3
PT
674- GPIO Support:
675 CONFIG_PCA953X - use NXP's PCA953X series I2C GPIO
e92739d3 676
5dec49ca
CP
677 The CONFIG_SYS_I2C_PCA953X_WIDTH option specifies a list of
678 chip-ngpio pairs that tell the PCA953X driver the number of
679 pins supported by a particular chip.
680
e92739d3
PT
681 Note that if the GPIO device uses I2C, then the I2C interface
682 must also be configured. See I2C Support, below.
683
aa53233a
SG
684- I/O tracing:
685 When CONFIG_IO_TRACE is selected, U-Boot intercepts all I/O
686 accesses and can checksum them or write a list of them out
687 to memory. See the 'iotrace' command for details. This is
688 useful for testing device drivers since it can confirm that
689 the driver behaves the same way before and after a code
690 change. Currently this is supported on sandbox and arm. To
691 add support for your architecture, add '#include <iotrace.h>'
692 to the bottom of arch/<arch>/include/asm/io.h and test.
693
694 Example output from the 'iotrace stats' command is below.
695 Note that if the trace buffer is exhausted, the checksum will
696 still continue to operate.
697
698 iotrace is enabled
699 Start: 10000000 (buffer start address)
700 Size: 00010000 (buffer size)
701 Offset: 00000120 (current buffer offset)
702 Output: 10000120 (start + offset)
703 Count: 00000018 (number of trace records)
704 CRC32: 9526fb66 (CRC32 of all trace records)
705
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706- Timestamp Support:
707
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708 When CONFIG_TIMESTAMP is selected, the timestamp
709 (date and time) of an image is printed by image
710 commands like bootm or iminfo. This option is
602ad3b3 711 automatically enabled when you select CONFIG_CMD_DATE .
c609719b 712
923c46f9
KP
713- Partition Labels (disklabels) Supported:
714 Zero or more of the following:
715 CONFIG_MAC_PARTITION Apple's MacOS partition table.
923c46f9
KP
716 CONFIG_ISO_PARTITION ISO partition table, used on CDROM etc.
717 CONFIG_EFI_PARTITION GPT partition table, common when EFI is the
718 bootloader. Note 2TB partition limit; see
719 disk/part_efi.c
c649e3c9 720 CONFIG_SCSI) you must configure support for at
923c46f9 721 least one non-MTD partition type as well.
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722
723- IDE Reset method:
4d13cbad
WD
724 CONFIG_IDE_RESET - is this is defined, IDE Reset will
725 be performed by calling the function
726 ide_set_reset(int reset)
727 which has to be defined in a board specific file
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728
729- ATAPI Support:
730 CONFIG_ATAPI
731
732 Set this to enable ATAPI support.
733
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734- LBA48 Support
735 CONFIG_LBA48
736
737 Set this to enable support for disks larger than 137GB
4b142feb 738 Also look at CONFIG_SYS_64BIT_LBA.
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739 Whithout these , LBA48 support uses 32bit variables and will 'only'
740 support disks up to 2.1TB.
741
6d0f6bcf 742 CONFIG_SYS_64BIT_LBA:
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WD
743 When enabled, makes the IDE subsystem use 64bit sector addresses.
744 Default is 32bit.
745
c609719b 746- SCSI Support:
6d0f6bcf
JCPV
747 CONFIG_SYS_SCSI_MAX_LUN [8], CONFIG_SYS_SCSI_MAX_SCSI_ID [7] and
748 CONFIG_SYS_SCSI_MAX_DEVICE [CONFIG_SYS_SCSI_MAX_SCSI_ID *
749 CONFIG_SYS_SCSI_MAX_LUN] can be adjusted to define the
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WD
750 maximum numbers of LUNs, SCSI ID's and target
751 devices.
c609719b 752
93e14596
WD
753 The environment variable 'scsidevs' is set to the number of
754 SCSI devices found during the last scan.
447c031b 755
c609719b 756- NETWORK Support (PCI):
ce5207e1
KM
757 CONFIG_E1000_SPI
758 Utility code for direct access to the SPI bus on Intel 8257x.
759 This does not do anything useful unless you set at least one
760 of CONFIG_CMD_E1000 or CONFIG_E1000_SPI_GENERIC.
761
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762 CONFIG_NATSEMI
763 Support for National dp83815 chips.
764
765 CONFIG_NS8382X
766 Support for National dp8382[01] gigabit chips.
767
45219c46 768- NETWORK Support (other):
efdd7319
RH
769 CONFIG_CALXEDA_XGMAC
770 Support for the Calxeda XGMAC device
771
3bb46d23 772 CONFIG_LAN91C96
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WD
773 Support for SMSC's LAN91C96 chips.
774
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WD
775 CONFIG_LAN91C96_USE_32_BIT
776 Define this to enable 32 bit addressing
777
3bb46d23 778 CONFIG_SMC91111
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WD
779 Support for SMSC's LAN91C111 chip
780
781 CONFIG_SMC91111_BASE
782 Define this to hold the physical address
783 of the device (I/O space)
784
785 CONFIG_SMC_USE_32_BIT
786 Define this if data bus is 32 bits
787
788 CONFIG_SMC_USE_IOFUNCS
789 Define this to use i/o functions instead of macros
790 (some hardware wont work with macros)
791
dc02bada
HS
792 CONFIG_SYS_DAVINCI_EMAC_PHY_COUNT
793 Define this if you have more then 3 PHYs.
794
b3dbf4a5
ML
795 CONFIG_FTGMAC100
796 Support for Faraday's FTGMAC100 Gigabit SoC Ethernet
797
798 CONFIG_FTGMAC100_EGIGA
799 Define this to use GE link update with gigabit PHY.
800 Define this if FTGMAC100 is connected to gigabit PHY.
801 If your system has 10/100 PHY only, it might not occur
802 wrong behavior. Because PHY usually return timeout or
803 useless data when polling gigabit status and gigabit
804 control registers. This behavior won't affect the
805 correctnessof 10/100 link speed update.
806
3d0075fa
YS
807 CONFIG_SH_ETHER
808 Support for Renesas on-chip Ethernet controller
809
810 CONFIG_SH_ETHER_USE_PORT
811 Define the number of ports to be used
812
813 CONFIG_SH_ETHER_PHY_ADDR
814 Define the ETH PHY's address
815
68260aab
YS
816 CONFIG_SH_ETHER_CACHE_WRITEBACK
817 If this option is set, the driver enables cache flush.
818
5e124724 819- TPM Support:
90899cc0
CC
820 CONFIG_TPM
821 Support TPM devices.
822
0766ad2f
CR
823 CONFIG_TPM_TIS_INFINEON
824 Support for Infineon i2c bus TPM devices. Only one device
1b393db5
TWHT
825 per system is supported at this time.
826
1b393db5
TWHT
827 CONFIG_TPM_TIS_I2C_BURST_LIMITATION
828 Define the burst count bytes upper limit
829
3aa74088
CR
830 CONFIG_TPM_ST33ZP24
831 Support for STMicroelectronics TPM devices. Requires DM_TPM support.
832
833 CONFIG_TPM_ST33ZP24_I2C
834 Support for STMicroelectronics ST33ZP24 I2C devices.
835 Requires TPM_ST33ZP24 and I2C.
836
b75fdc11
CR
837 CONFIG_TPM_ST33ZP24_SPI
838 Support for STMicroelectronics ST33ZP24 SPI devices.
839 Requires TPM_ST33ZP24 and SPI.
840
c01939c7
DE
841 CONFIG_TPM_ATMEL_TWI
842 Support for Atmel TWI TPM device. Requires I2C support.
843
90899cc0 844 CONFIG_TPM_TIS_LPC
5e124724
VB
845 Support for generic parallel port TPM devices. Only one device
846 per system is supported at this time.
847
848 CONFIG_TPM_TIS_BASE_ADDRESS
849 Base address where the generic TPM device is mapped
850 to. Contemporary x86 systems usually map it at
851 0xfed40000.
852
be6c1529
RP
853 CONFIG_TPM
854 Define this to enable the TPM support library which provides
855 functional interfaces to some TPM commands.
856 Requires support for a TPM device.
857
858 CONFIG_TPM_AUTH_SESSIONS
859 Define this to enable authorized functions in the TPM library.
860 Requires CONFIG_TPM and CONFIG_SHA1.
861
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WD
862- USB Support:
863 At the moment only the UHCI host controller is
064b55cf 864 supported (PIP405, MIP405); define
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WD
865 CONFIG_USB_UHCI to enable it.
866 define CONFIG_USB_KEYBOARD to enable the USB Keyboard
30d56fae 867 and define CONFIG_USB_STORAGE to enable the USB
c609719b
WD
868 storage devices.
869 Note:
870 Supported are USB Keyboards and USB Floppy drives
871 (TEAC FD-05PUB).
4d13cbad 872
9ab4ce22
SG
873 CONFIG_USB_EHCI_TXFIFO_THRESH enables setting of the
874 txfilltuning field in the EHCI controller on reset.
875
6e9e0626
OT
876 CONFIG_USB_DWC2_REG_ADDR the physical CPU address of the DWC2
877 HW module registers.
878
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WD
879- USB Device:
880 Define the below if you wish to use the USB console.
881 Once firmware is rebuilt from a serial console issue the
882 command "setenv stdin usbtty; setenv stdout usbtty" and
11ccc33f 883 attach your USB cable. The Unix command "dmesg" should print
16c8d5e7
WD
884 it has found a new device. The environment variable usbtty
885 can be set to gserial or cdc_acm to enable your device to
386eda02 886 appear to a USB host as a Linux gserial device or a
16c8d5e7
WD
887 Common Device Class Abstract Control Model serial device.
888 If you select usbtty = gserial you should be able to enumerate
889 a Linux host by
890 # modprobe usbserial vendor=0xVendorID product=0xProductID
891 else if using cdc_acm, simply setting the environment
892 variable usbtty to be cdc_acm should suffice. The following
893 might be defined in YourBoardName.h
386eda02 894
16c8d5e7
WD
895 CONFIG_USB_DEVICE
896 Define this to build a UDC device
897
898 CONFIG_USB_TTY
899 Define this to have a tty type of device available to
900 talk to the UDC device
386eda02 901
f9da0f89
VK
902 CONFIG_USBD_HS
903 Define this to enable the high speed support for usb
904 device and usbtty. If this feature is enabled, a routine
905 int is_usbd_high_speed(void)
906 also needs to be defined by the driver to dynamically poll
907 whether the enumeration has succeded at high speed or full
908 speed.
909
386eda02 910 If you have a USB-IF assigned VendorID then you may wish to
16c8d5e7 911 define your own vendor specific values either in BoardName.h
386eda02 912 or directly in usbd_vendor_info.h. If you don't define
16c8d5e7
WD
913 CONFIG_USBD_MANUFACTURER, CONFIG_USBD_PRODUCT_NAME,
914 CONFIG_USBD_VENDORID and CONFIG_USBD_PRODUCTID, then U-Boot
915 should pretend to be a Linux device to it's target host.
916
917 CONFIG_USBD_MANUFACTURER
918 Define this string as the name of your company for
919 - CONFIG_USBD_MANUFACTURER "my company"
386eda02 920
16c8d5e7
WD
921 CONFIG_USBD_PRODUCT_NAME
922 Define this string as the name of your product
923 - CONFIG_USBD_PRODUCT_NAME "acme usb device"
924
925 CONFIG_USBD_VENDORID
926 Define this as your assigned Vendor ID from the USB
927 Implementors Forum. This *must* be a genuine Vendor ID
928 to avoid polluting the USB namespace.
929 - CONFIG_USBD_VENDORID 0xFFFF
386eda02 930
16c8d5e7
WD
931 CONFIG_USBD_PRODUCTID
932 Define this as the unique Product ID
933 for your device
934 - CONFIG_USBD_PRODUCTID 0xFFFF
4d13cbad 935
d70a560f
IG
936- ULPI Layer Support:
937 The ULPI (UTMI Low Pin (count) Interface) PHYs are supported via
938 the generic ULPI layer. The generic layer accesses the ULPI PHY
939 via the platform viewport, so you need both the genric layer and
940 the viewport enabled. Currently only Chipidea/ARC based
941 viewport is supported.
942 To enable the ULPI layer support, define CONFIG_USB_ULPI and
943 CONFIG_USB_ULPI_VIEWPORT in your board configuration file.
6d365ea0
LS
944 If your ULPI phy needs a different reference clock than the
945 standard 24 MHz then you have to define CONFIG_ULPI_REF_CLK to
946 the appropriate value in Hz.
c609719b 947
71f95118 948- MMC Support:
8bde7f77
WD
949 The MMC controller on the Intel PXA is supported. To
950 enable this define CONFIG_MMC. The MMC can be
951 accessed from the boot prompt by mapping the device
71f95118 952 to physical memory similar to flash. Command line is
602ad3b3
JL
953 enabled with CONFIG_CMD_MMC. The MMC driver also works with
954 the FAT fs. This is enabled with CONFIG_CMD_FAT.
71f95118 955
afb35666
YS
956 CONFIG_SH_MMCIF
957 Support for Renesas on-chip MMCIF controller
958
959 CONFIG_SH_MMCIF_ADDR
960 Define the base address of MMCIF registers
961
962 CONFIG_SH_MMCIF_CLK
963 Define the clock frequency for MMCIF
964
b3ba6e94 965- USB Device Firmware Update (DFU) class support:
bb4059a5 966 CONFIG_DFU_OVER_USB
b3ba6e94
TR
967 This enables the USB portion of the DFU USB class
968
c6631764
PA
969 CONFIG_DFU_NAND
970 This enables support for exposing NAND devices via DFU.
971
a9479f04
AM
972 CONFIG_DFU_RAM
973 This enables support for exposing RAM via DFU.
974 Note: DFU spec refer to non-volatile memory usage, but
975 allow usages beyond the scope of spec - here RAM usage,
976 one that would help mostly the developer.
977
e7e75c70
HS
978 CONFIG_SYS_DFU_DATA_BUF_SIZE
979 Dfu transfer uses a buffer before writing data to the
980 raw storage device. Make the size (in bytes) of this buffer
981 configurable. The size of this buffer is also configurable
982 through the "dfu_bufsiz" environment variable.
983
ea2453d5
PA
984 CONFIG_SYS_DFU_MAX_FILE_SIZE
985 When updating files rather than the raw storage device,
986 we use a static buffer to copy the file into and then write
987 the buffer once we've been given the whole file. Define
988 this to the maximum filesize (in bytes) for the buffer.
989 Default is 4 MiB if undefined.
990
001a8319
HS
991 DFU_DEFAULT_POLL_TIMEOUT
992 Poll timeout [ms], is the timeout a device can send to the
993 host. The host must wait for this timeout before sending
994 a subsequent DFU_GET_STATUS request to the device.
995
996 DFU_MANIFEST_POLL_TIMEOUT
997 Poll timeout [ms], which the device sends to the host when
998 entering dfuMANIFEST state. Host waits this timeout, before
999 sending again an USB request to the device.
1000
6705d81e 1001- Journaling Flash filesystem support:
6d0f6bcf
JCPV
1002 CONFIG_SYS_JFFS2_FIRST_SECTOR,
1003 CONFIG_SYS_JFFS2_FIRST_BANK, CONFIG_SYS_JFFS2_NUM_BANKS
6705d81e
WD
1004 Define these for a default partition on a NOR device
1005
c609719b 1006- Keyboard Support:
39f615ed
SG
1007 See Kconfig help for available keyboard drivers.
1008
c609719b 1009- Video support:
7d3053fb 1010 CONFIG_FSL_DIU_FB
04e5ae79 1011 Enable the Freescale DIU video driver. Reference boards for
7d3053fb
TT
1012 SOCs that have a DIU should define this macro to enable DIU
1013 support, and should also define these other macros:
1014
1015 CONFIG_SYS_DIU_ADDR
1016 CONFIG_VIDEO
7d3053fb
TT
1017 CONFIG_CFB_CONSOLE
1018 CONFIG_VIDEO_SW_CURSOR
1019 CONFIG_VGA_AS_SINGLE_DEVICE
7d3053fb
TT
1020 CONFIG_VIDEO_BMP_LOGO
1021
ba8e76bd
TT
1022 The DIU driver will look for the 'video-mode' environment
1023 variable, and if defined, enable the DIU as a console during
8eca9439 1024 boot. See the documentation file doc/README.video for a
ba8e76bd 1025 description of this variable.
7d3053fb 1026
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WD
1027- LCD Support: CONFIG_LCD
1028
1029 Define this to enable LCD support (for output to LCD
1030 display); also select one of the supported displays
1031 by defining one of these:
1032
39cf4804
SP
1033 CONFIG_ATMEL_LCD:
1034
1035 HITACHI TX09D70VM1CCA, 3.5", 240x320.
1036
fd3103bb 1037 CONFIG_NEC_NL6448AC33:
c609719b 1038
fd3103bb 1039 NEC NL6448AC33-18. Active, color, single scan.
c609719b 1040
fd3103bb 1041 CONFIG_NEC_NL6448BC20
c609719b 1042
fd3103bb
WD
1043 NEC NL6448BC20-08. 6.5", 640x480.
1044 Active, color, single scan.
1045
1046 CONFIG_NEC_NL6448BC33_54
1047
1048 NEC NL6448BC33-54. 10.4", 640x480.
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WD
1049 Active, color, single scan.
1050
1051 CONFIG_SHARP_16x9
1052
1053 Sharp 320x240. Active, color, single scan.
1054 It isn't 16x9, and I am not sure what it is.
1055
1056 CONFIG_SHARP_LQ64D341
1057
1058 Sharp LQ64D341 display, 640x480.
1059 Active, color, single scan.
1060
1061 CONFIG_HLD1045
1062
1063 HLD1045 display, 640x480.
1064 Active, color, single scan.
1065
1066 CONFIG_OPTREX_BW
1067
1068 Optrex CBL50840-2 NF-FW 99 22 M5
1069 or
1070 Hitachi LMG6912RPFC-00T
1071 or
1072 Hitachi SP14Q002
1073
1074 320x240. Black & white.
1075
676d319e
SG
1076 CONFIG_LCD_ALIGNMENT
1077
b445bbb4 1078 Normally the LCD is page-aligned (typically 4KB). If this is
676d319e
SG
1079 defined then the LCD will be aligned to this value instead.
1080 For ARM it is sometimes useful to use MMU_SECTION_SIZE
1081 here, since it is cheaper to change data cache settings on
1082 a per-section basis.
1083
1084
604c7d4a
HP
1085 CONFIG_LCD_ROTATION
1086
1087 Sometimes, for example if the display is mounted in portrait
1088 mode or even if it's mounted landscape but rotated by 180degree,
1089 we need to rotate our content of the display relative to the
1090 framebuffer, so that user can read the messages which are
1091 printed out.
1092 Once CONFIG_LCD_ROTATION is defined, the lcd_console will be
1093 initialized with a given rotation from "vl_rot" out of
1094 "vidinfo_t" which is provided by the board specific code.
1095 The value for vl_rot is coded as following (matching to
1096 fbcon=rotate:<n> linux-kernel commandline):
1097 0 = no rotation respectively 0 degree
1098 1 = 90 degree rotation
1099 2 = 180 degree rotation
1100 3 = 270 degree rotation
1101
1102 If CONFIG_LCD_ROTATION is not defined, the console will be
1103 initialized with 0degree rotation.
1104
45d7f525
TWHT
1105 CONFIG_LCD_BMP_RLE8
1106
1107 Support drawing of RLE8-compressed bitmaps on the LCD.
1108
17ea1177 1109- MII/PHY support:
17ea1177
WD
1110 CONFIG_PHY_CLOCK_FREQ (ppc4xx)
1111
1112 The clock frequency of the MII bus
1113
17ea1177
WD
1114 CONFIG_PHY_RESET_DELAY
1115
1116 Some PHY like Intel LXT971A need extra delay after
1117 reset before any MII register access is possible.
1118 For such PHY, set this option to the usec delay
1119 required. (minimum 300usec for LXT971A)
1120
1121 CONFIG_PHY_CMD_DELAY (ppc4xx)
1122
1123 Some PHY like Intel LXT971A need extra delay after
1124 command issued before MII status register can be read
1125
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1126- IP address:
1127 CONFIG_IPADDR
1128
1129 Define a default value for the IP address to use for
11ccc33f 1130 the default Ethernet interface, in case this is not
c609719b 1131 determined through e.g. bootp.
1ebcd654 1132 (Environment variable "ipaddr")
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WD
1133
1134- Server IP address:
1135 CONFIG_SERVERIP
1136
11ccc33f 1137 Defines a default value for the IP address of a TFTP
c609719b 1138 server to contact when using the "tftboot" command.
1ebcd654 1139 (Environment variable "serverip")
c609719b 1140
97cfe861
RG
1141 CONFIG_KEEP_SERVERADDR
1142
1143 Keeps the server's MAC address, in the env 'serveraddr'
1144 for passing to bootargs (like Linux's netconsole option)
1145
1ebcd654
WD
1146- Gateway IP address:
1147 CONFIG_GATEWAYIP
1148
1149 Defines a default value for the IP address of the
1150 default router where packets to other networks are
1151 sent to.
1152 (Environment variable "gatewayip")
1153
1154- Subnet mask:
1155 CONFIG_NETMASK
1156
1157 Defines a default value for the subnet mask (or
1158 routing prefix) which is used to determine if an IP
1159 address belongs to the local subnet or needs to be
1160 forwarded through a router.
1161 (Environment variable "netmask")
1162
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1163- BOOTP Recovery Mode:
1164 CONFIG_BOOTP_RANDOM_DELAY
1165
1166 If you have many targets in a network that try to
1167 boot using BOOTP, you may want to avoid that all
1168 systems send out BOOTP requests at precisely the same
1169 moment (which would happen for instance at recovery
1170 from a power failure, when all systems will try to
1171 boot, thus flooding the BOOTP server. Defining
1172 CONFIG_BOOTP_RANDOM_DELAY causes a random delay to be
1173 inserted before sending out BOOTP requests. The
6c33c785 1174 following delays are inserted then:
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WD
1175
1176 1st BOOTP request: delay 0 ... 1 sec
1177 2nd BOOTP request: delay 0 ... 2 sec
1178 3rd BOOTP request: delay 0 ... 4 sec
1179 4th and following
1180 BOOTP requests: delay 0 ... 8 sec
1181
92ac8acc
TR
1182 CONFIG_BOOTP_ID_CACHE_SIZE
1183
1184 BOOTP packets are uniquely identified using a 32-bit ID. The
1185 server will copy the ID from client requests to responses and
1186 U-Boot will use this to determine if it is the destination of
1187 an incoming response. Some servers will check that addresses
1188 aren't in use before handing them out (usually using an ARP
1189 ping) and therefore take up to a few hundred milliseconds to
1190 respond. Network congestion may also influence the time it
1191 takes for a response to make it back to the client. If that
1192 time is too long, U-Boot will retransmit requests. In order
1193 to allow earlier responses to still be accepted after these
1194 retransmissions, U-Boot's BOOTP client keeps a small cache of
1195 IDs. The CONFIG_BOOTP_ID_CACHE_SIZE controls the size of this
1196 cache. The default is to keep IDs for up to four outstanding
1197 requests. Increasing this will allow U-Boot to accept offers
1198 from a BOOTP client in networks with unusually high latency.
1199
fe389a82 1200- DHCP Advanced Options:
1fe80d79
JL
1201 You can fine tune the DHCP functionality by defining
1202 CONFIG_BOOTP_* symbols:
1203
1fe80d79 1204 CONFIG_BOOTP_NISDOMAIN
1fe80d79 1205 CONFIG_BOOTP_BOOTFILESIZE
1fe80d79
JL
1206 CONFIG_BOOTP_NTPSERVER
1207 CONFIG_BOOTP_TIMEOFFSET
1208 CONFIG_BOOTP_VENDOREX
2c00e099 1209 CONFIG_BOOTP_MAY_FAIL
fe389a82 1210
5d110f0a
WC
1211 CONFIG_BOOTP_SERVERIP - TFTP server will be the serverip
1212 environment variable, not the BOOTP server.
fe389a82 1213
2c00e099
JH
1214 CONFIG_BOOTP_MAY_FAIL - If the DHCP server is not found
1215 after the configured retry count, the call will fail
1216 instead of starting over. This can be used to fail over
1217 to Link-local IP address configuration if the DHCP server
1218 is not available.
1219
d9a2f416
AV
1220 CONFIG_BOOTP_DHCP_REQUEST_DELAY
1221
1222 A 32bit value in microseconds for a delay between
1223 receiving a "DHCP Offer" and sending the "DHCP Request".
1224 This fixes a problem with certain DHCP servers that don't
1225 respond 100% of the time to a "DHCP request". E.g. On an
1226 AT91RM9200 processor running at 180MHz, this delay needed
1227 to be *at least* 15,000 usec before a Windows Server 2003
1228 DHCP server would reply 100% of the time. I recommend at
1229 least 50,000 usec to be safe. The alternative is to hope
1230 that one of the retries will be successful but note that
1231 the DHCP timeout and retry process takes a longer than
1232 this delay.
1233
d22c338e
JH
1234 - Link-local IP address negotiation:
1235 Negotiate with other link-local clients on the local network
1236 for an address that doesn't require explicit configuration.
1237 This is especially useful if a DHCP server cannot be guaranteed
1238 to exist in all environments that the device must operate.
1239
1240 See doc/README.link-local for more information.
1241
24acb83d
PK
1242 - MAC address from environment variables
1243
1244 FDT_SEQ_MACADDR_FROM_ENV
1245
1246 Fix-up device tree with MAC addresses fetched sequentially from
1247 environment variables. This config work on assumption that
1248 non-usable ethernet node of device-tree are either not present
1249 or their status has been marked as "disabled".
1250
a3d991bd 1251 - CDP Options:
6e592385 1252 CONFIG_CDP_DEVICE_ID
a3d991bd
WD
1253
1254 The device id used in CDP trigger frames.
1255
1256 CONFIG_CDP_DEVICE_ID_PREFIX
1257
1258 A two character string which is prefixed to the MAC address
1259 of the device.
1260
1261 CONFIG_CDP_PORT_ID
1262
1263 A printf format string which contains the ascii name of
1264 the port. Normally is set to "eth%d" which sets
11ccc33f 1265 eth0 for the first Ethernet, eth1 for the second etc.
a3d991bd
WD
1266
1267 CONFIG_CDP_CAPABILITIES
1268
1269 A 32bit integer which indicates the device capabilities;
1270 0x00000010 for a normal host which does not forwards.
1271
1272 CONFIG_CDP_VERSION
1273
1274 An ascii string containing the version of the software.
1275
1276 CONFIG_CDP_PLATFORM
1277
1278 An ascii string containing the name of the platform.
1279
1280 CONFIG_CDP_TRIGGER
1281
1282 A 32bit integer sent on the trigger.
1283
1284 CONFIG_CDP_POWER_CONSUMPTION
1285
1286 A 16bit integer containing the power consumption of the
1287 device in .1 of milliwatts.
1288
1289 CONFIG_CDP_APPLIANCE_VLAN_TYPE
1290
1291 A byte containing the id of the VLAN.
1292
79267edd 1293- Status LED: CONFIG_LED_STATUS
c609719b
WD
1294
1295 Several configurations allow to display the current
1296 status using a LED. For instance, the LED will blink
1297 fast while running U-Boot code, stop blinking as
1298 soon as a reply to a BOOTP request was received, and
1299 start blinking slow once the Linux kernel is running
1300 (supported by a status LED driver in the Linux
79267edd 1301 kernel). Defining CONFIG_LED_STATUS enables this
c609719b
WD
1302 feature in U-Boot.
1303
1df7bbba
IG
1304 Additional options:
1305
79267edd 1306 CONFIG_LED_STATUS_GPIO
1df7bbba
IG
1307 The status LED can be connected to a GPIO pin.
1308 In such cases, the gpio_led driver can be used as a
79267edd 1309 status LED backend implementation. Define CONFIG_LED_STATUS_GPIO
1df7bbba
IG
1310 to include the gpio_led driver in the U-Boot binary.
1311
9dfdcdfe
IG
1312 CONFIG_GPIO_LED_INVERTED_TABLE
1313 Some GPIO connected LEDs may have inverted polarity in which
1314 case the GPIO high value corresponds to LED off state and
1315 GPIO low value corresponds to LED on state.
1316 In such cases CONFIG_GPIO_LED_INVERTED_TABLE may be defined
1317 with a list of GPIO LEDs that have inverted polarity.
1318
55dabcc8 1319- I2C Support:
3f4978c7 1320 CONFIG_SYS_NUM_I2C_BUSES
945a18e6 1321 Hold the number of i2c buses you want to use.
3f4978c7
HS
1322
1323 CONFIG_SYS_I2C_DIRECT_BUS
1324 define this, if you don't use i2c muxes on your hardware.
1325 if CONFIG_SYS_I2C_MAX_HOPS is not defined or == 0 you can
1326 omit this define.
1327
1328 CONFIG_SYS_I2C_MAX_HOPS
1329 define how many muxes are maximal consecutively connected
1330 on one i2c bus. If you not use i2c muxes, omit this
1331 define.
1332
1333 CONFIG_SYS_I2C_BUSES
b445bbb4 1334 hold a list of buses you want to use, only used if
3f4978c7
HS
1335 CONFIG_SYS_I2C_DIRECT_BUS is not defined, for example
1336 a board with CONFIG_SYS_I2C_MAX_HOPS = 1 and
1337 CONFIG_SYS_NUM_I2C_BUSES = 9:
1338
1339 CONFIG_SYS_I2C_BUSES {{0, {I2C_NULL_HOP}}, \
1340 {0, {{I2C_MUX_PCA9547, 0x70, 1}}}, \
1341 {0, {{I2C_MUX_PCA9547, 0x70, 2}}}, \
1342 {0, {{I2C_MUX_PCA9547, 0x70, 3}}}, \
1343 {0, {{I2C_MUX_PCA9547, 0x70, 4}}}, \
1344 {0, {{I2C_MUX_PCA9547, 0x70, 5}}}, \
1345 {1, {I2C_NULL_HOP}}, \
1346 {1, {{I2C_MUX_PCA9544, 0x72, 1}}}, \
1347 {1, {{I2C_MUX_PCA9544, 0x72, 2}}}, \
1348 }
1349
1350 which defines
1351 bus 0 on adapter 0 without a mux
ea818dbb
HS
1352 bus 1 on adapter 0 with a PCA9547 on address 0x70 port 1
1353 bus 2 on adapter 0 with a PCA9547 on address 0x70 port 2
1354 bus 3 on adapter 0 with a PCA9547 on address 0x70 port 3
1355 bus 4 on adapter 0 with a PCA9547 on address 0x70 port 4
1356 bus 5 on adapter 0 with a PCA9547 on address 0x70 port 5
3f4978c7 1357 bus 6 on adapter 1 without a mux
ea818dbb
HS
1358 bus 7 on adapter 1 with a PCA9544 on address 0x72 port 1
1359 bus 8 on adapter 1 with a PCA9544 on address 0x72 port 2
3f4978c7
HS
1360
1361 If you do not have i2c muxes on your board, omit this define.
1362
ce3b5d69 1363- Legacy I2C Support:
ea818dbb 1364 If you use the software i2c interface (CONFIG_SYS_I2C_SOFT)
b37c7e5e
WD
1365 then the following macros need to be defined (examples are
1366 from include/configs/lwmon.h):
c609719b
WD
1367
1368 I2C_INIT
1369
b37c7e5e 1370 (Optional). Any commands necessary to enable the I2C
43d9616c 1371 controller or configure ports.
c609719b 1372
ba56f625 1373 eg: #define I2C_INIT (immr->im_cpm.cp_pbdir |= PB_SCL)
b37c7e5e 1374
c609719b
WD
1375 I2C_ACTIVE
1376
1377 The code necessary to make the I2C data line active
1378 (driven). If the data line is open collector, this
1379 define can be null.
1380
b37c7e5e
WD
1381 eg: #define I2C_ACTIVE (immr->im_cpm.cp_pbdir |= PB_SDA)
1382
c609719b
WD
1383 I2C_TRISTATE
1384
1385 The code necessary to make the I2C data line tri-stated
1386 (inactive). If the data line is open collector, this
1387 define can be null.
1388
b37c7e5e
WD
1389 eg: #define I2C_TRISTATE (immr->im_cpm.cp_pbdir &= ~PB_SDA)
1390
c609719b
WD
1391 I2C_READ
1392
472d5460
YS
1393 Code that returns true if the I2C data line is high,
1394 false if it is low.
c609719b 1395
b37c7e5e
WD
1396 eg: #define I2C_READ ((immr->im_cpm.cp_pbdat & PB_SDA) != 0)
1397
c609719b
WD
1398 I2C_SDA(bit)
1399
472d5460
YS
1400 If <bit> is true, sets the I2C data line high. If it
1401 is false, it clears it (low).
c609719b 1402
b37c7e5e 1403 eg: #define I2C_SDA(bit) \
2535d602 1404 if(bit) immr->im_cpm.cp_pbdat |= PB_SDA; \
ba56f625 1405 else immr->im_cpm.cp_pbdat &= ~PB_SDA
b37c7e5e 1406
c609719b
WD
1407 I2C_SCL(bit)
1408
472d5460
YS
1409 If <bit> is true, sets the I2C clock line high. If it
1410 is false, it clears it (low).
c609719b 1411
b37c7e5e 1412 eg: #define I2C_SCL(bit) \
2535d602 1413 if(bit) immr->im_cpm.cp_pbdat |= PB_SCL; \
ba56f625 1414 else immr->im_cpm.cp_pbdat &= ~PB_SCL
b37c7e5e 1415
c609719b
WD
1416 I2C_DELAY
1417
1418 This delay is invoked four times per clock cycle so this
1419 controls the rate of data transfer. The data rate thus
b37c7e5e 1420 is 1 / (I2C_DELAY * 4). Often defined to be something
945af8d7
WD
1421 like:
1422
b37c7e5e 1423 #define I2C_DELAY udelay(2)
c609719b 1424
793b5726
MF
1425 CONFIG_SOFT_I2C_GPIO_SCL / CONFIG_SOFT_I2C_GPIO_SDA
1426
1427 If your arch supports the generic GPIO framework (asm/gpio.h),
1428 then you may alternatively define the two GPIOs that are to be
1429 used as SCL / SDA. Any of the previous I2C_xxx macros will
1430 have GPIO-based defaults assigned to them as appropriate.
1431
1432 You should define these to the GPIO value as given directly to
1433 the generic GPIO functions.
1434
6d0f6bcf 1435 CONFIG_SYS_I2C_INIT_BOARD
47cd00fa 1436
8bde7f77
WD
1437 When a board is reset during an i2c bus transfer
1438 chips might think that the current transfer is still
1439 in progress. On some boards it is possible to access
1440 the i2c SCLK line directly, either by using the
1441 processor pin as a GPIO or by having a second pin
1442 connected to the bus. If this option is defined a
1443 custom i2c_init_board() routine in boards/xxx/board.c
1444 is run early in the boot sequence.
47cd00fa 1445
bb99ad6d
BW
1446 CONFIG_I2C_MULTI_BUS
1447
1448 This option allows the use of multiple I2C buses, each of which
c0f40859
WD
1449 must have a controller. At any point in time, only one bus is
1450 active. To switch to a different bus, use the 'i2c dev' command.
bb99ad6d
BW
1451 Note that bus numbering is zero-based.
1452
6d0f6bcf 1453 CONFIG_SYS_I2C_NOPROBES
bb99ad6d
BW
1454
1455 This option specifies a list of I2C devices that will be skipped
c0f40859 1456 when the 'i2c probe' command is issued. If CONFIG_I2C_MULTI_BUS
0f89c54b
PT
1457 is set, specify a list of bus-device pairs. Otherwise, specify
1458 a 1D array of device addresses
bb99ad6d
BW
1459
1460 e.g.
1461 #undef CONFIG_I2C_MULTI_BUS
c0f40859 1462 #define CONFIG_SYS_I2C_NOPROBES {0x50,0x68}
bb99ad6d
BW
1463
1464 will skip addresses 0x50 and 0x68 on a board with one I2C bus
1465
c0f40859 1466 #define CONFIG_I2C_MULTI_BUS
945a18e6 1467 #define CONFIG_SYS_I2C_NOPROBES {{0,0x50},{0,0x68},{1,0x54}}
bb99ad6d
BW
1468
1469 will skip addresses 0x50 and 0x68 on bus 0 and address 0x54 on bus 1
1470
6d0f6bcf 1471 CONFIG_SYS_SPD_BUS_NUM
be5e6181
TT
1472
1473 If defined, then this indicates the I2C bus number for DDR SPD.
1474 If not defined, then U-Boot assumes that SPD is on I2C bus 0.
1475
6d0f6bcf 1476 CONFIG_SYS_RTC_BUS_NUM
0dc018ec
SR
1477
1478 If defined, then this indicates the I2C bus number for the RTC.
1479 If not defined, then U-Boot assumes that RTC is on I2C bus 0.
1480
2ac6985a
AD
1481 CONFIG_SOFT_I2C_READ_REPEATED_START
1482
1483 defining this will force the i2c_read() function in
1484 the soft_i2c driver to perform an I2C repeated start
1485 between writing the address pointer and reading the
1486 data. If this define is omitted the default behaviour
1487 of doing a stop-start sequence will be used. Most I2C
1488 devices can use either method, but some require one or
1489 the other.
be5e6181 1490
c609719b
WD
1491- SPI Support: CONFIG_SPI
1492
1493 Enables SPI driver (so far only tested with
1494 SPI EEPROM, also an instance works with Crystal A/D and
1495 D/As on the SACSng board)
1496
f659b573
HS
1497 CONFIG_SYS_SPI_MXC_WAIT
1498 Timeout for waiting until spi transfer completed.
1499 default: (CONFIG_SYS_HZ/100) /* 10 ms */
1500
0133502e 1501- FPGA Support: CONFIG_FPGA
c609719b 1502
0133502e
MF
1503 Enables FPGA subsystem.
1504
1505 CONFIG_FPGA_<vendor>
1506
1507 Enables support for specific chip vendors.
1508 (ALTERA, XILINX)
c609719b 1509
0133502e 1510 CONFIG_FPGA_<family>
c609719b 1511
0133502e
MF
1512 Enables support for FPGA family.
1513 (SPARTAN2, SPARTAN3, VIRTEX2, CYCLONE2, ACEX1K, ACEX)
1514
1515 CONFIG_FPGA_COUNT
1516
1517 Specify the number of FPGA devices to support.
c609719b 1518
6d0f6bcf 1519 CONFIG_SYS_FPGA_PROG_FEEDBACK
c609719b 1520
8bde7f77 1521 Enable printing of hash marks during FPGA configuration.
c609719b 1522
6d0f6bcf 1523 CONFIG_SYS_FPGA_CHECK_BUSY
c609719b 1524
43d9616c
WD
1525 Enable checks on FPGA configuration interface busy
1526 status by the configuration function. This option
1527 will require a board or device specific function to
1528 be written.
c609719b
WD
1529
1530 CONFIG_FPGA_DELAY
1531
1532 If defined, a function that provides delays in the FPGA
1533 configuration driver.
1534
6d0f6bcf 1535 CONFIG_SYS_FPGA_CHECK_CTRLC
c609719b
WD
1536 Allow Control-C to interrupt FPGA configuration
1537
6d0f6bcf 1538 CONFIG_SYS_FPGA_CHECK_ERROR
c609719b 1539
43d9616c
WD
1540 Check for configuration errors during FPGA bitfile
1541 loading. For example, abort during Virtex II
1542 configuration if the INIT_B line goes low (which
1543 indicated a CRC error).
c609719b 1544
6d0f6bcf 1545 CONFIG_SYS_FPGA_WAIT_INIT
c609719b 1546
b445bbb4
JM
1547 Maximum time to wait for the INIT_B line to de-assert
1548 after PROB_B has been de-asserted during a Virtex II
43d9616c 1549 FPGA configuration sequence. The default time is 500
11ccc33f 1550 ms.
c609719b 1551
6d0f6bcf 1552 CONFIG_SYS_FPGA_WAIT_BUSY
c609719b 1553
b445bbb4 1554 Maximum time to wait for BUSY to de-assert during
11ccc33f 1555 Virtex II FPGA configuration. The default is 5 ms.
c609719b 1556
6d0f6bcf 1557 CONFIG_SYS_FPGA_WAIT_CONFIG
c609719b 1558
43d9616c 1559 Time to wait after FPGA configuration. The default is
11ccc33f 1560 200 ms.
c609719b 1561
c609719b
WD
1562- Vendor Parameter Protection:
1563
43d9616c
WD
1564 U-Boot considers the values of the environment
1565 variables "serial#" (Board Serial Number) and
7152b1d0 1566 "ethaddr" (Ethernet Address) to be parameters that
43d9616c
WD
1567 are set once by the board vendor / manufacturer, and
1568 protects these variables from casual modification by
1569 the user. Once set, these variables are read-only,
1570 and write or delete attempts are rejected. You can
11ccc33f 1571 change this behaviour:
c609719b
WD
1572
1573 If CONFIG_ENV_OVERWRITE is #defined in your config
1574 file, the write protection for vendor parameters is
47cd00fa 1575 completely disabled. Anybody can change or delete
c609719b
WD
1576 these parameters.
1577
92ac5208
JH
1578 Alternatively, if you define _both_ an ethaddr in the
1579 default env _and_ CONFIG_OVERWRITE_ETHADDR_ONCE, a default
11ccc33f 1580 Ethernet address is installed in the environment,
c609719b
WD
1581 which can be changed exactly ONCE by the user. [The
1582 serial# is unaffected by this, i. e. it remains
1583 read-only.]
1584
2598090b
JH
1585 The same can be accomplished in a more flexible way
1586 for any variable by configuring the type of access
1587 to allow for those variables in the ".flags" variable
1588 or define CONFIG_ENV_FLAGS_LIST_STATIC.
1589
c609719b
WD
1590- Protected RAM:
1591 CONFIG_PRAM
1592
1593 Define this variable to enable the reservation of
1594 "protected RAM", i. e. RAM which is not overwritten
1595 by U-Boot. Define CONFIG_PRAM to hold the number of
1596 kB you want to reserve for pRAM. You can overwrite
1597 this default value by defining an environment
1598 variable "pram" to the number of kB you want to
1599 reserve. Note that the board info structure will
1600 still show the full amount of RAM. If pRAM is
1601 reserved, a new environment variable "mem" will
1602 automatically be defined to hold the amount of
1603 remaining RAM in a form that can be passed as boot
1604 argument to Linux, for instance like that:
1605
fe126d8b 1606 setenv bootargs ... mem=\${mem}
c609719b
WD
1607 saveenv
1608
1609 This way you can tell Linux not to use this memory,
1610 either, which results in a memory region that will
1611 not be affected by reboots.
1612
1613 *WARNING* If your board configuration uses automatic
1614 detection of the RAM size, you must make sure that
1615 this memory test is non-destructive. So far, the
1616 following board configurations are known to be
1617 "pRAM-clean":
1618
5b8e76c3 1619 IVMS8, IVML24, SPD8xx,
1b0757ec 1620 HERMES, IP860, RPXlite, LWMON,
2eb48ff7 1621 FLAGADM
c609719b
WD
1622
1623- Error Recovery:
c609719b
WD
1624 CONFIG_NET_RETRY_COUNT
1625
43d9616c
WD
1626 This variable defines the number of retries for
1627 network operations like ARP, RARP, TFTP, or BOOTP
1628 before giving up the operation. If not defined, a
1629 default value of 5 is used.
c609719b 1630
40cb90ee
GL
1631 CONFIG_ARP_TIMEOUT
1632
1633 Timeout waiting for an ARP reply in milliseconds.
1634
48a3e999
TK
1635 CONFIG_NFS_TIMEOUT
1636
1637 Timeout in milliseconds used in NFS protocol.
1638 If you encounter "ERROR: Cannot umount" in nfs command,
1639 try longer timeout such as
1640 #define CONFIG_NFS_TIMEOUT 10000UL
1641
c609719b
WD
1642 Note:
1643
8bde7f77
WD
1644 In the current implementation, the local variables
1645 space and global environment variables space are
1646 separated. Local variables are those you define by
1647 simply typing `name=value'. To access a local
1648 variable later on, you have write `$name' or
1649 `${name}'; to execute the contents of a variable
1650 directly type `$name' at the command prompt.
c609719b 1651
43d9616c
WD
1652 Global environment variables are those you use
1653 setenv/printenv to work with. To run a command stored
1654 in such a variable, you need to use the run command,
1655 and you must not use the '$' sign to access them.
c609719b
WD
1656
1657 To store commands and special characters in a
1658 variable, please use double quotation marks
1659 surrounding the whole text of the variable, instead
1660 of the backslashes before semicolons and special
1661 symbols.
1662
b445bbb4 1663- Command Line Editing and History:
f3b267b3
MV
1664 CONFIG_CMDLINE_PS_SUPPORT
1665
1666 Enable support for changing the command prompt string
1667 at run-time. Only static string is supported so far.
1668 The string is obtained from environment variables PS1
1669 and PS2.
1670
a8c7c708 1671- Default Environment:
c609719b
WD
1672 CONFIG_EXTRA_ENV_SETTINGS
1673
43d9616c
WD
1674 Define this to contain any number of null terminated
1675 strings (variable = value pairs) that will be part of
7152b1d0 1676 the default environment compiled into the boot image.
2262cfee 1677
43d9616c
WD
1678 For example, place something like this in your
1679 board's config file:
c609719b
WD
1680
1681 #define CONFIG_EXTRA_ENV_SETTINGS \
1682 "myvar1=value1\0" \
1683 "myvar2=value2\0"
1684
43d9616c
WD
1685 Warning: This method is based on knowledge about the
1686 internal format how the environment is stored by the
1687 U-Boot code. This is NOT an official, exported
1688 interface! Although it is unlikely that this format
7152b1d0 1689 will change soon, there is no guarantee either.
c609719b
WD
1690 You better know what you are doing here.
1691
43d9616c
WD
1692 Note: overly (ab)use of the default environment is
1693 discouraged. Make sure to check other ways to preset
74de7aef 1694 the environment like the "source" command or the
43d9616c 1695 boot command first.
c609719b 1696
06fd8538
SG
1697 CONFIG_DELAY_ENVIRONMENT
1698
1699 Normally the environment is loaded when the board is
b445bbb4 1700 initialised so that it is available to U-Boot. This inhibits
06fd8538
SG
1701 that so that the environment is not available until
1702 explicitly loaded later by U-Boot code. With CONFIG_OF_CONTROL
1703 this is instead controlled by the value of
1704 /config/load-environment.
1705
ecb0ccd9
WD
1706- TFTP Fixed UDP Port:
1707 CONFIG_TFTP_PORT
1708
28cb9375 1709 If this is defined, the environment variable tftpsrcp
ecb0ccd9 1710 is used to supply the TFTP UDP source port value.
28cb9375 1711 If tftpsrcp isn't defined, the normal pseudo-random port
ecb0ccd9
WD
1712 number generator is used.
1713
28cb9375
WD
1714 Also, the environment variable tftpdstp is used to supply
1715 the TFTP UDP destination port value. If tftpdstp isn't
1716 defined, the normal port 69 is used.
1717
1718 The purpose for tftpsrcp is to allow a TFTP server to
ecb0ccd9
WD
1719 blindly start the TFTP transfer using the pre-configured
1720 target IP address and UDP port. This has the effect of
1721 "punching through" the (Windows XP) firewall, allowing
1722 the remainder of the TFTP transfer to proceed normally.
1723 A better solution is to properly configure the firewall,
1724 but sometimes that is not allowed.
1725
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WD
1726 CONFIG_STANDALONE_LOAD_ADDR
1727
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WD
1728 This option defines a board specific value for the
1729 address where standalone program gets loaded, thus
1730 overwriting the architecture dependent default
4cf2609b
WD
1731 settings.
1732
1733- Frame Buffer Address:
1734 CONFIG_FB_ADDR
1735
1736 Define CONFIG_FB_ADDR if you want to use specific
44a53b57
WD
1737 address for frame buffer. This is typically the case
1738 when using a graphics controller has separate video
1739 memory. U-Boot will then place the frame buffer at
1740 the given address instead of dynamically reserving it
1741 in system RAM by calling lcd_setmem(), which grabs
1742 the memory for the frame buffer depending on the
1743 configured panel size.
4cf2609b
WD
1744
1745 Please see board_init_f function.
1746
cccfc2ab
DZ
1747- Automatic software updates via TFTP server
1748 CONFIG_UPDATE_TFTP
1749 CONFIG_UPDATE_TFTP_CNT_MAX
1750 CONFIG_UPDATE_TFTP_MSEC_MAX
1751
1752 These options enable and control the auto-update feature;
1753 for a more detailed description refer to doc/README.update.
1754
1755- MTD Support (mtdparts command, UBI support)
ff94bc40
HS
1756 CONFIG_MTD_UBI_WL_THRESHOLD
1757 This parameter defines the maximum difference between the highest
1758 erase counter value and the lowest erase counter value of eraseblocks
1759 of UBI devices. When this threshold is exceeded, UBI starts performing
1760 wear leveling by means of moving data from eraseblock with low erase
1761 counter to eraseblocks with high erase counter.
1762
1763 The default value should be OK for SLC NAND flashes, NOR flashes and
1764 other flashes which have eraseblock life-cycle 100000 or more.
1765 However, in case of MLC NAND flashes which typically have eraseblock
1766 life-cycle less than 10000, the threshold should be lessened (e.g.,
1767 to 128 or 256, although it does not have to be power of 2).
1768
1769 default: 4096
c654b517 1770
ff94bc40
HS
1771 CONFIG_MTD_UBI_BEB_LIMIT
1772 This option specifies the maximum bad physical eraseblocks UBI
1773 expects on the MTD device (per 1024 eraseblocks). If the
1774 underlying flash does not admit of bad eraseblocks (e.g. NOR
1775 flash), this value is ignored.
1776
1777 NAND datasheets often specify the minimum and maximum NVM
1778 (Number of Valid Blocks) for the flashes' endurance lifetime.
1779 The maximum expected bad eraseblocks per 1024 eraseblocks
1780 then can be calculated as "1024 * (1 - MinNVB / MaxNVB)",
1781 which gives 20 for most NANDs (MaxNVB is basically the total
1782 count of eraseblocks on the chip).
1783
1784 To put it differently, if this value is 20, UBI will try to
1785 reserve about 1.9% of physical eraseblocks for bad blocks
1786 handling. And that will be 1.9% of eraseblocks on the entire
1787 NAND chip, not just the MTD partition UBI attaches. This means
1788 that if you have, say, a NAND flash chip admits maximum 40 bad
1789 eraseblocks, and it is split on two MTD partitions of the same
1790 size, UBI will reserve 40 eraseblocks when attaching a
1791 partition.
1792
1793 default: 20
1794
1795 CONFIG_MTD_UBI_FASTMAP
1796 Fastmap is a mechanism which allows attaching an UBI device
1797 in nearly constant time. Instead of scanning the whole MTD device it
1798 only has to locate a checkpoint (called fastmap) on the device.
1799 The on-flash fastmap contains all information needed to attach
1800 the device. Using fastmap makes only sense on large devices where
1801 attaching by scanning takes long. UBI will not automatically install
1802 a fastmap on old images, but you can set the UBI parameter
1803 CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT to 1 if you want so. Please note
1804 that fastmap-enabled images are still usable with UBI implementations
1805 without fastmap support. On typical flash devices the whole fastmap
1806 fits into one PEB. UBI will reserve PEBs to hold two fastmaps.
1807
1808 CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT
1809 Set this parameter to enable fastmap automatically on images
1810 without a fastmap.
1811 default: 0
1812
0195a7bb
HS
1813 CONFIG_MTD_UBI_FM_DEBUG
1814 Enable UBI fastmap debug
1815 default: 0
1816
6a11cf48 1817- SPL framework
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WD
1818 CONFIG_SPL
1819 Enable building of SPL globally.
6a11cf48 1820
6ebc3461
AA
1821 CONFIG_SPL_MAX_FOOTPRINT
1822 Maximum size in memory allocated to the SPL, BSS included.
1823 When defined, the linker checks that the actual memory
1824 used by SPL from _start to __bss_end does not exceed it.
8960af8b 1825 CONFIG_SPL_MAX_FOOTPRINT and CONFIG_SPL_BSS_MAX_SIZE
6ebc3461
AA
1826 must not be both defined at the same time.
1827
95579793 1828 CONFIG_SPL_MAX_SIZE
6ebc3461
AA
1829 Maximum size of the SPL image (text, data, rodata, and
1830 linker lists sections), BSS excluded.
1831 When defined, the linker checks that the actual size does
1832 not exceed it.
95579793 1833
94a45bb1
SW
1834 CONFIG_SPL_RELOC_TEXT_BASE
1835 Address to relocate to. If unspecified, this is equal to
1836 CONFIG_SPL_TEXT_BASE (i.e. no relocation is done).
1837
95579793
TR
1838 CONFIG_SPL_BSS_START_ADDR
1839 Link address for the BSS within the SPL binary.
1840
1841 CONFIG_SPL_BSS_MAX_SIZE
6ebc3461
AA
1842 Maximum size in memory allocated to the SPL BSS.
1843 When defined, the linker checks that the actual memory used
1844 by SPL from __bss_start to __bss_end does not exceed it.
8960af8b 1845 CONFIG_SPL_MAX_FOOTPRINT and CONFIG_SPL_BSS_MAX_SIZE
6ebc3461 1846 must not be both defined at the same time.
95579793
TR
1847
1848 CONFIG_SPL_STACK
1849 Adress of the start of the stack SPL will use
1850
8c80eb3b
AA
1851 CONFIG_SPL_PANIC_ON_RAW_IMAGE
1852 When defined, SPL will panic() if the image it has
1853 loaded does not have a signature.
1854 Defining this is useful when code which loads images
1855 in SPL cannot guarantee that absolutely all read errors
1856 will be caught.
1857 An example is the LPC32XX MLC NAND driver, which will
1858 consider that a completely unreadable NAND block is bad,
1859 and thus should be skipped silently.
1860
94a45bb1
SW
1861 CONFIG_SPL_RELOC_STACK
1862 Adress of the start of the stack SPL will use after
1863 relocation. If unspecified, this is equal to
1864 CONFIG_SPL_STACK.
1865
95579793
TR
1866 CONFIG_SYS_SPL_MALLOC_START
1867 Starting address of the malloc pool used in SPL.
9ac4fc82
FE
1868 When this option is set the full malloc is used in SPL and
1869 it is set up by spl_init() and before that, the simple malloc()
1870 can be used if CONFIG_SYS_MALLOC_F is defined.
95579793
TR
1871
1872 CONFIG_SYS_SPL_MALLOC_SIZE
1873 The size of the malloc pool used in SPL.
6a11cf48 1874
861a86f4
TR
1875 CONFIG_SPL_DISPLAY_PRINT
1876 For ARM, enable an optional function to print more information
1877 about the running system.
1878
4b919725
SW
1879 CONFIG_SPL_INIT_MINIMAL
1880 Arch init code should be built for a very small image
1881
2b75b0ad
PK
1882 CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR
1883 Sector to load kernel uImage from when MMC is being
1884 used in raw mode (for Falcon mode)
1885
1886 CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR,
1887 CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS
1888 Sector and number of sectors to load kernel argument
1889 parameters from when MMC is being used in raw mode
1890 (for falcon mode)
1891
fae81c72
GG
1892 CONFIG_SPL_FS_LOAD_PAYLOAD_NAME
1893 Filename to read to load U-Boot when reading from filesystem
1894
1895 CONFIG_SPL_FS_LOAD_KERNEL_NAME
7ad2cc79 1896 Filename to read to load kernel uImage when reading
fae81c72 1897 from filesystem (for Falcon mode)
7ad2cc79 1898
fae81c72 1899 CONFIG_SPL_FS_LOAD_ARGS_NAME
7ad2cc79 1900 Filename to read to load kernel argument parameters
fae81c72 1901 when reading from filesystem (for Falcon mode)
7ad2cc79 1902
06f60ae3
SW
1903 CONFIG_SPL_MPC83XX_WAIT_FOR_NAND
1904 Set this for NAND SPL on PPC mpc83xx targets, so that
1905 start.S waits for the rest of the SPL to load before
1906 continuing (the hardware starts execution after just
1907 loading the first page rather than the full 4K).
1908
651fcf60
PK
1909 CONFIG_SPL_SKIP_RELOCATE
1910 Avoid SPL relocation
1911
15e207fa
JK
1912 CONFIG_SPL_NAND_IDENT
1913 SPL uses the chip ID list to identify the NAND flash.
1914 Requires CONFIG_SPL_NAND_BASE.
1915
6f4e7d3c
TG
1916 CONFIG_SPL_UBI
1917 Support for a lightweight UBI (fastmap) scanner and
1918 loader
1919
0c3117b1
HS
1920 CONFIG_SPL_NAND_RAW_ONLY
1921 Support to boot only raw u-boot.bin images. Use this only
1922 if you need to save space.
1923
7c8eea59
YZ
1924 CONFIG_SPL_COMMON_INIT_DDR
1925 Set for common ddr init with serial presence detect in
1926 SPL binary.
1927
95579793
TR
1928 CONFIG_SYS_NAND_5_ADDR_CYCLE, CONFIG_SYS_NAND_PAGE_COUNT,
1929 CONFIG_SYS_NAND_PAGE_SIZE, CONFIG_SYS_NAND_OOBSIZE,
1930 CONFIG_SYS_NAND_BLOCK_SIZE, CONFIG_SYS_NAND_BAD_BLOCK_POS,
1931 CONFIG_SYS_NAND_ECCPOS, CONFIG_SYS_NAND_ECCSIZE,
1932 CONFIG_SYS_NAND_ECCBYTES
1933 Defines the size and behavior of the NAND that SPL uses
7d4b7955 1934 to read U-Boot
95579793 1935
7d4b7955
SW
1936 CONFIG_SYS_NAND_U_BOOT_DST
1937 Location in memory to load U-Boot to
1938
1939 CONFIG_SYS_NAND_U_BOOT_SIZE
1940 Size of image to load
95579793
TR
1941
1942 CONFIG_SYS_NAND_U_BOOT_START
7d4b7955 1943 Entry point in loaded image to jump to
95579793
TR
1944
1945 CONFIG_SYS_NAND_HW_ECC_OOBFIRST
1946 Define this if you need to first read the OOB and then the
b445bbb4 1947 data. This is used, for example, on davinci platforms.
95579793 1948
c57b953d
PM
1949 CONFIG_SPL_RAM_DEVICE
1950 Support for running image already present in ram, in SPL binary
6a11cf48 1951
74752baa 1952 CONFIG_SPL_PAD_TO
6113d3f2
BT
1953 Image offset to which the SPL should be padded before appending
1954 the SPL payload. By default, this is defined as
1955 CONFIG_SPL_MAX_SIZE, or 0 if CONFIG_SPL_MAX_SIZE is undefined.
1956 CONFIG_SPL_PAD_TO must be either 0, meaning to append the SPL
1957 payload without any padding, or >= CONFIG_SPL_MAX_SIZE.
74752baa 1958
ca2fca22
SW
1959 CONFIG_SPL_TARGET
1960 Final target image containing SPL and payload. Some SPLs
1961 use an arch-specific makefile fragment instead, for
1962 example if more than one image needs to be produced.
1963
b527b9c6 1964 CONFIG_SPL_FIT_PRINT
87ebee39
SG
1965 Printing information about a FIT image adds quite a bit of
1966 code to SPL. So this is normally disabled in SPL. Use this
1967 option to re-enable it. This will affect the output of the
1968 bootm command when booting a FIT image.
1969
3aa29de0
YZ
1970- TPL framework
1971 CONFIG_TPL
1972 Enable building of TPL globally.
1973
1974 CONFIG_TPL_PAD_TO
1975 Image offset to which the TPL should be padded before appending
1976 the TPL payload. By default, this is defined as
93e14596
WD
1977 CONFIG_SPL_MAX_SIZE, or 0 if CONFIG_SPL_MAX_SIZE is undefined.
1978 CONFIG_SPL_PAD_TO must be either 0, meaning to append the SPL
1979 payload without any padding, or >= CONFIG_SPL_MAX_SIZE.
3aa29de0 1980
a8c7c708
WD
1981- Interrupt support (PPC):
1982
d4ca31c4
WD
1983 There are common interrupt_init() and timer_interrupt()
1984 for all PPC archs. interrupt_init() calls interrupt_init_cpu()
11ccc33f 1985 for CPU specific initialization. interrupt_init_cpu()
d4ca31c4 1986 should set decrementer_count to appropriate value. If
11ccc33f 1987 CPU resets decrementer automatically after interrupt
d4ca31c4 1988 (ppc4xx) it should set decrementer_count to zero.
11ccc33f 1989 timer_interrupt() calls timer_interrupt_cpu() for CPU
d4ca31c4
WD
1990 specific handling. If board has watchdog / status_led
1991 / other_activity_monitor it works automatically from
1992 general timer_interrupt().
a8c7c708 1993
c609719b 1994
9660e442
HR
1995Board initialization settings:
1996------------------------------
1997
1998During Initialization u-boot calls a number of board specific functions
1999to allow the preparation of board specific prerequisites, e.g. pin setup
2000before drivers are initialized. To enable these callbacks the
2001following configuration macros have to be defined. Currently this is
2002architecture specific, so please check arch/your_architecture/lib/board.c
2003typically in board_init_f() and board_init_r().
2004
2005- CONFIG_BOARD_EARLY_INIT_F: Call board_early_init_f()
2006- CONFIG_BOARD_EARLY_INIT_R: Call board_early_init_r()
2007- CONFIG_BOARD_LATE_INIT: Call board_late_init()
2008- CONFIG_BOARD_POSTCLK_INIT: Call board_postclk_init()
c609719b 2009
c609719b
WD
2010Configuration Settings:
2011-----------------------
2012
4d979bfd 2013- MEM_SUPPORT_64BIT_DATA: Defined automatically if compiled as 64-bit.
4d1fd7f1
YS
2014 Optionally it can be defined to support 64-bit memory commands.
2015
6d0f6bcf 2016- CONFIG_SYS_LONGHELP: Defined when you want long help messages included;
c609719b
WD
2017 undefine this when you're short of memory.
2018
2fb2604d
PT
2019- CONFIG_SYS_HELP_CMD_WIDTH: Defined when you want to override the default
2020 width of the commands listed in the 'help' command output.
2021
6d0f6bcf 2022- CONFIG_SYS_PROMPT: This is what U-Boot prints on the console to
c609719b
WD
2023 prompt for user input.
2024
6d0f6bcf 2025- CONFIG_SYS_CBSIZE: Buffer size for input from the Console
c609719b 2026
6d0f6bcf 2027- CONFIG_SYS_PBSIZE: Buffer size for Console output
c609719b 2028
6d0f6bcf 2029- CONFIG_SYS_MAXARGS: max. Number of arguments accepted for monitor commands
c609719b 2030
6d0f6bcf 2031- CONFIG_SYS_BARGSIZE: Buffer size for Boot Arguments which are passed to
c609719b
WD
2032 the application (usually a Linux kernel) when it is
2033 booted
2034
6d0f6bcf 2035- CONFIG_SYS_BAUDRATE_TABLE:
c609719b
WD
2036 List of legal baudrate settings for this board.
2037
e8149522 2038- CONFIG_SYS_MEM_RESERVE_SECURE
e61a7534 2039 Only implemented for ARMv8 for now.
e8149522
YS
2040 If defined, the size of CONFIG_SYS_MEM_RESERVE_SECURE memory
2041 is substracted from total RAM and won't be reported to OS.
2042 This memory can be used as secure memory. A variable
e61a7534 2043 gd->arch.secure_ram is used to track the location. In systems
e8149522
YS
2044 the RAM base is not zero, or RAM is divided into banks,
2045 this variable needs to be recalcuated to get the address.
2046
aabd7ddb 2047- CONFIG_SYS_MEM_TOP_HIDE:
6d0f6bcf 2048 If CONFIG_SYS_MEM_TOP_HIDE is defined in the board config header,
14f73ca6 2049 this specified memory area will get subtracted from the top
11ccc33f 2050 (end) of RAM and won't get "touched" at all by U-Boot. By
14f73ca6
SR
2051 fixing up gd->ram_size the Linux kernel should gets passed
2052 the now "corrected" memory size and won't touch it either.
2053 This should work for arch/ppc and arch/powerpc. Only Linux
5e12e75d 2054 board ports in arch/powerpc with bootwrapper support that
14f73ca6 2055 recalculate the memory size from the SDRAM controller setup
5e12e75d 2056 will have to get fixed in Linux additionally.
14f73ca6
SR
2057
2058 This option can be used as a workaround for the 440EPx/GRx
2059 CHIP 11 errata where the last 256 bytes in SDRAM shouldn't
2060 be touched.
2061
2062 WARNING: Please make sure that this value is a multiple of
2063 the Linux page size (normally 4k). If this is not the case,
2064 then the end address of the Linux memory will be located at a
2065 non page size aligned address and this could cause major
2066 problems.
2067
6d0f6bcf 2068- CONFIG_SYS_LOADS_BAUD_CHANGE:
c609719b
WD
2069 Enable temporary baudrate change while serial download
2070
6d0f6bcf 2071- CONFIG_SYS_SDRAM_BASE:
c609719b
WD
2072 Physical start address of SDRAM. _Must_ be 0 here.
2073
6d0f6bcf 2074- CONFIG_SYS_FLASH_BASE:
c609719b
WD
2075 Physical start address of Flash memory.
2076
6d0f6bcf 2077- CONFIG_SYS_MONITOR_BASE:
c609719b
WD
2078 Physical start address of boot monitor code (set by
2079 make config files to be same as the text base address
14d0a02a 2080 (CONFIG_SYS_TEXT_BASE) used when linking) - same as
6d0f6bcf 2081 CONFIG_SYS_FLASH_BASE when booting from flash.
c609719b 2082
6d0f6bcf 2083- CONFIG_SYS_MONITOR_LEN:
8bde7f77
WD
2084 Size of memory reserved for monitor code, used to
2085 determine _at_compile_time_ (!) if the environment is
2086 embedded within the U-Boot image, or in a separate
2087 flash sector.
c609719b 2088
6d0f6bcf 2089- CONFIG_SYS_MALLOC_LEN:
c609719b
WD
2090 Size of DRAM reserved for malloc() use.
2091
d59476b6
SG
2092- CONFIG_SYS_MALLOC_F_LEN
2093 Size of the malloc() pool for use before relocation. If
2094 this is defined, then a very simple malloc() implementation
2095 will become available before relocation. The address is just
2096 below the global data, and the stack is moved down to make
2097 space.
2098
2099 This feature allocates regions with increasing addresses
2100 within the region. calloc() is supported, but realloc()
2101 is not available. free() is supported but does nothing.
b445bbb4 2102 The memory will be freed (or in fact just forgotten) when
d59476b6
SG
2103 U-Boot relocates itself.
2104
38687ae6
SG
2105- CONFIG_SYS_MALLOC_SIMPLE
2106 Provides a simple and small malloc() and calloc() for those
2107 boards which do not use the full malloc in SPL (which is
2108 enabled with CONFIG_SYS_SPL_MALLOC_START).
2109
1dfdd9ba
TR
2110- CONFIG_SYS_NONCACHED_MEMORY:
2111 Size of non-cached memory area. This area of memory will be
2112 typically located right below the malloc() area and mapped
2113 uncached in the MMU. This is useful for drivers that would
2114 otherwise require a lot of explicit cache maintenance. For
2115 some drivers it's also impossible to properly maintain the
2116 cache. For example if the regions that need to be flushed
2117 are not a multiple of the cache-line size, *and* padding
2118 cannot be allocated between the regions to align them (i.e.
2119 if the HW requires a contiguous array of regions, and the
2120 size of each region is not cache-aligned), then a flush of
2121 one region may result in overwriting data that hardware has
2122 written to another region in the same cache-line. This can
2123 happen for example in network drivers where descriptors for
2124 buffers are typically smaller than the CPU cache-line (e.g.
2125 16 bytes vs. 32 or 64 bytes).
2126
2127 Non-cached memory is only supported on 32-bit ARM at present.
2128
6d0f6bcf 2129- CONFIG_SYS_BOOTM_LEN:
15940c9a
SR
2130 Normally compressed uImages are limited to an
2131 uncompressed size of 8 MBytes. If this is not enough,
6d0f6bcf 2132 you can define CONFIG_SYS_BOOTM_LEN in your board config file
15940c9a
SR
2133 to adjust this setting to your needs.
2134
6d0f6bcf 2135- CONFIG_SYS_BOOTMAPSZ:
c609719b
WD
2136 Maximum size of memory mapped by the startup code of
2137 the Linux kernel; all data that must be processed by
7d721e34
BS
2138 the Linux kernel (bd_info, boot arguments, FDT blob if
2139 used) must be put below this limit, unless "bootm_low"
1bce2aeb 2140 environment variable is defined and non-zero. In such case
7d721e34 2141 all data for the Linux kernel must be between "bootm_low"
c0f40859 2142 and "bootm_low" + CONFIG_SYS_BOOTMAPSZ. The environment
c3624e6e
GL
2143 variable "bootm_mapsize" will override the value of
2144 CONFIG_SYS_BOOTMAPSZ. If CONFIG_SYS_BOOTMAPSZ is undefined,
2145 then the value in "bootm_size" will be used instead.
c609719b 2146
fca43cc8
JR
2147- CONFIG_SYS_BOOT_RAMDISK_HIGH:
2148 Enable initrd_high functionality. If defined then the
2149 initrd_high feature is enabled and the bootm ramdisk subcommand
2150 is enabled.
2151
2152- CONFIG_SYS_BOOT_GET_CMDLINE:
2153 Enables allocating and saving kernel cmdline in space between
2154 "bootm_low" and "bootm_low" + BOOTMAPSZ.
2155
2156- CONFIG_SYS_BOOT_GET_KBD:
2157 Enables allocating and saving a kernel copy of the bd_info in
2158 space between "bootm_low" and "bootm_low" + BOOTMAPSZ.
2159
6d0f6bcf 2160- CONFIG_SYS_MAX_FLASH_BANKS:
c609719b
WD
2161 Max number of Flash memory banks
2162
6d0f6bcf 2163- CONFIG_SYS_MAX_FLASH_SECT:
c609719b
WD
2164 Max number of sectors on a Flash chip
2165
6d0f6bcf 2166- CONFIG_SYS_FLASH_ERASE_TOUT:
c609719b
WD
2167 Timeout for Flash erase operations (in ms)
2168
6d0f6bcf 2169- CONFIG_SYS_FLASH_WRITE_TOUT:
c609719b
WD
2170 Timeout for Flash write operations (in ms)
2171
6d0f6bcf 2172- CONFIG_SYS_FLASH_LOCK_TOUT
8564acf9
WD
2173 Timeout for Flash set sector lock bit operation (in ms)
2174
6d0f6bcf 2175- CONFIG_SYS_FLASH_UNLOCK_TOUT
8564acf9
WD
2176 Timeout for Flash clear lock bits operation (in ms)
2177
6d0f6bcf 2178- CONFIG_SYS_FLASH_PROTECTION
8564acf9
WD
2179 If defined, hardware flash sectors protection is used
2180 instead of U-Boot software protection.
2181
6d0f6bcf 2182- CONFIG_SYS_DIRECT_FLASH_TFTP:
c609719b
WD
2183
2184 Enable TFTP transfers directly to flash memory;
2185 without this option such a download has to be
2186 performed in two steps: (1) download to RAM, and (2)
2187 copy from RAM to flash.
2188
2189 The two-step approach is usually more reliable, since
2190 you can check if the download worked before you erase
11ccc33f
MZ
2191 the flash, but in some situations (when system RAM is
2192 too limited to allow for a temporary copy of the
c609719b
WD
2193 downloaded image) this option may be very useful.
2194
6d0f6bcf 2195- CONFIG_SYS_FLASH_CFI:
43d9616c 2196 Define if the flash driver uses extra elements in the
5653fc33
WD
2197 common flash structure for storing flash geometry.
2198
00b1883a 2199- CONFIG_FLASH_CFI_DRIVER
5653fc33
WD
2200 This option also enables the building of the cfi_flash driver
2201 in the drivers directory
c609719b 2202
91809ed5
PZ
2203- CONFIG_FLASH_CFI_MTD
2204 This option enables the building of the cfi_mtd driver
2205 in the drivers directory. The driver exports CFI flash
2206 to the MTD layer.
2207
6d0f6bcf 2208- CONFIG_SYS_FLASH_USE_BUFFER_WRITE
96ef831f
GL
2209 Use buffered writes to flash.
2210
2211- CONFIG_FLASH_SPANSION_S29WS_N
2212 s29ws-n MirrorBit flash has non-standard addresses for buffered
2213 write commands.
2214
6d0f6bcf 2215- CONFIG_SYS_FLASH_QUIET_TEST
5568e613
SR
2216 If this option is defined, the common CFI flash doesn't
2217 print it's warning upon not recognized FLASH banks. This
2218 is useful, if some of the configured banks are only
2219 optionally available.
2220
9a042e9c
JVB
2221- CONFIG_FLASH_SHOW_PROGRESS
2222 If defined (must be an integer), print out countdown
2223 digits and dots. Recommended value: 45 (9..1) for 80
2224 column displays, 15 (3..1) for 40 column displays.
2225
352ef3f1
SR
2226- CONFIG_FLASH_VERIFY
2227 If defined, the content of the flash (destination) is compared
2228 against the source after the write operation. An error message
2229 will be printed when the contents are not identical.
2230 Please note that this option is useless in nearly all cases,
2231 since such flash programming errors usually are detected earlier
2232 while unprotecting/erasing/programming. Please only enable
2233 this option if you really know what you are doing.
2234
6d0f6bcf 2235- CONFIG_SYS_RX_ETH_BUFFER:
11ccc33f
MZ
2236 Defines the number of Ethernet receive buffers. On some
2237 Ethernet controllers it is recommended to set this value
53cf9435
SR
2238 to 8 or even higher (EEPRO100 or 405 EMAC), since all
2239 buffers can be full shortly after enabling the interface
11ccc33f 2240 on high Ethernet traffic.
53cf9435
SR
2241 Defaults to 4 if not defined.
2242
ea882baf
WD
2243- CONFIG_ENV_MAX_ENTRIES
2244
071bc923
WD
2245 Maximum number of entries in the hash table that is used
2246 internally to store the environment settings. The default
2247 setting is supposed to be generous and should work in most
2248 cases. This setting can be used to tune behaviour; see
2249 lib/hashtable.c for details.
ea882baf 2250
2598090b
JH
2251- CONFIG_ENV_FLAGS_LIST_DEFAULT
2252- CONFIG_ENV_FLAGS_LIST_STATIC
1bce2aeb 2253 Enable validation of the values given to environment variables when
2598090b
JH
2254 calling env set. Variables can be restricted to only decimal,
2255 hexadecimal, or boolean. If CONFIG_CMD_NET is also defined,
2256 the variables can also be restricted to IP address or MAC address.
2257
2258 The format of the list is:
2259 type_attribute = [s|d|x|b|i|m]
b445bbb4
JM
2260 access_attribute = [a|r|o|c]
2261 attributes = type_attribute[access_attribute]
2598090b
JH
2262 entry = variable_name[:attributes]
2263 list = entry[,list]
2264
2265 The type attributes are:
2266 s - String (default)
2267 d - Decimal
2268 x - Hexadecimal
2269 b - Boolean ([1yYtT|0nNfF])
2270 i - IP address
2271 m - MAC address
2272
267541f7
JH
2273 The access attributes are:
2274 a - Any (default)
2275 r - Read-only
2276 o - Write-once
2277 c - Change-default
2278
2598090b
JH
2279 - CONFIG_ENV_FLAGS_LIST_DEFAULT
2280 Define this to a list (string) to define the ".flags"
b445bbb4 2281 environment variable in the default or embedded environment.
2598090b
JH
2282
2283 - CONFIG_ENV_FLAGS_LIST_STATIC
2284 Define this to a list (string) to define validation that
2285 should be done if an entry is not found in the ".flags"
2286 environment variable. To override a setting in the static
2287 list, simply add an entry for the same variable name to the
2288 ".flags" variable.
2289
bdf1fe4e
JH
2290 If CONFIG_REGEX is defined, the variable_name above is evaluated as a
2291 regular expression. This allows multiple variables to define the same
2292 flags without explicitly listing them for each variable.
2293
c609719b
WD
2294The following definitions that deal with the placement and management
2295of environment data (variable area); in general, we support the
2296following configurations:
2297
c3eb3fe4
MF
2298- CONFIG_BUILD_ENVCRC:
2299
2300 Builds up envcrc with the target environment so that external utils
2301 may easily extract it and embed it in final U-Boot images.
2302
c609719b 2303BE CAREFUL! The first access to the environment happens quite early
b445bbb4 2304in U-Boot initialization (when we try to get the setting of for the
11ccc33f 2305console baudrate). You *MUST* have mapped your NVRAM area then, or
c609719b
WD
2306U-Boot will hang.
2307
2308Please note that even with NVRAM we still use a copy of the
2309environment in RAM: we could work on NVRAM directly, but we want to
2310keep settings there always unmodified except somebody uses "saveenv"
2311to save the current settings.
2312
0a85a9e7
LG
2313BE CAREFUL! For some special cases, the local device can not use
2314"saveenv" command. For example, the local device will get the
fc54c7fa
LG
2315environment stored in a remote NOR flash by SRIO or PCIE link,
2316but it can not erase, write this NOR flash by SRIO or PCIE interface.
0a85a9e7 2317
b74ab737
GL
2318- CONFIG_NAND_ENV_DST
2319
2320 Defines address in RAM to which the nand_spl code should copy the
2321 environment. If redundant environment is used, it will be copied to
2322 CONFIG_NAND_ENV_DST + CONFIG_ENV_SIZE.
2323
e881cb56 2324Please note that the environment is read-only until the monitor
c609719b 2325has been relocated to RAM and a RAM copy of the environment has been
00caae6d 2326created; also, when using EEPROM you will have to use env_get_f()
c609719b
WD
2327until then to read environment variables.
2328
85ec0bcc
WD
2329The environment is protected by a CRC32 checksum. Before the monitor
2330is relocated into RAM, as a result of a bad CRC you will be working
2331with the compiled-in default environment - *silently*!!! [This is
2332necessary, because the first environment variable we need is the
2333"baudrate" setting for the console - if we have a bad CRC, we don't
2334have any device yet where we could complain.]
c609719b
WD
2335
2336Note: once the monitor has been relocated, then it will complain if
2337the default environment is used; a new CRC is computed as soon as you
85ec0bcc 2338use the "saveenv" command to store a valid environment.
c609719b 2339
6d0f6bcf 2340- CONFIG_SYS_FAULT_ECHO_LINK_DOWN:
42d1f039 2341 Echo the inverted Ethernet link state to the fault LED.
fc3e2165 2342
6d0f6bcf 2343 Note: If this option is active, then CONFIG_SYS_FAULT_MII_ADDR
fc3e2165
WD
2344 also needs to be defined.
2345
6d0f6bcf 2346- CONFIG_SYS_FAULT_MII_ADDR:
42d1f039 2347 MII address of the PHY to check for the Ethernet link state.
c609719b 2348
f5675aa5
RM
2349- CONFIG_NS16550_MIN_FUNCTIONS:
2350 Define this if you desire to only have use of the NS16550_init
2351 and NS16550_putc functions for the serial driver located at
2352 drivers/serial/ns16550.c. This option is useful for saving
2353 space for already greatly restricted images, including but not
2354 limited to NAND_SPL configurations.
2355
b2b92f53
SG
2356- CONFIG_DISPLAY_BOARDINFO
2357 Display information about the board that U-Boot is running on
2358 when U-Boot starts up. The board function checkboard() is called
2359 to do this.
2360
e2e3e2b1
SG
2361- CONFIG_DISPLAY_BOARDINFO_LATE
2362 Similar to the previous option, but display this information
2363 later, once stdio is running and output goes to the LCD, if
2364 present.
2365
feb85801
SS
2366- CONFIG_BOARD_SIZE_LIMIT:
2367 Maximum size of the U-Boot image. When defined, the
2368 build system checks that the actual size does not
2369 exceed it.
2370
c609719b 2371Low Level (hardware related) configuration options:
dc7c9a1a 2372---------------------------------------------------
c609719b 2373
6d0f6bcf 2374- CONFIG_SYS_CACHELINE_SIZE:
c609719b
WD
2375 Cache Line Size of the CPU.
2376
e46fedfe
TT
2377- CONFIG_SYS_CCSRBAR_DEFAULT:
2378 Default (power-on reset) physical address of CCSR on Freescale
2379 PowerPC SOCs.
2380
2381- CONFIG_SYS_CCSRBAR:
2382 Virtual address of CCSR. On a 32-bit build, this is typically
2383 the same value as CONFIG_SYS_CCSRBAR_DEFAULT.
2384
e46fedfe
TT
2385- CONFIG_SYS_CCSRBAR_PHYS:
2386 Physical address of CCSR. CCSR can be relocated to a new
2387 physical address, if desired. In this case, this macro should
c0f40859 2388 be set to that address. Otherwise, it should be set to the
e46fedfe
TT
2389 same value as CONFIG_SYS_CCSRBAR_DEFAULT. For example, CCSR
2390 is typically relocated on 36-bit builds. It is recommended
2391 that this macro be defined via the _HIGH and _LOW macros:
2392
2393 #define CONFIG_SYS_CCSRBAR_PHYS ((CONFIG_SYS_CCSRBAR_PHYS_HIGH
2394 * 1ull) << 32 | CONFIG_SYS_CCSRBAR_PHYS_LOW)
2395
2396- CONFIG_SYS_CCSRBAR_PHYS_HIGH:
4cf2609b
WD
2397 Bits 33-36 of CONFIG_SYS_CCSRBAR_PHYS. This value is typically
2398 either 0 (32-bit build) or 0xF (36-bit build). This macro is
e46fedfe
TT
2399 used in assembly code, so it must not contain typecasts or
2400 integer size suffixes (e.g. "ULL").
2401
2402- CONFIG_SYS_CCSRBAR_PHYS_LOW:
2403 Lower 32-bits of CONFIG_SYS_CCSRBAR_PHYS. This macro is
2404 used in assembly code, so it must not contain typecasts or
2405 integer size suffixes (e.g. "ULL").
2406
2407- CONFIG_SYS_CCSR_DO_NOT_RELOCATE:
2408 If this macro is defined, then CONFIG_SYS_CCSRBAR_PHYS will be
2409 forced to a value that ensures that CCSR is not relocated.
2410
0abddf82
ML
2411- CONFIG_IDE_AHB:
2412 Most IDE controllers were designed to be connected with PCI
2413 interface. Only few of them were designed for AHB interface.
2414 When software is doing ATA command and data transfer to
2415 IDE devices through IDE-AHB controller, some additional
2416 registers accessing to these kind of IDE-AHB controller
b445bbb4 2417 is required.
0abddf82 2418
6d0f6bcf 2419- CONFIG_SYS_IMMR: Physical address of the Internal Memory.
efe2a4d5 2420 DO NOT CHANGE unless you know exactly what you're
907208c4 2421 doing! (11-4) [MPC8xx systems only]
c609719b 2422
6d0f6bcf 2423- CONFIG_SYS_INIT_RAM_ADDR:
c609719b 2424
7152b1d0 2425 Start address of memory area that can be used for
c609719b
WD
2426 initial data and stack; please note that this must be
2427 writable memory that is working WITHOUT special
2428 initialization, i. e. you CANNOT use normal RAM which
2429 will become available only after programming the
2430 memory controller and running certain initialization
2431 sequences.
2432
2433 U-Boot uses the following memory types:
907208c4 2434 - MPC8xx: IMMR (internal memory of the CPU)
c609719b 2435
6d0f6bcf 2436- CONFIG_SYS_GBL_DATA_OFFSET:
c609719b
WD
2437
2438 Offset of the initial data structure in the memory
6d0f6bcf
JCPV
2439 area defined by CONFIG_SYS_INIT_RAM_ADDR. Usually
2440 CONFIG_SYS_GBL_DATA_OFFSET is chosen such that the initial
c609719b 2441 data is located at the end of the available space
553f0982 2442 (sometimes written as (CONFIG_SYS_INIT_RAM_SIZE -
acd51f9d 2443 GENERATED_GBL_DATA_SIZE), and the initial stack is just
6d0f6bcf
JCPV
2444 below that area (growing from (CONFIG_SYS_INIT_RAM_ADDR +
2445 CONFIG_SYS_GBL_DATA_OFFSET) downward.
c609719b
WD
2446
2447 Note:
2448 On the MPC824X (or other systems that use the data
2449 cache for initial memory) the address chosen for
6d0f6bcf 2450 CONFIG_SYS_INIT_RAM_ADDR is basically arbitrary - it must
c609719b
WD
2451 point to an otherwise UNUSED address space between
2452 the top of RAM and the start of the PCI space.
2453
6d0f6bcf 2454- CONFIG_SYS_SCCR: System Clock and reset Control Register (15-27)
c609719b 2455
6d0f6bcf 2456- CONFIG_SYS_OR_TIMING_SDRAM:
c609719b
WD
2457 SDRAM timing
2458
6d0f6bcf 2459- CONFIG_SYS_MAMR_PTA:
c609719b
WD
2460 periodic timer for refresh
2461
a09b9b68
KG
2462- CONFIG_SYS_SRIO:
2463 Chip has SRIO or not
2464
2465- CONFIG_SRIO1:
2466 Board has SRIO 1 port available
2467
2468- CONFIG_SRIO2:
2469 Board has SRIO 2 port available
2470
c8b28152
LG
2471- CONFIG_SRIO_PCIE_BOOT_MASTER
2472 Board can support master function for Boot from SRIO and PCIE
2473
a09b9b68
KG
2474- CONFIG_SYS_SRIOn_MEM_VIRT:
2475 Virtual Address of SRIO port 'n' memory region
2476
62f9b654 2477- CONFIG_SYS_SRIOn_MEM_PHYxS:
a09b9b68
KG
2478 Physical Address of SRIO port 'n' memory region
2479
2480- CONFIG_SYS_SRIOn_MEM_SIZE:
2481 Size of SRIO port 'n' memory region
2482
66bd1846
FE
2483- CONFIG_SYS_NAND_BUSWIDTH_16BIT
2484 Defined to tell the NAND controller that the NAND chip is using
2485 a 16 bit bus.
2486 Not all NAND drivers use this symbol.
a430e916 2487 Example of drivers that use it:
a430fa06
MR
2488 - drivers/mtd/nand/raw/ndfc.c
2489 - drivers/mtd/nand/raw/mxc_nand.c
eced4626
AW
2490
2491- CONFIG_SYS_NDFC_EBC0_CFG
2492 Sets the EBC0_CFG register for the NDFC. If not defined
2493 a default value will be used.
2494
bb99ad6d 2495- CONFIG_SPD_EEPROM
218ca724
WD
2496 Get DDR timing information from an I2C EEPROM. Common
2497 with pluggable memory modules such as SODIMMs
2498
bb99ad6d
BW
2499 SPD_EEPROM_ADDRESS
2500 I2C address of the SPD EEPROM
2501
6d0f6bcf 2502- CONFIG_SYS_SPD_BUS_NUM
218ca724
WD
2503 If SPD EEPROM is on an I2C bus other than the first
2504 one, specify here. Note that the value must resolve
2505 to something your driver can deal with.
bb99ad6d 2506
1b3e3c4f
YS
2507- CONFIG_SYS_DDR_RAW_TIMING
2508 Get DDR timing information from other than SPD. Common with
2509 soldered DDR chips onboard without SPD. DDR raw timing
2510 parameters are extracted from datasheet and hard-coded into
2511 header files or board specific files.
2512
6f5e1dc5
YS
2513- CONFIG_FSL_DDR_INTERACTIVE
2514 Enable interactive DDR debugging. See doc/README.fsl-ddr.
2515
e32d59a2
YS
2516- CONFIG_FSL_DDR_SYNC_REFRESH
2517 Enable sync of refresh for multiple controllers.
2518
4516ff81
YS
2519- CONFIG_FSL_DDR_BIST
2520 Enable built-in memory test for Freescale DDR controllers.
2521
6d0f6bcf 2522- CONFIG_SYS_83XX_DDR_USES_CS0
218ca724
WD
2523 Only for 83xx systems. If specified, then DDR should
2524 be configured using CS0 and CS1 instead of CS2 and CS3.
2ad6b513 2525
c26e454d
WD
2526- CONFIG_RMII
2527 Enable RMII mode for all FECs.
2528 Note that this is a global option, we can't
2529 have one FEC in standard MII mode and another in RMII mode.
2530
5cf91d6b
WD
2531- CONFIG_CRC32_VERIFY
2532 Add a verify option to the crc32 command.
2533 The syntax is:
2534
2535 => crc32 -v <address> <count> <crc32>
2536
2537 Where address/count indicate a memory area
2538 and crc32 is the correct crc32 which the
2539 area should have.
2540
56523f12
WD
2541- CONFIG_LOOPW
2542 Add the "loopw" memory command. This only takes effect if
493f420e 2543 the memory commands are activated globally (CONFIG_CMD_MEMORY).
56523f12 2544
72732318 2545- CONFIG_CMD_MX_CYCLIC
7b466641
SR
2546 Add the "mdc" and "mwc" memory commands. These are cyclic
2547 "md/mw" commands.
2548 Examples:
2549
efe2a4d5 2550 => mdc.b 10 4 500
7b466641
SR
2551 This command will print 4 bytes (10,11,12,13) each 500 ms.
2552
efe2a4d5 2553 => mwc.l 100 12345678 10
7b466641
SR
2554 This command will write 12345678 to address 100 all 10 ms.
2555
efe2a4d5 2556 This only takes effect if the memory commands are activated
493f420e 2557 globally (CONFIG_CMD_MEMORY).
7b466641 2558
401bb30b 2559- CONFIG_SPL_BUILD
32f2ca2a
TH
2560 Set when the currently-running compilation is for an artifact
2561 that will end up in the SPL (as opposed to the TPL or U-Boot
2562 proper). Code that needs stage-specific behavior should check
2563 this.
400558b5 2564
3aa29de0 2565- CONFIG_TPL_BUILD
32f2ca2a
TH
2566 Set when the currently-running compilation is for an artifact
2567 that will end up in the TPL (as opposed to the SPL or U-Boot
2568 proper). Code that needs stage-specific behavior should check
2569 this.
3aa29de0 2570
5df572f0
YZ
2571- CONFIG_SYS_MPC85XX_NO_RESETVEC
2572 Only for 85xx systems. If this variable is specified, the section
2573 .resetvec is not kept and the section .bootpg is placed in the
2574 previous 4k of the .text section.
2575
4213fc29
SG
2576- CONFIG_ARCH_MAP_SYSMEM
2577 Generally U-Boot (and in particular the md command) uses
2578 effective address. It is therefore not necessary to regard
2579 U-Boot address as virtual addresses that need to be translated
2580 to physical addresses. However, sandbox requires this, since
2581 it maintains its own little RAM buffer which contains all
2582 addressable memory. This option causes some memory accesses
2583 to be mapped through map_sysmem() / unmap_sysmem().
2584
588a13f7
SG
2585- CONFIG_X86_RESET_VECTOR
2586 If defined, the x86 reset vector code is included. This is not
2587 needed when U-Boot is running from Coreboot.
b16f521a 2588
999d7d32
KM
2589- CONFIG_SYS_NAND_NO_SUBPAGE_WRITE
2590 Option to disable subpage write in NAND driver
2591 driver that uses this:
a430fa06 2592 drivers/mtd/nand/raw/davinci_nand.c
999d7d32 2593
f2717b47
TT
2594Freescale QE/FMAN Firmware Support:
2595-----------------------------------
2596
2597The Freescale QUICCEngine (QE) and Frame Manager (FMAN) both support the
2598loading of "firmware", which is encoded in the QE firmware binary format.
2599This firmware often needs to be loaded during U-Boot booting, so macros
2600are used to identify the storage device (NOR flash, SPI, etc) and the address
2601within that device.
2602
dcf1d774
ZQ
2603- CONFIG_SYS_FMAN_FW_ADDR
2604 The address in the storage device where the FMAN microcode is located. The
cc1e98b5 2605 meaning of this address depends on which CONFIG_SYS_QE_FMAN_FW_IN_xxx macro
dcf1d774
ZQ
2606 is also specified.
2607
2608- CONFIG_SYS_QE_FW_ADDR
2609 The address in the storage device where the QE microcode is located. The
cc1e98b5 2610 meaning of this address depends on which CONFIG_SYS_QE_FMAN_FW_IN_xxx macro
f2717b47
TT
2611 is also specified.
2612
2613- CONFIG_SYS_QE_FMAN_FW_LENGTH
2614 The maximum possible size of the firmware. The firmware binary format
2615 has a field that specifies the actual size of the firmware, but it
2616 might not be possible to read any part of the firmware unless some
2617 local storage is allocated to hold the entire firmware first.
2618
2619- CONFIG_SYS_QE_FMAN_FW_IN_NOR
2620 Specifies that QE/FMAN firmware is located in NOR flash, mapped as
2621 normal addressable memory via the LBC. CONFIG_SYS_FMAN_FW_ADDR is the
2622 virtual address in NOR flash.
2623
2624- CONFIG_SYS_QE_FMAN_FW_IN_NAND
2625 Specifies that QE/FMAN firmware is located in NAND flash.
2626 CONFIG_SYS_FMAN_FW_ADDR is the offset within NAND flash.
2627
2628- CONFIG_SYS_QE_FMAN_FW_IN_MMC
2629 Specifies that QE/FMAN firmware is located on the primary SD/MMC
2630 device. CONFIG_SYS_FMAN_FW_ADDR is the byte offset on that device.
2631
292dc6c5
LG
2632- CONFIG_SYS_QE_FMAN_FW_IN_REMOTE
2633 Specifies that QE/FMAN firmware is located in the remote (master)
2634 memory space. CONFIG_SYS_FMAN_FW_ADDR is a virtual address which
fc54c7fa
LG
2635 can be mapped from slave TLB->slave LAW->slave SRIO or PCIE outbound
2636 window->master inbound window->master LAW->the ucode address in
2637 master's memory space.
f2717b47 2638
b940ca64
GR
2639Freescale Layerscape Management Complex Firmware Support:
2640---------------------------------------------------------
2641The Freescale Layerscape Management Complex (MC) supports the loading of
2642"firmware".
2643This firmware often needs to be loaded during U-Boot booting, so macros
2644are used to identify the storage device (NOR flash, SPI, etc) and the address
2645within that device.
2646
2647- CONFIG_FSL_MC_ENET
2648 Enable the MC driver for Layerscape SoCs.
2649
5c055089
PK
2650Freescale Layerscape Debug Server Support:
2651-------------------------------------------
2652The Freescale Layerscape Debug Server Support supports the loading of
2653"Debug Server firmware" and triggering SP boot-rom.
2654This firmware often needs to be loaded during U-Boot booting.
2655
c0492141
YS
2656- CONFIG_SYS_MC_RSV_MEM_ALIGN
2657 Define alignment of reserved memory MC requires
5c055089 2658
f3f431a7
PK
2659Reproducible builds
2660-------------------
2661
2662In order to achieve reproducible builds, timestamps used in the U-Boot build
2663process have to be set to a fixed value.
2664
2665This is done using the SOURCE_DATE_EPOCH environment variable.
2666SOURCE_DATE_EPOCH is to be set on the build host's shell, not as a configuration
2667option for U-Boot or an environment variable in U-Boot.
2668
2669SOURCE_DATE_EPOCH should be set to a number of seconds since the epoch, in UTC.
2670
c609719b
WD
2671Building the Software:
2672======================
2673
218ca724
WD
2674Building U-Boot has been tested in several native build environments
2675and in many different cross environments. Of course we cannot support
2676all possibly existing versions of cross development tools in all
2677(potentially obsolete) versions. In case of tool chain problems we
047f6ec0 2678recommend to use the ELDK (see https://www.denx.de/wiki/DULG/ELDK)
218ca724 2679which is extensively used to build and test U-Boot.
c609719b 2680
218ca724
WD
2681If you are not using a native environment, it is assumed that you
2682have GNU cross compiling tools available in your path. In this case,
2683you must set the environment variable CROSS_COMPILE in your shell.
2684Note that no changes to the Makefile or any other source files are
2685necessary. For example using the ELDK on a 4xx CPU, please enter:
c609719b 2686
218ca724
WD
2687 $ CROSS_COMPILE=ppc_4xx-
2688 $ export CROSS_COMPILE
c609719b 2689
218ca724
WD
2690U-Boot is intended to be simple to build. After installing the
2691sources you must configure U-Boot for one specific board type. This
c609719b
WD
2692is done by typing:
2693
ab584d67 2694 make NAME_defconfig
c609719b 2695
ab584d67 2696where "NAME_defconfig" is the name of one of the existing configu-
ecb3a0a1 2697rations; see configs/*_defconfig for supported names.
db01a2ea 2698
ecb3a0a1 2699Note: for some boards special configuration names may exist; check if
2729af9d
WD
2700 additional information is available from the board vendor; for
2701 instance, the TQM823L systems are available without (standard)
2702 or with LCD support. You can select such additional "features"
11ccc33f 2703 when choosing the configuration, i. e.
2729af9d 2704
ab584d67 2705 make TQM823L_defconfig
2729af9d
WD
2706 - will configure for a plain TQM823L, i. e. no LCD support
2707
ab584d67 2708 make TQM823L_LCD_defconfig
2729af9d
WD
2709 - will configure for a TQM823L with U-Boot console on LCD
2710
2711 etc.
2712
2713
2714Finally, type "make all", and you should get some working U-Boot
2715images ready for download to / installation on your system:
2716
2717- "u-boot.bin" is a raw binary image
2718- "u-boot" is an image in ELF binary format
2719- "u-boot.srec" is in Motorola S-Record format
2720
baf31249
MB
2721By default the build is performed locally and the objects are saved
2722in the source directory. One of the two methods can be used to change
2723this behavior and build U-Boot to some external directory:
2724
27251. Add O= to the make command line invocations:
2726
2727 make O=/tmp/build distclean
ab584d67 2728 make O=/tmp/build NAME_defconfig
baf31249
MB
2729 make O=/tmp/build all
2730
adbba996 27312. Set environment variable KBUILD_OUTPUT to point to the desired location:
baf31249 2732
adbba996 2733 export KBUILD_OUTPUT=/tmp/build
baf31249 2734 make distclean
ab584d67 2735 make NAME_defconfig
baf31249
MB
2736 make all
2737
adbba996 2738Note that the command line "O=" setting overrides the KBUILD_OUTPUT environment
baf31249
MB
2739variable.
2740
215bb1c1
DS
2741User specific CPPFLAGS, AFLAGS and CFLAGS can be passed to the compiler by
2742setting the according environment variables KCPPFLAGS, KAFLAGS and KCFLAGS.
2743For example to treat all compiler warnings as errors:
2744
2745 make KCFLAGS=-Werror
2729af9d
WD
2746
2747Please be aware that the Makefiles assume you are using GNU make, so
2748for instance on NetBSD you might need to use "gmake" instead of
2749native "make".
2750
2751
2752If the system board that you have is not listed, then you will need
2753to port U-Boot to your hardware platform. To do this, follow these
2754steps:
2755
3c1496cd 27561. Create a new directory to hold your board specific code. Add any
2729af9d 2757 files you need. In your board directory, you will need at least
3c1496cd
PS
2758 the "Makefile" and a "<board>.c".
27592. Create a new configuration file "include/configs/<board>.h" for
2760 your board.
2729af9d
WD
27613. If you're porting U-Boot to a new CPU, then also create a new
2762 directory to hold your CPU specific code. Add any files you need.
ab584d67 27634. Run "make <board>_defconfig" with your new name.
2729af9d
WD
27645. Type "make", and you should get a working "u-boot.srec" file
2765 to be installed on your target system.
27666. Debug and solve any problems that might arise.
2767 [Of course, this last step is much harder than it sounds.]
2768
2769
2770Testing of U-Boot Modifications, Ports to New Hardware, etc.:
2771==============================================================
2772
218ca724
WD
2773If you have modified U-Boot sources (for instance added a new board
2774or support for new devices, a new CPU, etc.) you are expected to
2729af9d 2775provide feedback to the other developers. The feedback normally takes
32f2ca2a 2776the form of a "patch", i.e. a context diff against a certain (latest
218ca724 2777official or latest in the git repository) version of U-Boot sources.
2729af9d 2778
218ca724
WD
2779But before you submit such a patch, please verify that your modifi-
2780cation did not break existing code. At least make sure that *ALL* of
2729af9d 2781the supported boards compile WITHOUT ANY compiler warnings. To do so,
6de80f21
SG
2782just run the buildman script (tools/buildman/buildman), which will
2783configure and build U-Boot for ALL supported system. Be warned, this
2784will take a while. Please see the buildman README, or run 'buildman -H'
2785for documentation.
baf31249
MB
2786
2787
2729af9d
WD
2788See also "U-Boot Porting Guide" below.
2789
2790
2791Monitor Commands - Overview:
2792============================
2793
2794go - start application at address 'addr'
2795run - run commands in an environment variable
2796bootm - boot application image from memory
2797bootp - boot image via network using BootP/TFTP protocol
44f074c7 2798bootz - boot zImage from memory
2729af9d
WD
2799tftpboot- boot image via network using TFTP protocol
2800 and env variables "ipaddr" and "serverip"
2801 (and eventually "gatewayip")
1fb7cd49 2802tftpput - upload a file via network using TFTP protocol
2729af9d
WD
2803rarpboot- boot image via network using RARP/TFTP protocol
2804diskboot- boot from IDE devicebootd - boot default, i.e., run 'bootcmd'
2805loads - load S-Record file over serial line
2806loadb - load binary file over serial line (kermit mode)
2807md - memory display
2808mm - memory modify (auto-incrementing)
2809nm - memory modify (constant address)
2810mw - memory write (fill)
bdded201 2811ms - memory search
2729af9d
WD
2812cp - memory copy
2813cmp - memory compare
2814crc32 - checksum calculation
0f89c54b 2815i2c - I2C sub-system
2729af9d
WD
2816sspi - SPI utility commands
2817base - print or set address offset
2818printenv- print environment variables
9e9a530a 2819pwm - control pwm channels
2729af9d
WD
2820setenv - set environment variables
2821saveenv - save environment variables to persistent storage
2822protect - enable or disable FLASH write protection
2823erase - erase FLASH memory
2824flinfo - print FLASH memory information
10635afa 2825nand - NAND memory operations (see doc/README.nand)
2729af9d
WD
2826bdinfo - print Board Info structure
2827iminfo - print header information for application image
2828coninfo - print console devices and informations
2829ide - IDE sub-system
2830loop - infinite loop on address range
56523f12 2831loopw - infinite write loop on address range
2729af9d
WD
2832mtest - simple RAM test
2833icache - enable or disable instruction cache
2834dcache - enable or disable data cache
2835reset - Perform RESET of the CPU
2836echo - echo args to console
2837version - print monitor version
2838help - print online help
2839? - alias for 'help'
2840
2841
2842Monitor Commands - Detailed Description:
2843========================================
2844
2845TODO.
2846
2847For now: just type "help <command>".
2848
2849
2729af9d
WD
2850Note for Redundant Ethernet Interfaces:
2851=======================================
c609719b 2852
11ccc33f 2853Some boards come with redundant Ethernet interfaces; U-Boot supports
2729af9d
WD
2854such configurations and is capable of automatic selection of a
2855"working" interface when needed. MAC assignment works as follows:
c609719b 2856
2729af9d
WD
2857Network interfaces are numbered eth0, eth1, eth2, ... Corresponding
2858MAC addresses can be stored in the environment as "ethaddr" (=>eth0),
2859"eth1addr" (=>eth1), "eth2addr", ...
c609719b 2860
2729af9d
WD
2861If the network interface stores some valid MAC address (for instance
2862in SROM), this is used as default address if there is NO correspon-
2863ding setting in the environment; if the corresponding environment
2864variable is set, this overrides the settings in the card; that means:
c609719b 2865
2729af9d
WD
2866o If the SROM has a valid MAC address, and there is no address in the
2867 environment, the SROM's address is used.
c609719b 2868
2729af9d
WD
2869o If there is no valid address in the SROM, and a definition in the
2870 environment exists, then the value from the environment variable is
2871 used.
c609719b 2872
2729af9d
WD
2873o If both the SROM and the environment contain a MAC address, and
2874 both addresses are the same, this MAC address is used.
c609719b 2875
2729af9d
WD
2876o If both the SROM and the environment contain a MAC address, and the
2877 addresses differ, the value from the environment is used and a
2878 warning is printed.
c609719b 2879
2729af9d 2880o If neither SROM nor the environment contain a MAC address, an error
bef1014b
JH
2881 is raised. If CONFIG_NET_RANDOM_ETHADDR is defined, then in this case
2882 a random, locally-assigned MAC is used.
c609719b 2883
ecee9324 2884If Ethernet drivers implement the 'write_hwaddr' function, valid MAC addresses
c0f40859 2885will be programmed into hardware as part of the initialization process. This
ecee9324
BW
2886may be skipped by setting the appropriate 'ethmacskip' environment variable.
2887The naming convention is as follows:
2888"ethmacskip" (=>eth0), "eth1macskip" (=>eth1) etc.
c609719b 2889
2729af9d
WD
2890Image Formats:
2891==============
c609719b 2892
3310c549
MB
2893U-Boot is capable of booting (and performing other auxiliary operations on)
2894images in two formats:
2895
2896New uImage format (FIT)
2897-----------------------
2898
2899Flexible and powerful format based on Flattened Image Tree -- FIT (similar
2900to Flattened Device Tree). It allows the use of images with multiple
2901components (several kernels, ramdisks, etc.), with contents protected by
2902SHA1, MD5 or CRC32. More details are found in the doc/uImage.FIT directory.
2903
2904
2905Old uImage format
2906-----------------
2907
2908Old image format is based on binary files which can be basically anything,
2909preceded by a special header; see the definitions in include/image.h for
2910details; basically, the header defines the following image properties:
c609719b 2911
2729af9d
WD
2912* Target Operating System (Provisions for OpenBSD, NetBSD, FreeBSD,
2913 4.4BSD, Linux, SVR4, Esix, Solaris, Irix, SCO, Dell, NCR, VxWorks,
f5ed9e39
PT
2914 LynxOS, pSOS, QNX, RTEMS, INTEGRITY;
2915 Currently supported: Linux, NetBSD, VxWorks, QNX, RTEMS, LynxOS,
2916 INTEGRITY).
daab59ac 2917* Target CPU Architecture (Provisions for Alpha, ARM, Intel x86,
afc1ce82 2918 IA64, MIPS, NDS32, Nios II, PowerPC, IBM S390, SuperH, Sparc, Sparc 64 Bit;
daab59ac 2919 Currently supported: ARM, Intel x86, MIPS, NDS32, Nios II, PowerPC).
2729af9d
WD
2920* Compression Type (uncompressed, gzip, bzip2)
2921* Load Address
2922* Entry Point
2923* Image Name
2924* Image Timestamp
c609719b 2925
2729af9d
WD
2926The header is marked by a special Magic Number, and both the header
2927and the data portions of the image are secured against corruption by
2928CRC32 checksums.
c609719b
WD
2929
2930
2729af9d
WD
2931Linux Support:
2932==============
c609719b 2933
2729af9d
WD
2934Although U-Boot should support any OS or standalone application
2935easily, the main focus has always been on Linux during the design of
2936U-Boot.
c609719b 2937
2729af9d
WD
2938U-Boot includes many features that so far have been part of some
2939special "boot loader" code within the Linux kernel. Also, any
2940"initrd" images to be used are no longer part of one big Linux image;
2941instead, kernel and "initrd" are separate images. This implementation
2942serves several purposes:
c609719b 2943
2729af9d
WD
2944- the same features can be used for other OS or standalone
2945 applications (for instance: using compressed images to reduce the
2946 Flash memory footprint)
c609719b 2947
2729af9d
WD
2948- it becomes much easier to port new Linux kernel versions because
2949 lots of low-level, hardware dependent stuff are done by U-Boot
c609719b 2950
2729af9d
WD
2951- the same Linux kernel image can now be used with different "initrd"
2952 images; of course this also means that different kernel images can
2953 be run with the same "initrd". This makes testing easier (you don't
2954 have to build a new "zImage.initrd" Linux image when you just
2955 change a file in your "initrd"). Also, a field-upgrade of the
2956 software is easier now.
c609719b 2957
c609719b 2958
2729af9d
WD
2959Linux HOWTO:
2960============
c609719b 2961
2729af9d
WD
2962Porting Linux to U-Boot based systems:
2963---------------------------------------
c609719b 2964
2729af9d
WD
2965U-Boot cannot save you from doing all the necessary modifications to
2966configure the Linux device drivers for use with your target hardware
2967(no, we don't intend to provide a full virtual machine interface to
2968Linux :-).
c609719b 2969
a47a12be 2970But now you can ignore ALL boot loader code (in arch/powerpc/mbxboot).
24ee89b9 2971
2729af9d
WD
2972Just make sure your machine specific header file (for instance
2973include/asm-ppc/tqm8xx.h) includes the same definition of the Board
1dc30693
MH
2974Information structure as we define in include/asm-<arch>/u-boot.h,
2975and make sure that your definition of IMAP_ADDR uses the same value
6d0f6bcf 2976as your U-Boot configuration in CONFIG_SYS_IMMR.
24ee89b9 2977
2eb31b13
SG
2978Note that U-Boot now has a driver model, a unified model for drivers.
2979If you are adding a new driver, plumb it into driver model. If there
2980is no uclass available, you are encouraged to create one. See
2981doc/driver-model.
2982
c609719b 2983
2729af9d
WD
2984Configuring the Linux kernel:
2985-----------------------------
c609719b 2986
2729af9d
WD
2987No specific requirements for U-Boot. Make sure you have some root
2988device (initial ramdisk, NFS) for your target system.
2989
2990
2991Building a Linux Image:
2992-----------------------
c609719b 2993
2729af9d
WD
2994With U-Boot, "normal" build targets like "zImage" or "bzImage" are
2995not used. If you use recent kernel source, a new build target
2996"uImage" will exist which automatically builds an image usable by
2997U-Boot. Most older kernels also have support for a "pImage" target,
2998which was introduced for our predecessor project PPCBoot and uses a
2999100% compatible format.
3000
3001Example:
3002
ab584d67 3003 make TQM850L_defconfig
2729af9d
WD
3004 make oldconfig
3005 make dep
3006 make uImage
3007
3008The "uImage" build target uses a special tool (in 'tools/mkimage') to
3009encapsulate a compressed Linux kernel image with header information,
3010CRC32 checksum etc. for use with U-Boot. This is what we are doing:
3011
3012* build a standard "vmlinux" kernel image (in ELF binary format):
3013
3014* convert the kernel into a raw binary image:
3015
3016 ${CROSS_COMPILE}-objcopy -O binary \
3017 -R .note -R .comment \
3018 -S vmlinux linux.bin
3019
3020* compress the binary image:
3021
3022 gzip -9 linux.bin
3023
3024* package compressed binary image for U-Boot:
3025
3026 mkimage -A ppc -O linux -T kernel -C gzip \
3027 -a 0 -e 0 -n "Linux Kernel Image" \
3028 -d linux.bin.gz uImage
c609719b 3029
c609719b 3030
2729af9d
WD
3031The "mkimage" tool can also be used to create ramdisk images for use
3032with U-Boot, either separated from the Linux kernel image, or
3033combined into one file. "mkimage" encapsulates the images with a 64
3034byte header containing information about target architecture,
3035operating system, image type, compression method, entry points, time
3036stamp, CRC32 checksums, etc.
3037
3038"mkimage" can be called in two ways: to verify existing images and
3039print the header information, or to build new images.
3040
3041In the first form (with "-l" option) mkimage lists the information
3042contained in the header of an existing U-Boot image; this includes
3043checksum verification:
c609719b 3044
2729af9d
WD
3045 tools/mkimage -l image
3046 -l ==> list image header information
3047
3048The second form (with "-d" option) is used to build a U-Boot image
3049from a "data file" which is used as image payload:
3050
3051 tools/mkimage -A arch -O os -T type -C comp -a addr -e ep \
3052 -n name -d data_file image
3053 -A ==> set architecture to 'arch'
3054 -O ==> set operating system to 'os'
3055 -T ==> set image type to 'type'
3056 -C ==> set compression type 'comp'
3057 -a ==> set load address to 'addr' (hex)
3058 -e ==> set entry point to 'ep' (hex)
3059 -n ==> set image name to 'name'
3060 -d ==> use image data from 'datafile'
3061
69459791
WD
3062Right now, all Linux kernels for PowerPC systems use the same load
3063address (0x00000000), but the entry point address depends on the
3064kernel version:
2729af9d
WD
3065
3066- 2.2.x kernels have the entry point at 0x0000000C,
3067- 2.3.x and later kernels have the entry point at 0x00000000.
3068
3069So a typical call to build a U-Boot image would read:
3070
3071 -> tools/mkimage -n '2.4.4 kernel for TQM850L' \
3072 > -A ppc -O linux -T kernel -C gzip -a 0 -e 0 \
a47a12be 3073 > -d /opt/elsk/ppc_8xx/usr/src/linux-2.4.4/arch/powerpc/coffboot/vmlinux.gz \
2729af9d
WD
3074 > examples/uImage.TQM850L
3075 Image Name: 2.4.4 kernel for TQM850L
3076 Created: Wed Jul 19 02:34:59 2000
3077 Image Type: PowerPC Linux Kernel Image (gzip compressed)
3078 Data Size: 335725 Bytes = 327.86 kB = 0.32 MB
3079 Load Address: 0x00000000
3080 Entry Point: 0x00000000
3081
3082To verify the contents of the image (or check for corruption):
3083
3084 -> tools/mkimage -l examples/uImage.TQM850L
3085 Image Name: 2.4.4 kernel for TQM850L
3086 Created: Wed Jul 19 02:34:59 2000
3087 Image Type: PowerPC Linux Kernel Image (gzip compressed)
3088 Data Size: 335725 Bytes = 327.86 kB = 0.32 MB
3089 Load Address: 0x00000000
3090 Entry Point: 0x00000000
3091
3092NOTE: for embedded systems where boot time is critical you can trade
3093speed for memory and install an UNCOMPRESSED image instead: this
3094needs more space in Flash, but boots much faster since it does not
3095need to be uncompressed:
3096
a47a12be 3097 -> gunzip /opt/elsk/ppc_8xx/usr/src/linux-2.4.4/arch/powerpc/coffboot/vmlinux.gz
2729af9d
WD
3098 -> tools/mkimage -n '2.4.4 kernel for TQM850L' \
3099 > -A ppc -O linux -T kernel -C none -a 0 -e 0 \
a47a12be 3100 > -d /opt/elsk/ppc_8xx/usr/src/linux-2.4.4/arch/powerpc/coffboot/vmlinux \
2729af9d
WD
3101 > examples/uImage.TQM850L-uncompressed
3102 Image Name: 2.4.4 kernel for TQM850L
3103 Created: Wed Jul 19 02:34:59 2000
3104 Image Type: PowerPC Linux Kernel Image (uncompressed)
3105 Data Size: 792160 Bytes = 773.59 kB = 0.76 MB
3106 Load Address: 0x00000000
3107 Entry Point: 0x00000000
3108
3109
3110Similar you can build U-Boot images from a 'ramdisk.image.gz' file
3111when your kernel is intended to use an initial ramdisk:
3112
3113 -> tools/mkimage -n 'Simple Ramdisk Image' \
3114 > -A ppc -O linux -T ramdisk -C gzip \
3115 > -d /LinuxPPC/images/SIMPLE-ramdisk.image.gz examples/simple-initrd
3116 Image Name: Simple Ramdisk Image
3117 Created: Wed Jan 12 14:01:50 2000
3118 Image Type: PowerPC Linux RAMDisk Image (gzip compressed)
3119 Data Size: 566530 Bytes = 553.25 kB = 0.54 MB
3120 Load Address: 0x00000000
3121 Entry Point: 0x00000000
3122
e157a111
TH
3123The "dumpimage" tool can be used to disassemble or list the contents of images
3124built by mkimage. See dumpimage's help output (-h) for details.
2729af9d
WD
3125
3126Installing a Linux Image:
3127-------------------------
3128
3129To downloading a U-Boot image over the serial (console) interface,
3130you must convert the image to S-Record format:
3131
3132 objcopy -I binary -O srec examples/image examples/image.srec
3133
3134The 'objcopy' does not understand the information in the U-Boot
3135image header, so the resulting S-Record file will be relative to
3136address 0x00000000. To load it to a given address, you need to
3137specify the target address as 'offset' parameter with the 'loads'
3138command.
3139
3140Example: install the image to address 0x40100000 (which on the
3141TQM8xxL is in the first Flash bank):
3142
3143 => erase 40100000 401FFFFF
3144
3145 .......... done
3146 Erased 8 sectors
3147
3148 => loads 40100000
3149 ## Ready for S-Record download ...
3150 ~>examples/image.srec
3151 1 2 3 4 5 6 7 8 9 10 11 12 13 ...
3152 ...
3153 15989 15990 15991 15992
3154 [file transfer complete]
3155 [connected]
3156 ## Start Addr = 0x00000000
3157
3158
3159You can check the success of the download using the 'iminfo' command;
218ca724 3160this includes a checksum verification so you can be sure no data
2729af9d
WD
3161corruption happened:
3162
3163 => imi 40100000
3164
3165 ## Checking Image at 40100000 ...
3166 Image Name: 2.2.13 for initrd on TQM850L
3167 Image Type: PowerPC Linux Kernel Image (gzip compressed)
3168 Data Size: 335725 Bytes = 327 kB = 0 MB
3169 Load Address: 00000000
3170 Entry Point: 0000000c
3171 Verifying Checksum ... OK
3172
3173
3174Boot Linux:
3175-----------
3176
3177The "bootm" command is used to boot an application that is stored in
3178memory (RAM or Flash). In case of a Linux kernel image, the contents
3179of the "bootargs" environment variable is passed to the kernel as
3180parameters. You can check and modify this variable using the
3181"printenv" and "setenv" commands:
3182
3183
3184 => printenv bootargs
3185 bootargs=root=/dev/ram
3186
3187 => setenv bootargs root=/dev/nfs rw nfsroot=10.0.0.2:/LinuxPPC nfsaddrs=10.0.0.99:10.0.0.2
3188
3189 => printenv bootargs
3190 bootargs=root=/dev/nfs rw nfsroot=10.0.0.2:/LinuxPPC nfsaddrs=10.0.0.99:10.0.0.2
3191
3192 => bootm 40020000
3193 ## Booting Linux kernel at 40020000 ...
3194 Image Name: 2.2.13 for NFS on TQM850L
3195 Image Type: PowerPC Linux Kernel Image (gzip compressed)
3196 Data Size: 381681 Bytes = 372 kB = 0 MB
3197 Load Address: 00000000
3198 Entry Point: 0000000c
3199 Verifying Checksum ... OK
3200 Uncompressing Kernel Image ... OK
3201 Linux version 2.2.13 (wd@denx.local.net) (gcc version 2.95.2 19991024 (release)) #1 Wed Jul 19 02:35:17 MEST 2000
3202 Boot arguments: root=/dev/nfs rw nfsroot=10.0.0.2:/LinuxPPC nfsaddrs=10.0.0.99:10.0.0.2
3203 time_init: decrementer frequency = 187500000/60
3204 Calibrating delay loop... 49.77 BogoMIPS
3205 Memory: 15208k available (700k kernel code, 444k data, 32k init) [c0000000,c1000000]
3206 ...
3207
11ccc33f 3208If you want to boot a Linux kernel with initial RAM disk, you pass
2729af9d
WD
3209the memory addresses of both the kernel and the initrd image (PPBCOOT
3210format!) to the "bootm" command:
3211
3212 => imi 40100000 40200000
3213
3214 ## Checking Image at 40100000 ...
3215 Image Name: 2.2.13 for initrd on TQM850L
3216 Image Type: PowerPC Linux Kernel Image (gzip compressed)
3217 Data Size: 335725 Bytes = 327 kB = 0 MB
3218 Load Address: 00000000
3219 Entry Point: 0000000c
3220 Verifying Checksum ... OK
3221
3222 ## Checking Image at 40200000 ...
3223 Image Name: Simple Ramdisk Image
3224 Image Type: PowerPC Linux RAMDisk Image (gzip compressed)
3225 Data Size: 566530 Bytes = 553 kB = 0 MB
3226 Load Address: 00000000
3227 Entry Point: 00000000
3228 Verifying Checksum ... OK
3229
3230 => bootm 40100000 40200000
3231 ## Booting Linux kernel at 40100000 ...
3232 Image Name: 2.2.13 for initrd on TQM850L
3233 Image Type: PowerPC Linux Kernel Image (gzip compressed)
3234 Data Size: 335725 Bytes = 327 kB = 0 MB
3235 Load Address: 00000000
3236 Entry Point: 0000000c
3237 Verifying Checksum ... OK
3238 Uncompressing Kernel Image ... OK
3239 ## Loading RAMDisk Image at 40200000 ...
3240 Image Name: Simple Ramdisk Image
3241 Image Type: PowerPC Linux RAMDisk Image (gzip compressed)
3242 Data Size: 566530 Bytes = 553 kB = 0 MB
3243 Load Address: 00000000
3244 Entry Point: 00000000
3245 Verifying Checksum ... OK
3246 Loading Ramdisk ... OK
3247 Linux version 2.2.13 (wd@denx.local.net) (gcc version 2.95.2 19991024 (release)) #1 Wed Jul 19 02:32:08 MEST 2000
3248 Boot arguments: root=/dev/ram
3249 time_init: decrementer frequency = 187500000/60
3250 Calibrating delay loop... 49.77 BogoMIPS
3251 ...
3252 RAMDISK: Compressed image found at block 0
3253 VFS: Mounted root (ext2 filesystem).
3254
3255 bash#
3256
0267768e
MM
3257Boot Linux and pass a flat device tree:
3258-----------
3259
3260First, U-Boot must be compiled with the appropriate defines. See the section
3261titled "Linux Kernel Interface" above for a more in depth explanation. The
3262following is an example of how to start a kernel and pass an updated
3263flat device tree:
3264
3265=> print oftaddr
3266oftaddr=0x300000
3267=> print oft
3268oft=oftrees/mpc8540ads.dtb
3269=> tftp $oftaddr $oft
3270Speed: 1000, full duplex
3271Using TSEC0 device
3272TFTP from server 192.168.1.1; our IP address is 192.168.1.101
3273Filename 'oftrees/mpc8540ads.dtb'.
3274Load address: 0x300000
3275Loading: #
3276done
3277Bytes transferred = 4106 (100a hex)
3278=> tftp $loadaddr $bootfile
3279Speed: 1000, full duplex
3280Using TSEC0 device
3281TFTP from server 192.168.1.1; our IP address is 192.168.1.2
3282Filename 'uImage'.
3283Load address: 0x200000
3284Loading:############
3285done
3286Bytes transferred = 1029407 (fb51f hex)
3287=> print loadaddr
3288loadaddr=200000
3289=> print oftaddr
3290oftaddr=0x300000
3291=> bootm $loadaddr - $oftaddr
3292## Booting image at 00200000 ...
a9398e01
WD
3293 Image Name: Linux-2.6.17-dirty
3294 Image Type: PowerPC Linux Kernel Image (gzip compressed)
3295 Data Size: 1029343 Bytes = 1005.2 kB
0267768e 3296 Load Address: 00000000
a9398e01 3297 Entry Point: 00000000
0267768e
MM
3298 Verifying Checksum ... OK
3299 Uncompressing Kernel Image ... OK
3300Booting using flat device tree at 0x300000
3301Using MPC85xx ADS machine description
3302Memory CAM mapping: CAM0=256Mb, CAM1=256Mb, CAM2=0Mb residual: 0Mb
3303[snip]
3304
3305
2729af9d
WD
3306More About U-Boot Image Types:
3307------------------------------
3308
3309U-Boot supports the following image types:
3310
3311 "Standalone Programs" are directly runnable in the environment
3312 provided by U-Boot; it is expected that (if they behave
3313 well) you can continue to work in U-Boot after return from
3314 the Standalone Program.
3315 "OS Kernel Images" are usually images of some Embedded OS which
3316 will take over control completely. Usually these programs
3317 will install their own set of exception handlers, device
3318 drivers, set up the MMU, etc. - this means, that you cannot
3319 expect to re-enter U-Boot except by resetting the CPU.
3320 "RAMDisk Images" are more or less just data blocks, and their
3321 parameters (address, size) are passed to an OS kernel that is
3322 being started.
3323 "Multi-File Images" contain several images, typically an OS
3324 (Linux) kernel image and one or more data images like
3325 RAMDisks. This construct is useful for instance when you want
3326 to boot over the network using BOOTP etc., where the boot
3327 server provides just a single image file, but you want to get
3328 for instance an OS kernel and a RAMDisk image.
3329
3330 "Multi-File Images" start with a list of image sizes, each
3331 image size (in bytes) specified by an "uint32_t" in network
3332 byte order. This list is terminated by an "(uint32_t)0".
3333 Immediately after the terminating 0 follow the images, one by
3334 one, all aligned on "uint32_t" boundaries (size rounded up to
3335 a multiple of 4 bytes).
3336
3337 "Firmware Images" are binary images containing firmware (like
3338 U-Boot or FPGA images) which usually will be programmed to
3339 flash memory.
3340
3341 "Script files" are command sequences that will be executed by
3342 U-Boot's command interpreter; this feature is especially
3343 useful when you configure U-Boot to use a real shell (hush)
3344 as command interpreter.
3345
44f074c7
MV
3346Booting the Linux zImage:
3347-------------------------
3348
3349On some platforms, it's possible to boot Linux zImage. This is done
3350using the "bootz" command. The syntax of "bootz" command is the same
3351as the syntax of "bootm" command.
3352
8ac28563 3353Note, defining the CONFIG_SUPPORT_RAW_INITRD allows user to supply
017e1f3f
MV
3354kernel with raw initrd images. The syntax is slightly different, the
3355address of the initrd must be augmented by it's size, in the following
3356format: "<initrd addres>:<initrd size>".
3357
2729af9d
WD
3358
3359Standalone HOWTO:
3360=================
3361
3362One of the features of U-Boot is that you can dynamically load and
3363run "standalone" applications, which can use some resources of
3364U-Boot like console I/O functions or interrupt services.
3365
3366Two simple examples are included with the sources:
3367
3368"Hello World" Demo:
3369-------------------
3370
3371'examples/hello_world.c' contains a small "Hello World" Demo
3372application; it is automatically compiled when you build U-Boot.
3373It's configured to run at address 0x00040004, so you can play with it
3374like that:
3375
3376 => loads
3377 ## Ready for S-Record download ...
3378 ~>examples/hello_world.srec
3379 1 2 3 4 5 6 7 8 9 10 11 ...
3380 [file transfer complete]
3381 [connected]
3382 ## Start Addr = 0x00040004
3383
3384 => go 40004 Hello World! This is a test.
3385 ## Starting application at 0x00040004 ...
3386 Hello World
3387 argc = 7
3388 argv[0] = "40004"
3389 argv[1] = "Hello"
3390 argv[2] = "World!"
3391 argv[3] = "This"
3392 argv[4] = "is"
3393 argv[5] = "a"
3394 argv[6] = "test."
3395 argv[7] = "<NULL>"
3396 Hit any key to exit ...
3397
3398 ## Application terminated, rc = 0x0
3399
3400Another example, which demonstrates how to register a CPM interrupt
3401handler with the U-Boot code, can be found in 'examples/timer.c'.
3402Here, a CPM timer is set up to generate an interrupt every second.
3403The interrupt service routine is trivial, just printing a '.'
3404character, but this is just a demo program. The application can be
3405controlled by the following keys:
3406
3407 ? - print current values og the CPM Timer registers
3408 b - enable interrupts and start timer
3409 e - stop timer and disable interrupts
3410 q - quit application
3411
3412 => loads
3413 ## Ready for S-Record download ...
3414 ~>examples/timer.srec
3415 1 2 3 4 5 6 7 8 9 10 11 ...
3416 [file transfer complete]
3417 [connected]
3418 ## Start Addr = 0x00040004
3419
3420 => go 40004
3421 ## Starting application at 0x00040004 ...
3422 TIMERS=0xfff00980
3423 Using timer 1
3424 tgcr @ 0xfff00980, tmr @ 0xfff00990, trr @ 0xfff00994, tcr @ 0xfff00998, tcn @ 0xfff0099c, ter @ 0xfff009b0
3425
3426Hit 'b':
3427 [q, b, e, ?] Set interval 1000000 us
3428 Enabling timer
3429Hit '?':
3430 [q, b, e, ?] ........
3431 tgcr=0x1, tmr=0xff1c, trr=0x3d09, tcr=0x0, tcn=0xef6, ter=0x0
3432Hit '?':
3433 [q, b, e, ?] .
3434 tgcr=0x1, tmr=0xff1c, trr=0x3d09, tcr=0x0, tcn=0x2ad4, ter=0x0
3435Hit '?':
3436 [q, b, e, ?] .
3437 tgcr=0x1, tmr=0xff1c, trr=0x3d09, tcr=0x0, tcn=0x1efc, ter=0x0
3438Hit '?':
3439 [q, b, e, ?] .
3440 tgcr=0x1, tmr=0xff1c, trr=0x3d09, tcr=0x0, tcn=0x169d, ter=0x0
3441Hit 'e':
3442 [q, b, e, ?] ...Stopping timer
3443Hit 'q':
3444 [q, b, e, ?] ## Application terminated, rc = 0x0
3445
3446
3447Minicom warning:
3448================
3449
3450Over time, many people have reported problems when trying to use the
3451"minicom" terminal emulation program for serial download. I (wd)
3452consider minicom to be broken, and recommend not to use it. Under
3453Unix, I recommend to use C-Kermit for general purpose use (and
3454especially for kermit binary protocol download ("loadb" command), and
e53515a2 3455use "cu" for S-Record download ("loads" command). See
047f6ec0 3456https://www.denx.de/wiki/view/DULG/SystemSetup#Section_4.3.
e53515a2
KP
3457for help with kermit.
3458
2729af9d
WD
3459
3460Nevertheless, if you absolutely want to use it try adding this
3461configuration to your "File transfer protocols" section:
3462
3463 Name Program Name U/D FullScr IO-Red. Multi
3464 X kermit /usr/bin/kermit -i -l %l -s Y U Y N N
3465 Y kermit /usr/bin/kermit -i -l %l -r N D Y N N
3466
3467
3468NetBSD Notes:
3469=============
3470
3471Starting at version 0.9.2, U-Boot supports NetBSD both as host
3472(build U-Boot) and target system (boots NetBSD/mpc8xx).
3473
3474Building requires a cross environment; it is known to work on
3475NetBSD/i386 with the cross-powerpc-netbsd-1.3 package (you will also
3476need gmake since the Makefiles are not compatible with BSD make).
3477Note that the cross-powerpc package does not install include files;
3478attempting to build U-Boot will fail because <machine/ansi.h> is
3479missing. This file has to be installed and patched manually:
3480
3481 # cd /usr/pkg/cross/powerpc-netbsd/include
3482 # mkdir powerpc
3483 # ln -s powerpc machine
3484 # cp /usr/src/sys/arch/powerpc/include/ansi.h powerpc/ansi.h
3485 # ${EDIT} powerpc/ansi.h ## must remove __va_list, _BSD_VA_LIST
3486
3487Native builds *don't* work due to incompatibilities between native
3488and U-Boot include files.
3489
3490Booting assumes that (the first part of) the image booted is a
3491stage-2 loader which in turn loads and then invokes the kernel
3492proper. Loader sources will eventually appear in the NetBSD source
3493tree (probably in sys/arc/mpc8xx/stand/u-boot_stage2/); in the
2a8af187 3494meantime, see ftp://ftp.denx.de/pub/u-boot/ppcboot_stage2.tar.gz
2729af9d
WD
3495
3496
3497Implementation Internals:
3498=========================
3499
3500The following is not intended to be a complete description of every
3501implementation detail. However, it should help to understand the
3502inner workings of U-Boot and make it easier to port it to custom
3503hardware.
3504
3505
3506Initial Stack, Global Data:
3507---------------------------
3508
3509The implementation of U-Boot is complicated by the fact that U-Boot
3510starts running out of ROM (flash memory), usually without access to
3511system RAM (because the memory controller is not initialized yet).
3512This means that we don't have writable Data or BSS segments, and BSS
3513is not initialized as zero. To be able to get a C environment working
3514at all, we have to allocate at least a minimal stack. Implementation
3515options for this are defined and restricted by the CPU used: Some CPU
3516models provide on-chip memory (like the IMMR area on MPC8xx and
3517MPC826x processors), on others (parts of) the data cache can be
3518locked as (mis-) used as memory, etc.
3519
218ca724 3520 Chris Hallinan posted a good summary of these issues to the
0668236b 3521 U-Boot mailing list:
2729af9d
WD
3522
3523 Subject: RE: [U-Boot-Users] RE: More On Memory Bank x (nothingness)?
3524 From: "Chris Hallinan" <clh@net1plus.com>
3525 Date: Mon, 10 Feb 2003 16:43:46 -0500 (22:43 MET)
3526 ...
3527
3528 Correct me if I'm wrong, folks, but the way I understand it
3529 is this: Using DCACHE as initial RAM for Stack, etc, does not
3530 require any physical RAM backing up the cache. The cleverness
3531 is that the cache is being used as a temporary supply of
3532 necessary storage before the SDRAM controller is setup. It's
11ccc33f 3533 beyond the scope of this list to explain the details, but you
2729af9d
WD
3534 can see how this works by studying the cache architecture and
3535 operation in the architecture and processor-specific manuals.
3536
3537 OCM is On Chip Memory, which I believe the 405GP has 4K. It
3538 is another option for the system designer to use as an
11ccc33f 3539 initial stack/RAM area prior to SDRAM being available. Either
2729af9d
WD
3540 option should work for you. Using CS 4 should be fine if your
3541 board designers haven't used it for something that would
3542 cause you grief during the initial boot! It is frequently not
3543 used.
3544
6d0f6bcf 3545 CONFIG_SYS_INIT_RAM_ADDR should be somewhere that won't interfere
2729af9d
WD
3546 with your processor/board/system design. The default value
3547 you will find in any recent u-boot distribution in
8a316c9b 3548 walnut.h should work for you. I'd set it to a value larger
2729af9d
WD
3549 than your SDRAM module. If you have a 64MB SDRAM module, set
3550 it above 400_0000. Just make sure your board has no resources
3551 that are supposed to respond to that address! That code in
3552 start.S has been around a while and should work as is when
3553 you get the config right.
3554
3555 -Chris Hallinan
3556 DS4.COM, Inc.
3557
3558It is essential to remember this, since it has some impact on the C
3559code for the initialization procedures:
3560
3561* Initialized global data (data segment) is read-only. Do not attempt
3562 to write it.
3563
b445bbb4 3564* Do not use any uninitialized global data (or implicitly initialized
2729af9d
WD
3565 as zero data - BSS segment) at all - this is undefined, initiali-
3566 zation is performed later (when relocating to RAM).
3567
3568* Stack space is very limited. Avoid big data buffers or things like
3569 that.
3570
3571Having only the stack as writable memory limits means we cannot use
b445bbb4 3572normal global data to share information between the code. But it
2729af9d
WD
3573turned out that the implementation of U-Boot can be greatly
3574simplified by making a global data structure (gd_t) available to all
3575functions. We could pass a pointer to this data as argument to _all_
3576functions, but this would bloat the code. Instead we use a feature of
3577the GCC compiler (Global Register Variables) to share the data: we
3578place a pointer (gd) to the global data into a register which we
3579reserve for this purpose.
3580
3581When choosing a register for such a purpose we are restricted by the
3582relevant (E)ABI specifications for the current architecture, and by
3583GCC's implementation.
3584
3585For PowerPC, the following registers have specific use:
3586 R1: stack pointer
e7670f6c 3587 R2: reserved for system use
2729af9d
WD
3588 R3-R4: parameter passing and return values
3589 R5-R10: parameter passing
3590 R13: small data area pointer
3591 R30: GOT pointer
3592 R31: frame pointer
3593
e6bee808
JT
3594 (U-Boot also uses R12 as internal GOT pointer. r12
3595 is a volatile register so r12 needs to be reset when
3596 going back and forth between asm and C)
2729af9d 3597
e7670f6c 3598 ==> U-Boot will use R2 to hold a pointer to the global data
2729af9d
WD
3599
3600 Note: on PPC, we could use a static initializer (since the
3601 address of the global data structure is known at compile time),
3602 but it turned out that reserving a register results in somewhat
3603 smaller code - although the code savings are not that big (on
3604 average for all boards 752 bytes for the whole U-Boot image,
3605 624 text + 127 data).
3606
3607On ARM, the following registers are used:
3608
3609 R0: function argument word/integer result
3610 R1-R3: function argument word
12eba1b4
JH
3611 R9: platform specific
3612 R10: stack limit (used only if stack checking is enabled)
2729af9d
WD
3613 R11: argument (frame) pointer
3614 R12: temporary workspace
3615 R13: stack pointer
3616 R14: link register
3617 R15: program counter
3618
12eba1b4
JH
3619 ==> U-Boot will use R9 to hold a pointer to the global data
3620
3621 Note: on ARM, only R_ARM_RELATIVE relocations are supported.
2729af9d 3622
0df01fd3 3623On Nios II, the ABI is documented here:
047f6ec0 3624 https://www.altera.com/literature/hb/nios2/n2cpu_nii51016.pdf
0df01fd3
TC
3625
3626 ==> U-Boot will use gp to hold a pointer to the global data
3627
3628 Note: on Nios II, we give "-G0" option to gcc and don't use gp
3629 to access small data sections, so gp is free.
3630
afc1ce82
ML
3631On NDS32, the following registers are used:
3632
3633 R0-R1: argument/return
3634 R2-R5: argument
3635 R15: temporary register for assembler
3636 R16: trampoline register
3637 R28: frame pointer (FP)
3638 R29: global pointer (GP)
3639 R30: link register (LP)
3640 R31: stack pointer (SP)
3641 PC: program counter (PC)
3642
3643 ==> U-Boot will use R10 to hold a pointer to the global data
3644
d87080b7
WD
3645NOTE: DECLARE_GLOBAL_DATA_PTR must be used with file-global scope,
3646or current versions of GCC may "optimize" the code too much.
2729af9d 3647
3fafced7
RC
3648On RISC-V, the following registers are used:
3649
3650 x0: hard-wired zero (zero)
3651 x1: return address (ra)
3652 x2: stack pointer (sp)
3653 x3: global pointer (gp)
3654 x4: thread pointer (tp)
3655 x5: link register (t0)
3656 x8: frame pointer (fp)
3657 x10-x11: arguments/return values (a0-1)
3658 x12-x17: arguments (a2-7)
3659 x28-31: temporaries (t3-6)
3660 pc: program counter (pc)
3661
3662 ==> U-Boot will use gp to hold a pointer to the global data
3663
2729af9d
WD
3664Memory Management:
3665------------------
3666
3667U-Boot runs in system state and uses physical addresses, i.e. the
3668MMU is not used either for address mapping nor for memory protection.
3669
3670The available memory is mapped to fixed addresses using the memory
3671controller. In this process, a contiguous block is formed for each
3672memory type (Flash, SDRAM, SRAM), even when it consists of several
3673physical memory banks.
3674
3675U-Boot is installed in the first 128 kB of the first Flash bank (on
3676TQM8xxL modules this is the range 0x40000000 ... 0x4001FFFF). After
3677booting and sizing and initializing DRAM, the code relocates itself
3678to the upper end of DRAM. Immediately below the U-Boot code some
6d0f6bcf 3679memory is reserved for use by malloc() [see CONFIG_SYS_MALLOC_LEN
2729af9d
WD
3680configuration setting]. Below that, a structure with global Board
3681Info data is placed, followed by the stack (growing downward).
3682
3683Additionally, some exception handler code is copied to the low 8 kB
3684of DRAM (0x00000000 ... 0x00001FFF).
3685
3686So a typical memory configuration with 16 MB of DRAM could look like
3687this:
3688
3689 0x0000 0000 Exception Vector code
3690 :
3691 0x0000 1FFF
3692 0x0000 2000 Free for Application Use
3693 :
3694 :
3695
3696 :
3697 :
3698 0x00FB FF20 Monitor Stack (Growing downward)
3699 0x00FB FFAC Board Info Data and permanent copy of global data
3700 0x00FC 0000 Malloc Arena
3701 :
3702 0x00FD FFFF
3703 0x00FE 0000 RAM Copy of Monitor Code
3704 ... eventually: LCD or video framebuffer
3705 ... eventually: pRAM (Protected RAM - unchanged by reset)
3706 0x00FF FFFF [End of RAM]
3707
3708
3709System Initialization:
3710----------------------
c609719b 3711
2729af9d 3712In the reset configuration, U-Boot starts at the reset entry point
11ccc33f 3713(on most PowerPC systems at address 0x00000100). Because of the reset
b445bbb4 3714configuration for CS0# this is a mirror of the on board Flash memory.
2729af9d
WD
3715To be able to re-map memory U-Boot then jumps to its link address.
3716To be able to implement the initialization code in C, a (small!)
3717initial stack is set up in the internal Dual Ported RAM (in case CPUs
2eb48ff7
HS
3718which provide such a feature like), or in a locked part of the data
3719cache. After that, U-Boot initializes the CPU core, the caches and
3720the SIU.
2729af9d
WD
3721
3722Next, all (potentially) available memory banks are mapped using a
3723preliminary mapping. For example, we put them on 512 MB boundaries
3724(multiples of 0x20000000: SDRAM on 0x00000000 and 0x20000000, Flash
3725on 0x40000000 and 0x60000000, SRAM on 0x80000000). Then UPM A is
3726programmed for SDRAM access. Using the temporary configuration, a
3727simple memory test is run that determines the size of the SDRAM
3728banks.
3729
3730When there is more than one SDRAM bank, and the banks are of
3731different size, the largest is mapped first. For equal size, the first
3732bank (CS2#) is mapped first. The first mapping is always for address
37330x00000000, with any additional banks following immediately to create
3734contiguous memory starting from 0.
3735
3736Then, the monitor installs itself at the upper end of the SDRAM area
3737and allocates memory for use by malloc() and for the global Board
3738Info data; also, the exception vector code is copied to the low RAM
3739pages, and the final stack is set up.
3740
3741Only after this relocation will you have a "normal" C environment;
3742until that you are restricted in several ways, mostly because you are
3743running from ROM, and because the code will have to be relocated to a
3744new address in RAM.
3745
3746
3747U-Boot Porting Guide:
3748----------------------
c609719b 3749
2729af9d
WD
3750[Based on messages by Jerry Van Baren in the U-Boot-Users mailing
3751list, October 2002]
c609719b
WD
3752
3753
6c3fef28 3754int main(int argc, char *argv[])
2729af9d
WD
3755{
3756 sighandler_t no_more_time;
c609719b 3757
6c3fef28
JVB
3758 signal(SIGALRM, no_more_time);
3759 alarm(PROJECT_DEADLINE - toSec (3 * WEEK));
c609719b 3760
2729af9d 3761 if (available_money > available_manpower) {
6c3fef28 3762 Pay consultant to port U-Boot;
c609719b
WD
3763 return 0;
3764 }
3765
2729af9d
WD
3766 Download latest U-Boot source;
3767
0668236b 3768 Subscribe to u-boot mailing list;
2729af9d 3769
6c3fef28
JVB
3770 if (clueless)
3771 email("Hi, I am new to U-Boot, how do I get started?");
2729af9d
WD
3772
3773 while (learning) {
3774 Read the README file in the top level directory;
047f6ec0 3775 Read https://www.denx.de/wiki/bin/view/DULG/Manual;
24bcaec7 3776 Read applicable doc/README.*;
2729af9d 3777 Read the source, Luke;
6c3fef28 3778 /* find . -name "*.[chS]" | xargs grep -i <keyword> */
2729af9d
WD
3779 }
3780
6c3fef28
JVB
3781 if (available_money > toLocalCurrency ($2500))
3782 Buy a BDI3000;
3783 else
2729af9d 3784 Add a lot of aggravation and time;
2729af9d 3785
6c3fef28
JVB
3786 if (a similar board exists) { /* hopefully... */
3787 cp -a board/<similar> board/<myboard>
3788 cp include/configs/<similar>.h include/configs/<myboard>.h
3789 } else {
3790 Create your own board support subdirectory;
3791 Create your own board include/configs/<myboard>.h file;
3792 }
3793 Edit new board/<myboard> files
3794 Edit new include/configs/<myboard>.h
3795
3796 while (!accepted) {
3797 while (!running) {
3798 do {
3799 Add / modify source code;
3800 } until (compiles);
3801 Debug;
3802 if (clueless)
3803 email("Hi, I am having problems...");
3804 }
3805 Send patch file to the U-Boot email list;
3806 if (reasonable critiques)
3807 Incorporate improvements from email list code review;
3808 else
3809 Defend code as written;
2729af9d 3810 }
2729af9d
WD
3811
3812 return 0;
3813}
3814
3815void no_more_time (int sig)
3816{
3817 hire_a_guru();
3818}
3819
c609719b 3820
2729af9d
WD
3821Coding Standards:
3822-----------------
c609719b 3823
2729af9d 3824All contributions to U-Boot should conform to the Linux kernel
659208da
BS
3825coding style; see the kernel coding style guide at
3826https://www.kernel.org/doc/html/latest/process/coding-style.html, and the
3827script "scripts/Lindent" in your Linux kernel source directory.
2c051651
DZ
3828
3829Source files originating from a different project (for example the
3830MTD subsystem) are generally exempt from these guidelines and are not
b445bbb4 3831reformatted to ease subsequent migration to newer versions of those
2c051651
DZ
3832sources.
3833
3834Please note that U-Boot is implemented in C (and to some small parts in
3835Assembler); no C++ is used, so please do not use C++ style comments (//)
3836in your code.
c609719b 3837
2729af9d
WD
3838Please also stick to the following formatting rules:
3839- remove any trailing white space
7ca9296e 3840- use TAB characters for indentation and vertical alignment, not spaces
2729af9d 3841- make sure NOT to use DOS '\r\n' line feeds
7ca9296e 3842- do not add more than 2 consecutive empty lines to source files
2729af9d 3843- do not add trailing empty lines to source files
180d3f74 3844
2729af9d
WD
3845Submissions which do not conform to the standards may be returned
3846with a request to reformat the changes.
c609719b
WD
3847
3848
2729af9d
WD
3849Submitting Patches:
3850-------------------
c609719b 3851
2729af9d
WD
3852Since the number of patches for U-Boot is growing, we need to
3853establish some rules. Submissions which do not conform to these rules
3854may be rejected, even when they contain important and valuable stuff.
c609719b 3855
047f6ec0 3856Please see https://www.denx.de/wiki/U-Boot/Patches for details.
218ca724 3857
0668236b 3858Patches shall be sent to the u-boot mailing list <u-boot@lists.denx.de>;
1dade18e 3859see https://lists.denx.de/listinfo/u-boot
0668236b 3860
2729af9d
WD
3861When you send a patch, please include the following information with
3862it:
c609719b 3863
2729af9d
WD
3864* For bug fixes: a description of the bug and how your patch fixes
3865 this bug. Please try to include a way of demonstrating that the
3866 patch actually fixes something.
c609719b 3867
2729af9d
WD
3868* For new features: a description of the feature and your
3869 implementation.
c609719b 3870
7207b366
RD
3871* For major contributions, add a MAINTAINERS file with your
3872 information and associated file and directory references.
c609719b 3873
27af930e
AA
3874* When you add support for a new board, don't forget to add a
3875 maintainer e-mail address to the boards.cfg file, too.
c609719b 3876
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3877* If your patch adds new configuration options, don't forget to
3878 document these in the README file.
c609719b 3879
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3880* The patch itself. If you are using git (which is *strongly*
3881 recommended) you can easily generate the patch using the
7ca9296e 3882 "git format-patch". If you then use "git send-email" to send it to
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3883 the U-Boot mailing list, you will avoid most of the common problems
3884 with some other mail clients.
3885
3886 If you cannot use git, use "diff -purN OLD NEW". If your version of
3887 diff does not support these options, then get the latest version of
3888 GNU diff.
c609719b 3889
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3890 The current directory when running this command shall be the parent
3891 directory of the U-Boot source tree (i. e. please make sure that
3892 your patch includes sufficient directory information for the
3893 affected files).
6dff5529 3894
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3895 We prefer patches as plain text. MIME attachments are discouraged,
3896 and compressed attachments must not be used.
c609719b 3897
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3898* If one logical set of modifications affects or creates several
3899 files, all these changes shall be submitted in a SINGLE patch file.
52f52c14 3900
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3901* Changesets that contain different, unrelated modifications shall be
3902 submitted as SEPARATE patches, one patch per changeset.
8bde7f77 3903
52f52c14 3904
2729af9d 3905Notes:
c609719b 3906
6de80f21 3907* Before sending the patch, run the buildman script on your patched
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3908 source tree and make sure that no errors or warnings are reported
3909 for any of the boards.
c609719b 3910
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3911* Keep your modifications to the necessary minimum: A patch
3912 containing several unrelated changes or arbitrary reformats will be
3913 returned with a request to re-formatting / split it.
c609719b 3914
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3915* If you modify existing code, make sure that your new code does not
3916 add to the memory footprint of the code ;-) Small is beautiful!
3917 When adding new features, these should compile conditionally only
3918 (using #ifdef), and the resulting code with the new feature
3919 disabled must not need more memory than the old code without your
3920 modification.
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3922* Remember that there is a size limit of 100 kB per message on the
3923 u-boot mailing list. Bigger patches will be moderated. If they are
3924 reasonable and not too big, they will be acknowledged. But patches
3925 bigger than the size limit should be avoided.