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83d290c5 | 1 | // SPDX-License-Identifier: GPL-2.0+ |
bf78b271 | 2 | /* |
b891d010 | 3 | * (C) Copyright 2014-2016 |
bf78b271 | 4 | * Marcel Ziswiler <marcel@ziswiler.com> |
bf78b271 MZ |
5 | */ |
6 | ||
7 | #include <common.h> | |
bf78b271 MZ |
8 | #include <asm/arch/gp_padctrl.h> |
9 | #include <asm/arch/pinmux.h> | |
a5825625 MZ |
10 | #include <asm/arch-tegra/ap.h> |
11 | #include <asm/arch-tegra/tegra.h> | |
bf78b271 | 12 | #include <asm/gpio.h> |
a5825625 | 13 | #include <asm/io.h> |
36a01bdd | 14 | #include <dm.h> |
bf78b271 | 15 | #include <i2c.h> |
37fa4125 | 16 | #include "../common/tdx-common.h" |
bf78b271 MZ |
17 | |
18 | #include "pinmux-config-apalis_t30.h" | |
19 | ||
b891d010 MZ |
20 | DECLARE_GLOBAL_DATA_PTR; |
21 | ||
bf78b271 MZ |
22 | #define PMU_I2C_ADDRESS 0x2D |
23 | #define MAX_I2C_RETRY 3 | |
24 | ||
a5825625 MZ |
25 | int arch_misc_init(void) |
26 | { | |
27 | if (readl(NV_PA_BASE_SRAM + NVBOOTINFOTABLE_BOOTTYPE) == | |
28 | NVBOOTTYPE_RECOVERY) | |
29 | printf("USB recovery mode\n"); | |
30 | ||
31 | return 0; | |
32 | } | |
33 | ||
b891d010 MZ |
34 | int checkboard(void) |
35 | { | |
36 | printf("Model: Toradex Apalis T30 %dGB\n", | |
37 | (gd->ram_size == 0x40000000) ? 1 : 2); | |
38 | ||
39 | return 0; | |
40 | } | |
41 | ||
37fa4125 SA |
42 | #if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) |
43 | int ft_board_setup(void *blob, bd_t *bd) | |
44 | { | |
45 | return ft_common_board_setup(blob, bd); | |
46 | } | |
47 | #endif | |
48 | ||
bf78b271 MZ |
49 | /* |
50 | * Routine: pinmux_init | |
51 | * Description: Do individual peripheral pinmux configs | |
52 | */ | |
53 | void pinmux_init(void) | |
54 | { | |
55 | pinmux_config_pingrp_table(tegra3_pinmux_common, | |
56 | ARRAY_SIZE(tegra3_pinmux_common)); | |
57 | ||
58 | pinmux_config_pingrp_table(unused_pins_lowpower, | |
59 | ARRAY_SIZE(unused_pins_lowpower)); | |
60 | ||
61 | /* Initialize any non-default pad configs (APB_MISC_GP regs) */ | |
62 | pinmux_config_drvgrp_table(apalis_t30_padctrl, | |
63 | ARRAY_SIZE(apalis_t30_padctrl)); | |
64 | } | |
65 | ||
66 | #ifdef CONFIG_PCI_TEGRA | |
67 | int tegra_pcie_board_init(void) | |
68 | { | |
b0e6ef46 | 69 | struct udevice *dev; |
bf78b271 MZ |
70 | u8 addr, data[1]; |
71 | int err; | |
72 | ||
25ab4b03 | 73 | err = i2c_get_chip_for_busnum(0, PMU_I2C_ADDRESS, 1, &dev); |
bf78b271 | 74 | if (err) { |
b0e6ef46 | 75 | debug("%s: Cannot find PMIC I2C chip\n", __func__); |
bf78b271 MZ |
76 | return err; |
77 | } | |
36a01bdd | 78 | |
bf78b271 MZ |
79 | /* TPS659110: VDD2_OP_REG = 1.05V */ |
80 | data[0] = 0x27; | |
81 | addr = 0x25; | |
82 | ||
f9a4c2da | 83 | err = dm_i2c_write(dev, addr, data, 1); |
bf78b271 MZ |
84 | if (err) { |
85 | debug("failed to set VDD supply\n"); | |
86 | return err; | |
87 | } | |
88 | ||
89 | /* TPS659110: VDD2_REG 7.5 mV/us, ACTIVE */ | |
90 | data[0] = 0x0D; | |
91 | addr = 0x24; | |
92 | ||
f9a4c2da | 93 | err = dm_i2c_write(dev, addr, data, 1); |
bf78b271 MZ |
94 | if (err) { |
95 | debug("failed to enable VDD supply\n"); | |
96 | return err; | |
97 | } | |
98 | ||
99 | /* TPS659110: LDO6_REG = 1.1V, ACTIVE */ | |
100 | data[0] = 0x0D; | |
101 | addr = 0x35; | |
102 | ||
f9a4c2da | 103 | err = dm_i2c_write(dev, addr, data, 1); |
bf78b271 MZ |
104 | if (err) { |
105 | debug("failed to set AVDD supply\n"); | |
106 | return err; | |
107 | } | |
108 | ||
bf78b271 MZ |
109 | return 0; |
110 | } | |
bf78b271 | 111 | #endif /* CONFIG_PCI_TEGRA */ |