projects / thirdparty / u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| 373762c3 | 1 | CONFIG_PPC=y |
| 98463903 | 2 | CONFIG_TEXT_BASE=0x00200000 |
| 77d2f7f5 | 3 | CONFIG_SPL_LIBCOMMON_SUPPORT=y |
| cc4288ef | 4 | CONFIG_SPL_LIBGENERIC_SUPPORT=y |
| c960c0fd | 5 | CONFIG_SF_DEFAULT_SPEED=10000000 |
| 052170c6 TR |
6 | CONFIG_ENV_SIZE=0x2000 |
| 7 | CONFIG_ENV_OFFSET=0x100000 | |
| 2bba7807 | 8 | CONFIG_DEFAULT_DEVICE_TREE="t4240rdb" |
| c5a6e9f8 | 9 | CONFIG_SPL_TEXT_BASE=0xFFFD8000 |
| c90e1893 | 10 | CONFIG_SYS_MONITOR_LEN=786432 |
| 103c5f18 | 11 | CONFIG_SPL_MMC=y |
| 2a736066 | 12 | CONFIG_SPL_SERIAL=y |
| 9ca00684 | 13 | CONFIG_SPL_DRIVERS_MISC=y |
| c9542eae | 14 | CONFIG_SPL=y |
| 373762c3 | 15 | CONFIG_MPC85xx=y |
| d3d0b5bb | 16 | CONFIG_SYS_INIT_RAM_LOCK=y |
| 373762c3 | 17 | CONFIG_TARGET_T4240RDB=y |
| fbc3621f | 18 | CONFIG_ENABLE_36BIT_PHYS=y |
| 3dab405b | 19 | CONFIG_SYS_BOOK3E_HV=y |
| 38d091ac | 20 | CONFIG_SYS_CACHE_STASHING=y |
| de47ff53 | 21 | CONFIG_SYS_MPC85XX_NO_RESETVEC=y |
| 54f80dd2 | 22 | CONFIG_USE_UBOOTPATH=y |
| 3dc2987f TR |
23 | CONFIG_PCIE1=y |
| 24 | CONFIG_PCIE2=y | |
| 25 | CONFIG_PCIE3=y | |
| 26 | CONFIG_PCIE4=y | |
| 27 | CONFIG_VID=y | |
| 28 | CONFIG_VID_FLS_ENV="t4240rdb_vdd_mv" | |
| 29 | CONFIG_VOL_MONITOR_IR36021_READ=y | |
| 30 | CONFIG_VOL_MONITOR_IR36021_SET=y | |
| 1de46d91 | 31 | CONFIG_SYS_FSL_NUM_CC_PLLS=5 |
| 54c5c2b8 | 32 | CONFIG_MP=y |
| 73223f0e SG |
33 | CONFIG_FIT=y |
| 34 | CONFIG_FIT_VERBOSE=y | |
| d8ef01e9 TR |
35 | CONFIG_RAMBOOT_PBL=y |
| 36 | CONFIG_SYS_FSL_PBL_PBI="$(SRCTREE)/board/freescale/t4rdb/t4_pbi.cfg" | |
| 37 | CONFIG_SYS_FSL_PBL_RCW="$(SRCTREE)/board/freescale/t4rdb/t4_sd_rcw.cfg" | |
| bb597c0e | 38 | CONFIG_BOOTDELAY=10 |
| ec6f06bd TR |
39 | CONFIG_OF_BOARD_SETUP=y |
| 40 | CONFIG_OF_STDOUT_VIA_ALIAS=y | |
| 970bf860 TR |
41 | CONFIG_USE_BOOTCOMMAND=y |
| 42 | CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs;setenv ramdiskaddr 0x02000000;setenv fdtaddr 0x00c00000;setenv loadaddr 0x1000000;bootm $loadaddr $ramdiskaddr $fdtaddr" | |
| 42fb448a | 43 | CONFIG_SYS_PBSIZE=276 |
| 42a2d90c | 44 | CONFIG_ARCH_MISC_INIT=y |
| 02ddc147 | 45 | CONFIG_BOARD_EARLY_INIT_R=y |
| 75670c81 | 46 | # CONFIG_SPL_FRAMEWORK is not set |
| ca8a329a TR |
47 | CONFIG_SPL_MAX_SIZE=0x28000 |
| 48 | CONFIG_SPL_PAD_TO=0x40000 | |
| db4080d5 TR |
49 | CONFIG_SPL_MMC_BOOT=y |
| 50 | CONFIG_SPL_FSL_PBL=y | |
| 6074a536 | 51 | CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y |
| b35316fb TR |
52 | CONFIG_SPL_FLUSH_IMAGE=y |
| 53 | CONFIG_SPL_SKIP_RELOCATE=y | |
| 7f2c91e5 | 54 | CONFIG_SPL_GD_ADDR=0xfffc8000 |
| 55cf860b TR |
55 | CONFIG_SPL_RELOC_STACK=0xfffd8000 |
| 56 | CONFIG_SPL_RELOC_MALLOC=y | |
| 57 | CONFIG_SPL_RELOC_MALLOC_ADDR=0xfffcb000 | |
| 58 | CONFIG_SPL_RELOC_MALLOC_SIZE=0xc800 | |
| 8728c97e | 59 | CONFIG_SPL_ENV_SUPPORT=y |
| 975e7cf3 | 60 | CONFIG_SPL_I2C=y |
| 6f004ada | 61 | CONFIG_SPL_MPC8XXX_INIT_DDR=y |
| adad96e6 | 62 | CONFIG_HUSH_PARSER=y |
| ad12dc18 | 63 | CONFIG_CMD_IMLS=y |
| 89cb2b5f | 64 | CONFIG_CMD_GREPENV=y |
| 143a5e0d | 65 | CONFIG_CMD_DM=y |
| 88663126 | 66 | CONFIG_CMD_I2C=y |
| 2c8d04dd TR |
67 | CONFIG_LOADS_ECHO=y |
| 68 | CONFIG_SYS_LOADS_BAUD_CHANGE=y | |
| 89cb2b5f | 69 | CONFIG_CMD_MMC=y |
| 78d1e1d0 TR |
70 | CONFIG_CMD_USB=y |
| 71 | CONFIG_CMD_DHCP=y | |
| 89cb2b5f | 72 | CONFIG_CMD_MII=y |
| 78d1e1d0 | 73 | CONFIG_CMD_PING=y |
| 89cb2b5f TR |
74 | CONFIG_CMD_EXT2=y |
| 75 | CONFIG_CMD_FAT=y | |
| b0abde1c | 76 | CONFIG_OF_CONTROL=y |
| e91907a1 | 77 | CONFIG_ENV_OVERWRITE=y |
| 5dc4dfd2 | 78 | CONFIG_ENV_IS_IN_MMC=y |
| fdfb17b1 TR |
79 | CONFIG_USE_BOOTFILE=y |
| 80 | CONFIG_BOOTFILE="uImage" | |
| 0e14cdfa TR |
81 | CONFIG_USE_ETHPRIME=y |
| 82 | CONFIG_ETHPRIME="FM1@DTSEC1" | |
| 54f80dd2 | 83 | CONFIG_USE_ROOTPATH=y |
| 0a816d92 | 84 | CONFIG_FSL_SATA_V2=y |
| edca8cf7 | 85 | CONFIG_SYS_SATA_MAX_DEVICE=2 |
| 28522678 | 86 | CONFIG_FSL_CAAM=y |
| efb5dab7 | 87 | CONFIG_DDR_CLK_FREQ=133333333 |
| 95372165 TR |
88 | CONFIG_DDR_ECC=y |
| 89 | CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y | |
| b11dc33e | 90 | CONFIG_DM_I2C=y |
| 55dabcc8 | 91 | CONFIG_SPL_SYS_I2C_LEGACY=y |
| fc8d3b9a | 92 | CONFIG_I2C_SET_DEFAULT_BUS_NUM=y |
| 6d5d0c95 TR |
93 | CONFIG_SYS_I2C_FSL=y |
| 94 | CONFIG_SYS_FSL_I2C_OFFSET=0x118000 | |
| 95 | CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y | |
| 96 | CONFIG_SYS_FSL_I2C2_OFFSET=0x118100 | |
| 07dea2e7 | 97 | CONFIG_FSL_ESDHC=y |
| 63ea3172 | 98 | CONFIG_MTD=y |
| e856bdcf | 99 | CONFIG_MTD_NOR_FLASH=y |
| 2fe88d45 AF |
100 | CONFIG_FLASH_CFI_DRIVER=y |
| 101 | CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y | |
| b72713dc | 102 | CONFIG_SYS_FLASH_EMPTY_INFO=y |
| 2fe88d45 | 103 | CONFIG_SYS_FLASH_CFI=y |
| 1107dad8 | 104 | CONFIG_SYS_FLASH_QUIET_TEST=y |
| 1db251bd | 105 | CONFIG_SYS_MAX_FLASH_SECT=1024 |
| 0f9595b9 | 106 | CONFIG_SYS_MAX_FLASH_BANKS=2 |
| b24550ac | 107 | CONFIG_DM_SPI_FLASH=y |
| 68d53420 | 108 | CONFIG_SPI_FLASH_SST=y |
| 3146f0c0 | 109 | CONFIG_PHYLIB=y |
| 306881a0 | 110 | CONFIG_PHYLIB_10G=y |
| 60f3c015 | 111 | CONFIG_PHY_CORTINA=y |
| e99b1dfc | 112 | CONFIG_CORTINA_FW_ADDR=0x77f000 |
| 306881a0 TR |
113 | CONFIG_PHY_TERANETICS=y |
| 114 | CONFIG_PHY_VITESSE=y | |
| 143a5e0d | 115 | CONFIG_DM_MDIO=y |
| 1989374b | 116 | CONFIG_PHY_GIGE=y |
| a77fda1f | 117 | CONFIG_E1000=y |
| 665c35a7 | 118 | CONFIG_FMAN_ENET=y |
| a97a071d | 119 | CONFIG_SYS_FMAN_FW_ADDR=0x104000 |
| 665c35a7 | 120 | CONFIG_MII=y |
| 46031228 HZ |
121 | CONFIG_DM_PCI_COMPAT=y |
| 122 | CONFIG_PCIE_FSL=y | |
| cc1e98b5 | 123 | CONFIG_SYS_QE_FMAN_FW_IN_MMC=y |
| 9591b635 | 124 | CONFIG_SYS_NS16550_SERIAL=y |
| f1b1f770 | 125 | CONFIG_SPI=y |
| b24550ac | 126 | CONFIG_DM_SPI=y |
| e5d5d447 | 127 | CONFIG_FSL_ESPI=y |
| 645176d1 | 128 | CONFIG_USB=y |
| f76750d1 | 129 | CONFIG_USB_EHCI_FSL=y |
| 3371edda | 130 | CONFIG_USB_MAX_CONTROLLER_COUNT=2 |
| b24550ac | 131 | CONFIG_USB_STORAGE=y |
| 69be8fd1 MS |
132 | CONFIG_ADDR_MAP=y |
| 133 | CONFIG_SYS_NUM_ADDR_MAP=64 |