projects / thirdparty / u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| dd84058d | 1 | CONFIG_PPC=y |
| 278b90ce | 2 | CONFIG_SYS_TEXT_BASE=0xFF800000 |
| ff3bb0c4 | 3 | CONFIG_SYS_CLK_FREQ=66000000 |
| dd84058d | 4 | CONFIG_MPC83xx=y |
| 93de2530 | 5 | CONFIG_HIGH_BATS=y |
| dd84058d | 6 | CONFIG_TARGET_SBC8349=y |
| 21c1502a MS |
7 | CONFIG_DDR_MC_CLOCK_MODE_1_1=y |
| 8 | CONFIG_SYSTEM_PLL_FACTOR_4_1=y | |
| 9 | CONFIG_CORE_PLL_RATIO_2_1=y | |
| 10 | CONFIG_PCI_HOST_MODE_ENABLE=y | |
| 11 | CONFIG_PCI_INT_ARBITER1_ENABLE=y | |
| 12 | CONFIG_PCI_INT_ARBITER2_ENABLE=y | |
| 13 | CONFIG_BOOT_MEMORY_SPACE_LOW=y | |
| 14 | CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y | |
| 15 | CONFIG_TSEC1_MODE_GMII=y | |
| 16 | CONFIG_TSEC2_MODE_GMII=y | |
| 30915ab9 MS |
17 | CONFIG_BAT0=y |
| 18 | CONFIG_BAT0_NAME="SDRAM" | |
| 19 | CONFIG_BAT0_BASE=0x00000000 | |
| 20 | CONFIG_BAT0_LENGTH_256_MBYTES=y | |
| 21 | CONFIG_BAT0_ACCESS_RW=y | |
| 22 | CONFIG_BAT0_ICACHE_MEMORYCOHERENCE=y | |
| 23 | CONFIG_BAT0_DCACHE_MEMORYCOHERENCE=y | |
| 24 | CONFIG_BAT0_USER_MODE_VALID=y | |
| 25 | CONFIG_BAT0_SUPERVISOR_MODE_VALID=y | |
| 26 | CONFIG_BAT5=y | |
| 27 | CONFIG_BAT5_NAME="IMMR_PCIIO" | |
| 28 | CONFIG_BAT5_BASE=0xE0000000 | |
| 29 | CONFIG_BAT5_LENGTH_256_MBYTES=y | |
| 30 | CONFIG_BAT5_ACCESS_RW=y | |
| 31 | CONFIG_BAT5_ICACHE_INHIBITED=y | |
| 32 | CONFIG_BAT5_ICACHE_GUARDED=y | |
| 33 | CONFIG_BAT5_DCACHE_INHIBITED=y | |
| 34 | CONFIG_BAT5_DCACHE_GUARDED=y | |
| 35 | CONFIG_BAT5_USER_MODE_VALID=y | |
| 36 | CONFIG_BAT5_SUPERVISOR_MODE_VALID=y | |
| 37 | CONFIG_BAT6=y | |
| 38 | CONFIG_BAT6_NAME="LBC_INITRAM_FLASH" | |
| 39 | CONFIG_BAT6_BASE=0xF0000000 | |
| 40 | CONFIG_BAT6_LENGTH_256_MBYTES=y | |
| 41 | CONFIG_BAT6_ACCESS_RW=y | |
| 42 | CONFIG_BAT6_ICACHE_MEMORYCOHERENCE=y | |
| 43 | CONFIG_BAT6_ICACHE_GUARDED=y | |
| 44 | CONFIG_BAT6_DCACHE_MEMORYCOHERENCE=y | |
| 45 | CONFIG_BAT6_DCACHE_GUARDED=y | |
| 46 | CONFIG_BAT6_USER_MODE_VALID=y | |
| 47 | CONFIG_BAT6_SUPERVISOR_MODE_VALID=y | |
| 9c5df7a2 MS |
48 | CONFIG_LBLAW0=y |
| 49 | CONFIG_LBLAW0_BASE=0xFF800000 | |
| 50 | CONFIG_LBLAW0_NAME="FLASH" | |
| 51 | CONFIG_LBLAW0_LENGTH_8_MBYTES=y | |
| 344a0e43 TR |
52 | CONFIG_ELBC_BR0_OR0=y |
| 53 | CONFIG_BR0_OR0_NAME="FLASH" | |
| 54 | CONFIG_BR0_OR0_BASE=0xFF800000 | |
| 55 | CONFIG_BR0_PORTSIZE_16BIT=y | |
| 56 | CONFIG_OR0_AM_8_MBYTES=y | |
| 57 | CONFIG_OR0_XAM_SET=y | |
| 58 | CONFIG_OR0_SCY_15=y | |
| 59 | CONFIG_OR0_CSNT_EARLIER=y | |
| 60 | CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y | |
| 61 | CONFIG_OR0_XACS_EXTENDED=y | |
| 62 | CONFIG_OR0_TRLX_RELAXED=y | |
| 63 | CONFIG_OR0_EHTR_8_CYCLE=y | |
| 64 | CONFIG_OR0_EAD_EXTRA=y | |
| be5abb0a MS |
65 | CONFIG_HID0_FINAL_EMCP=y |
| 66 | CONFIG_HID0_FINAL_ICE=y | |
| 67 | CONFIG_HID2_HBE=y | |
| 344a0e43 TR |
68 | CONFIG_LCRR_DBYP_PLL_BYPASSED=y |
| 69 | CONFIG_LCRR_CLKDIV_4=y | |
| 73223f0e SG |
70 | CONFIG_OF_BOARD_SETUP=y |
| 71 | CONFIG_OF_STDOUT_VIA_ALIAS=y | |
| bb597c0e | 72 | CONFIG_BOOTDELAY=6 |
| adad96e6 | 73 | CONFIG_HUSH_PARSER=y |
| ad12dc18 | 74 | CONFIG_CMD_IMLS=y |
| 78d1e1d0 | 75 | CONFIG_CMD_I2C=y |
| ef0f2f57 | 76 | # CONFIG_CMD_SETEXPR is not set |
| 89cb2b5f | 77 | CONFIG_CMD_MII=y |
| 78d1e1d0 | 78 | CONFIG_CMD_PING=y |
| 8728c97e | 79 | # CONFIG_MMC is not set |
| e856bdcf | 80 | CONFIG_MTD_NOR_FLASH=y |
| 2fe88d45 AF |
81 | CONFIG_FLASH_CFI_DRIVER=y |
| 82 | CONFIG_SYS_FLASH_CFI=y | |
| a8ca5c8a | 83 | CONFIG_PHY_MARVELL=y |
| 17151052 | 84 | CONFIG_TSEC_ENET=y |
| af27382e | 85 | # CONFIG_PCI is not set |
| 9e39003e | 86 | CONFIG_SYS_NS16550=y |
| 69e173eb | 87 | CONFIG_OF_LIBFDT=y |