[thirdparty/u-boot.git] / include / ata.h

/* SPDX-License-Identifier: GPL-2.0+ */
/*
 * (C) Copyright 2000
 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
 */

/*
 * Most of the following information was derived from the document
 * "Information Technology - AT Attachment-3 Interface (ATA-3)"
 * which can be found at:
 * http://www.dt.wdc.com/ata/ata-3/ata3r5v.zip
 * ftp://poctok.iae.nsk.su/pub/asm/Documents/IDE/ATA3R5V.ZIP
 * ftp://ftp.fee.vutbr.cz/pub/doc/io/ata/ata-3/ata3r5v.zip
 */

#ifndef	_ATA_H
#define _ATA_H

#include <libata.h>

/* Register addressing depends on the hardware design; for instance,
 * 8-bit (register) and 16-bit (data) accesses might use different
 * address spaces. This is implemented by the following definitions.
 */
#ifndef CONFIG_SYS_ATA_STRIDE
#define CONFIG_SYS_ATA_STRIDE	1
#endif

#define ATA_IO_DATA(x)	(CONFIG_SYS_ATA_DATA_OFFSET+((x) * CONFIG_SYS_ATA_STRIDE))
#define ATA_IO_REG(x)	(CONFIG_SYS_ATA_REG_OFFSET +((x) * CONFIG_SYS_ATA_STRIDE))
#define ATA_IO_ALT(x)	(CONFIG_SYS_ATA_ALT_OFFSET +((x) * CONFIG_SYS_ATA_STRIDE))

/*
 * I/O Register Descriptions
 */
#define ATA_DATA_REG	ATA_IO_DATA(0)
#define ATA_ERROR_REG	ATA_IO_REG(1)
#define ATA_SECT_CNT	ATA_IO_REG(2)
#define ATA_SECT_NUM	ATA_IO_REG(3)
#define ATA_CYL_LOW	ATA_IO_REG(4)
#define ATA_CYL_HIGH	ATA_IO_REG(5)
#define ATA_DEV_HD	ATA_IO_REG(6)
#define ATA_COMMAND	ATA_IO_REG(7)
#define ATA_DATA_EVEN	ATA_IO_REG(8)
#define ATA_DATA_ODD	ATA_IO_REG(9)
#define ATA_STATUS	ATA_COMMAND
#define ATA_DEV_CTL	ATA_IO_ALT(6)
#define ATA_LBA_LOW	ATA_SECT_NUM
#define ATA_LBA_MID	ATA_CYL_LOW
#define ATA_LBA_HIGH	ATA_CYL_HIGH
#define ATA_LBA_SEL	ATA_DEV_CTL

/*
 * Status register bits
 */
#define ATA_STAT_BUSY	0x80	/* Device Busy			*/
#define ATA_STAT_READY	0x40	/* Device Ready			*/
#define ATA_STAT_FAULT	0x20	/* Device Fault			*/
#define ATA_STAT_SEEK	0x10	/* Device Seek Complete		*/
#define ATA_STAT_DRQ	0x08	/* Data Request (ready)		*/
#define ATA_STAT_CORR	0x04	/* Corrected Data Error		*/
#define ATA_STAT_INDEX	0x02	/* Vendor specific		*/
#define ATA_STAT_ERR	0x01	/* Error			*/

/*
 * Device / Head Register Bits
 */
#ifndef ATA_DEVICE
#define ATA_DEVICE(x)	((x & 1)<<4)
#endif /* ATA_DEVICE */
#define ATA_LBA		0xE0

/*
 * ATA Commands (only mandatory commands listed here)
 */
#define ATA_CMD_READ	0x20	/* Read Sectors (with retries)	*/
#define ATA_CMD_READN	0x21	/* Read Sectors ( no  retries)	*/
#define ATA_CMD_WRITE	0x30	/* Write Sectores (with retries)*/
#define ATA_CMD_WRITEN	0x31	/* Write Sectors  ( no  retries)*/
#define ATA_CMD_VRFY	0x40	/* Read Verify  (with retries)	*/
#define ATA_CMD_VRFYN	0x41	/* Read verify  ( no  retries)	*/
#define ATA_CMD_SEEK	0x70	/* Seek				*/
#define ATA_CMD_DIAG	0x90	/* Execute Device Diagnostic	*/
#define ATA_CMD_INIT	0x91	/* Initialize Device Parameters	*/
#define ATA_CMD_RD_MULT	0xC4	/* Read Multiple		*/
#define ATA_CMD_WR_MULT	0xC5	/* Write Multiple		*/
#define ATA_CMD_SETMULT	0xC6	/* Set Multiple Mode		*/
#define ATA_CMD_RD_DMA	0xC8	/* Read DMA (with retries)	*/
#define ATA_CMD_RD_DMAN	0xC9	/* Read DMS ( no  retries)	*/
#define ATA_CMD_WR_DMA	0xCA	/* Write DMA (with retries)	*/
#define ATA_CMD_WR_DMAN	0xCB	/* Write DMA ( no  retires)	*/
#define ATA_CMD_IDENT	0xEC	/* Identify Device		*/
#define ATA_CMD_SETF	0xEF	/* Set Features			*/
#define ATA_CMD_CHK_PWR	0xE5	/* Check Power Mode		*/

#define ATA_CMD_READ_EXT 0x24	/* Read Sectors (with retries)	with 48bit addressing */
#define ATA_CMD_WRITE_EXT	0x34	/* Write Sectores (with retries) with 48bit addressing */
#define ATA_CMD_VRFY_EXT	0x42	/* Read Verify	(with retries)	with 48bit addressing */

#define ATA_CMD_FLUSH 0xE7 /* Flush drive cache */
#define ATA_CMD_FLUSH_EXT 0xEA /* Flush drive cache, with 48bit addressing */

/*
 * ATAPI Commands
 */
#define ATAPI_CMD_IDENT 0xA1 /* Identify AT Atachment Packed Interface Device */
#define ATAPI_CMD_PACKET 0xA0 /* Packed Command */


#define ATAPI_CMD_INQUIRY 0x12
#define ATAPI_CMD_REQ_SENSE 0x03
#define ATAPI_CMD_READ_CAP 0x25
#define ATAPI_CMD_START_STOP 0x1B
#define ATAPI_CMD_READ_12 0xA8


#define ATA_GET_ERR()	inb(ATA_STATUS)
#define ATA_GET_STAT()	inb(ATA_STATUS)
#define ATA_OK_STAT(stat,good,bad)	(((stat)&((good)|(bad)))==(good))
#define ATA_BAD_R_STAT	(ATA_STAT_BUSY	| ATA_STAT_ERR)
#define ATA_BAD_W_STAT	(ATA_BAD_R_STAT	| ATA_STAT_FAULT)
#define ATA_BAD_STAT	(ATA_BAD_R_STAT	| ATA_STAT_DRQ)
#define ATA_DRIVE_READY	(ATA_READY_STAT	| ATA_STAT_SEEK)
#define ATA_DATA_READY	(ATA_STAT_DRQ)

#define ATA_BLOCKSIZE	512	/* bytes */
#define ATA_BLOCKSHIFT	9	/* 2 ^ ATA_BLOCKSIZESHIFT = 512 */
#define ATA_SECTORWORDS	(512 / sizeof(uint32_t))

#ifndef ATA_RESET_TIME
#define ATA_RESET_TIME	60	/* spec allows up to 31 seconds */
#endif

/* ------------------------------------------------------------------------- */

/*
 * structure returned by ATA_CMD_IDENT, as per ANSI ATA2 rev.2f spec
 */
typedef struct hd_driveid {
	unsigned short	config;		/* lots of obsolete bit flags */
	unsigned short	cyls;		/* "physical" cyls */
	unsigned short	reserved2;	/* reserved (word 2) */
	unsigned short	heads;		/* "physical" heads */
	unsigned short	track_bytes;	/* unformatted bytes per track */
	unsigned short	sector_bytes;	/* unformatted bytes per sector */
	unsigned short	sectors;	/* "physical" sectors per track */
	unsigned short	vendor0;	/* vendor unique */
	unsigned short	vendor1;	/* vendor unique */
	unsigned short	vendor2;	/* vendor unique */
	unsigned char	serial_no[20];	/* 0 = not_specified */
	unsigned short	buf_type;
	unsigned short	buf_size;	/* 512 byte increments; 0 = not_specified */
	unsigned short	ecc_bytes;	/* for r/w long cmds; 0 = not_specified */
	unsigned char	fw_rev[8];	/* 0 = not_specified */
	unsigned char	model[40];	/* 0 = not_specified */
	unsigned char	max_multsect;	/* 0=not_implemented */
	unsigned char	vendor3;	/* vendor unique */
	unsigned short	dword_io;	/* 0=not_implemented; 1=implemented */
	unsigned char	vendor4;	/* vendor unique */
	unsigned char	capability;	/* bits 0:DMA 1:LBA 2:IORDYsw 3:IORDYsup*/
	unsigned short	reserved50;	/* reserved (word 50) */
	unsigned char	vendor5;	/* vendor unique */
	unsigned char	tPIO;		/* 0=slow, 1=medium, 2=fast */
	unsigned char	vendor6;	/* vendor unique */
	unsigned char	tDMA;		/* 0=slow, 1=medium, 2=fast */
	unsigned short	field_valid;	/* bits 0:cur_ok 1:eide_ok */
	unsigned short	cur_cyls;	/* logical cylinders */
	unsigned short	cur_heads;	/* logical heads */
	unsigned short	cur_sectors;	/* logical sectors per track */
	unsigned short	cur_capacity0;	/* logical total sectors on drive */
	unsigned short	cur_capacity1;	/*  (2 words, misaligned int)     */
	unsigned char	multsect;	/* current multiple sector count */
	unsigned char	multsect_valid;	/* when (bit0==1) multsect is ok */
	unsigned int	lba_capacity;	/* total number of sectors */
	unsigned short	dma_1word;	/* single-word dma info */
	unsigned short	dma_mword;	/* multiple-word dma info */
	unsigned short  eide_pio_modes; /* bits 0:mode3 1:mode4 */
	unsigned short  eide_dma_min;	/* min mword dma cycle time (ns) */
	unsigned short  eide_dma_time;	/* recommended mword dma cycle time (ns) */
	unsigned short  eide_pio;       /* min cycle time (ns), no IORDY  */
	unsigned short  eide_pio_iordy; /* min cycle time (ns), with IORDY */
	unsigned short	words69_70[2];	/* reserved words 69-70 */
	unsigned short	words71_74[4];	/* reserved words 71-74 */
	unsigned short  queue_depth;	/*  */
	unsigned short  words76_79[4];	/* reserved words 76-79 */
	unsigned short  major_rev_num;	/*  */
	unsigned short  minor_rev_num;	/*  */
	unsigned short  command_set_1;	/* bits 0:Smart 1:Security 2:Removable 3:PM */
	unsigned short	command_set_2;	/* bits 14:Smart Enabled 13:0 zero 10:lba48 support*/
	unsigned short  cfsse;		/* command set-feature supported extensions */
	unsigned short  cfs_enable_1;	/* command set-feature enabled */
	unsigned short  cfs_enable_2;	/* command set-feature enabled */
	unsigned short  csf_default;	/* command set-feature default */
	unsigned short  dma_ultra;	/*  */
	unsigned short	word89;		/* reserved (word 89) */
	unsigned short	word90;		/* reserved (word 90) */
	unsigned short	CurAPMvalues;	/* current APM values */
	unsigned short	word92;		/* reserved (word 92) */
	unsigned short	hw_config;	/* hardware config */
	unsigned short	words94_99[6];/* reserved words 94-99 */
	/*unsigned long long  lba48_capacity; /--* 4 16bit values containing lba 48 total number of sectors */
	unsigned short	lba48_capacity[4]; /* 4 16bit values containing lba 48 total number of sectors */
	unsigned short	words104_125[22];/* reserved words 104-125 */
	unsigned short	last_lun;	/* reserved (word 126) */
	unsigned short	word127;	/* reserved (word 127) */
	unsigned short	dlf;		/* device lock function
					 * 15:9	reserved
					 * 8	security level 1:max 0:high
					 * 7:6	reserved
					 * 5	enhanced erase
					 * 4	expire
					 * 3	frozen
					 * 2	locked
					 * 1	en/disabled
					 * 0	capability
					 */
	unsigned short  csfo;		/* current set features options
					 * 15:4	reserved
					 * 3	auto reassign
					 * 2	reverting
					 * 1	read-look-ahead
					 * 0	write cache
					 */
	unsigned short	words130_155[26];/* reserved vendor words 130-155 */
	unsigned short	word156;
	unsigned short	words157_159[3];/* reserved vendor words 157-159 */
	unsigned short	words160_162[3];/* reserved words 160-162 */
	unsigned short	cf_advanced_caps;
	unsigned short	words164_255[92];/* reserved words 164-255 */
} hd_driveid_t;


/*
 * PIO Mode Configuration
 *
 * See ATA-3 (AT Attachment-3 Interface) documentation, Figure 14 / Table 21
 */

typedef struct {
	unsigned int	t_setup;	/* Setup  Time in [ns] or clocks	*/
	unsigned int	t_length;	/* Length Time in [ns] or clocks	*/
	unsigned int	t_hold;		/* Hold   Time in [ns] or clocks	*/
}
pio_config_t;

#define	IDE_MAX_PIO_MODE	4	/* max suppurted PIO mode		*/

/* ------------------------------------------------------------------------- */

#endif /* _ATA_H */
Commit	Line	Data
83d290c5	1	/* SPDX-License-Identifier: GPL-2.0+ */
fe8c2806 WD	2	/*
	3	* (C) Copyright 2000
	4	* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
fe8c2806 WD	5	*/
	6
	7	/*
	8	* Most of the following information was derived from the document
	9	* "Information Technology - AT Attachment-3 Interface (ATA-3)"
	10	* which can be found at:
	11	* http://www.dt.wdc.com/ata/ata-3/ata3r5v.zip
	12	* ftp://poctok.iae.nsk.su/pub/asm/Documents/IDE/ATA3R5V.ZIP
	13	* ftp://ftp.fee.vutbr.cz/pub/doc/io/ata/ata-3/ata3r5v.zip
	14	*/
	15
	16	#ifndef _ATA_H
	17	#define _ATA_H
	18
9571b84c SF	19	#include <libata.h>
9571b84c SF	20
fe8c2806 WD	21	/* Register addressing depends on the hardware design; for instance,
	22	* 8-bit (register) and 16-bit (data) accesses might use different
	23	* address spaces. This is implemented by the following definitions.
	24	*/
6d0f6bcf JCPV	25	#ifndef CONFIG_SYS_ATA_STRIDE
6d0f6bcf JCPV	26	#define CONFIG_SYS_ATA_STRIDE 1
9fd5e31f	27	#endif
fe8c2806	28
6d0f6bcf JCPV	29	#define ATA_IO_DATA(x) (CONFIG_SYS_ATA_DATA_OFFSET+((x) * CONFIG_SYS_ATA_STRIDE))
	30	#define ATA_IO_REG(x) (CONFIG_SYS_ATA_REG_OFFSET +((x) * CONFIG_SYS_ATA_STRIDE))
	31	#define ATA_IO_ALT(x) (CONFIG_SYS_ATA_ALT_OFFSET +((x) * CONFIG_SYS_ATA_STRIDE))
fe8c2806 WD	32
	33	/*
	34	* I/O Register Descriptions
	35	*/
	36	#define ATA_DATA_REG ATA_IO_DATA(0)
	37	#define ATA_ERROR_REG ATA_IO_REG(1)
	38	#define ATA_SECT_CNT ATA_IO_REG(2)
	39	#define ATA_SECT_NUM ATA_IO_REG(3)
	40	#define ATA_CYL_LOW ATA_IO_REG(4)
	41	#define ATA_CYL_HIGH ATA_IO_REG(5)
	42	#define ATA_DEV_HD ATA_IO_REG(6)
	43	#define ATA_COMMAND ATA_IO_REG(7)
a522fa0e WD	44	#define ATA_DATA_EVEN ATA_IO_REG(8)
a522fa0e WD	45	#define ATA_DATA_ODD ATA_IO_REG(9)
fe8c2806 WD	46	#define ATA_STATUS ATA_COMMAND
	47	#define ATA_DEV_CTL ATA_IO_ALT(6)
	48	#define ATA_LBA_LOW ATA_SECT_NUM
	49	#define ATA_LBA_MID ATA_CYL_LOW
	50	#define ATA_LBA_HIGH ATA_CYL_HIGH
	51	#define ATA_LBA_SEL ATA_DEV_CTL
	52
	53	/*
	54	* Status register bits
	55	*/
	56	#define ATA_STAT_BUSY 0x80 /* Device Busy */
	57	#define ATA_STAT_READY 0x40 /* Device Ready */
	58	#define ATA_STAT_FAULT 0x20 /* Device Fault */
	59	#define ATA_STAT_SEEK 0x10 /* Device Seek Complete */
	60	#define ATA_STAT_DRQ 0x08 /* Data Request (ready) */
	61	#define ATA_STAT_CORR 0x04 /* Corrected Data Error */
	62	#define ATA_STAT_INDEX 0x02 /* Vendor specific */
	63	#define ATA_STAT_ERR 0x01 /* Error */
	64
	65	/*
	66	* Device / Head Register Bits
	67	*/
2b224609	68	#ifndef ATA_DEVICE
fe8c2806	69	#define ATA_DEVICE(x) ((x & 1)<<4)
2b224609	70	#endif /* ATA_DEVICE */
fe8c2806 WD	71	#define ATA_LBA 0xE0
	72
	73	/*
	74	* ATA Commands (only mandatory commands listed here)
	75	*/
	76	#define ATA_CMD_READ 0x20 /* Read Sectors (with retries) */
	77	#define ATA_CMD_READN 0x21 /* Read Sectors ( no retries) */
	78	#define ATA_CMD_WRITE 0x30 /* Write Sectores (with retries)*/
	79	#define ATA_CMD_WRITEN 0x31 /* Write Sectors ( no retries)*/
	80	#define ATA_CMD_VRFY 0x40 /* Read Verify (with retries) */
	81	#define ATA_CMD_VRFYN 0x41 /* Read verify ( no retries) */
	82	#define ATA_CMD_SEEK 0x70 /* Seek */
	83	#define ATA_CMD_DIAG 0x90 /* Execute Device Diagnostic */
	84	#define ATA_CMD_INIT 0x91 /* Initialize Device Parameters */
	85	#define ATA_CMD_RD_MULT 0xC4 /* Read Multiple */
	86	#define ATA_CMD_WR_MULT 0xC5 /* Write Multiple */
	87	#define ATA_CMD_SETMULT 0xC6 /* Set Multiple Mode */
	88	#define ATA_CMD_RD_DMA 0xC8 /* Read DMA (with retries) */
	89	#define ATA_CMD_RD_DMAN 0xC9 /* Read DMS ( no retries) */
	90	#define ATA_CMD_WR_DMA 0xCA /* Write DMA (with retries) */
	91	#define ATA_CMD_WR_DMAN 0xCB /* Write DMA ( no retires) */
	92	#define ATA_CMD_IDENT 0xEC /* Identify Device */
	93	#define ATA_CMD_SETF 0xEF /* Set Features */
	94	#define ATA_CMD_CHK_PWR 0xE5 /* Check Power Mode */
	95
c40b2956 WD	96	#define ATA_CMD_READ_EXT 0x24 /* Read Sectors (with retries) with 48bit addressing */
	97	#define ATA_CMD_WRITE_EXT 0x34 /* Write Sectores (with retries) with 48bit addressing */
	98	#define ATA_CMD_VRFY_EXT 0x42 /* Read Verify (with retries) with 48bit addressing */
	99
766b16fe MJ	100	#define ATA_CMD_FLUSH 0xE7 /* Flush drive cache */
	101	#define ATA_CMD_FLUSH_EXT 0xEA /* Flush drive cache, with 48bit addressing */
	102
fe8c2806 WD	103	/*
	104	* ATAPI Commands
	105	*/
	106	#define ATAPI_CMD_IDENT 0xA1 /* Identify AT Atachment Packed Interface Device */
	107	#define ATAPI_CMD_PACKET 0xA0 /* Packed Command */
	108
	109
	110	#define ATAPI_CMD_INQUIRY 0x12
	111	#define ATAPI_CMD_REQ_SENSE 0x03
	112	#define ATAPI_CMD_READ_CAP 0x25
	113	#define ATAPI_CMD_START_STOP 0x1B
	114	#define ATAPI_CMD_READ_12 0xA8
	115
	116
	117	#define ATA_GET_ERR() inb(ATA_STATUS)
	118	#define ATA_GET_STAT() inb(ATA_STATUS)
	119	#define ATA_OK_STAT(stat,good,bad) (((stat)&((good)\|(bad)))==(good))
	120	#define ATA_BAD_R_STAT (ATA_STAT_BUSY \| ATA_STAT_ERR)
	121	#define ATA_BAD_W_STAT (ATA_BAD_R_STAT \| ATA_STAT_FAULT)
	122	#define ATA_BAD_STAT (ATA_BAD_R_STAT \| ATA_STAT_DRQ)
	123	#define ATA_DRIVE_READY (ATA_READY_STAT \| ATA_STAT_SEEK)
	124	#define ATA_DATA_READY (ATA_STAT_DRQ)
	125
	126	#define ATA_BLOCKSIZE 512 /* bytes */
	127	#define ATA_BLOCKSHIFT 9 /* 2 ^ ATA_BLOCKSIZESHIFT = 512 */
d92ea983	128	#define ATA_SECTORWORDS (512 / sizeof(uint32_t))
fe8c2806 WD	129
	130	#ifndef ATA_RESET_TIME
	131	#define ATA_RESET_TIME 60 /* spec allows up to 31 seconds */
	132	#endif
	133
	134	/* ------------------------------------------------------------------------- */
	135
	136	/*
	137	* structure returned by ATA_CMD_IDENT, as per ANSI ATA2 rev.2f spec
	138	*/
	139	typedef struct hd_driveid {
	140	unsigned short config; /* lots of obsolete bit flags */
	141	unsigned short cyls; /* "physical" cyls */
	142	unsigned short reserved2; /* reserved (word 2) */
	143	unsigned short heads; /* "physical" heads */
	144	unsigned short track_bytes; /* unformatted bytes per track */
	145	unsigned short sector_bytes; /* unformatted bytes per sector */
	146	unsigned short sectors; /* "physical" sectors per track */
	147	unsigned short vendor0; /* vendor unique */
	148	unsigned short vendor1; /* vendor unique */
	149	unsigned short vendor2; /* vendor unique */
	150	unsigned char serial_no[20]; /* 0 = not_specified */
	151	unsigned short buf_type;
	152	unsigned short buf_size; /* 512 byte increments; 0 = not_specified */
	153	unsigned short ecc_bytes; /* for r/w long cmds; 0 = not_specified */
	154	unsigned char fw_rev[8]; /* 0 = not_specified */
	155	unsigned char model[40]; /* 0 = not_specified */
	156	unsigned char max_multsect; /* 0=not_implemented */
	157	unsigned char vendor3; /* vendor unique */
	158	unsigned short dword_io; /* 0=not_implemented; 1=implemented */
	159	unsigned char vendor4; /* vendor unique */
	160	unsigned char capability; /* bits 0:DMA 1:LBA 2:IORDYsw 3:IORDYsup*/
	161	unsigned short reserved50; /* reserved (word 50) */
	162	unsigned char vendor5; /* vendor unique */
	163	unsigned char tPIO; /* 0=slow, 1=medium, 2=fast */
	164	unsigned char vendor6; /* vendor unique */
	165	unsigned char tDMA; /* 0=slow, 1=medium, 2=fast */
	166	unsigned short field_valid; /* bits 0:cur_ok 1:eide_ok */
	167	unsigned short cur_cyls; /* logical cylinders */
	168	unsigned short cur_heads; /* logical heads */
	169	unsigned short cur_sectors; /* logical sectors per track */
	170	unsigned short cur_capacity0; /* logical total sectors on drive */
	171	unsigned short cur_capacity1; /* (2 words, misaligned int) */
	172	unsigned char multsect; /* current multiple sector count */
	173	unsigned char multsect_valid; /* when (bit0==1) multsect is ok */
	174	unsigned int lba_capacity; /* total number of sectors */
	175	unsigned short dma_1word; /* single-word dma info */
	176	unsigned short dma_mword; /* multiple-word dma info */
	177	unsigned short eide_pio_modes; /* bits 0:mode3 1:mode4 */
	178	unsigned short eide_dma_min; /* min mword dma cycle time (ns) */
	179	unsigned short eide_dma_time; /* recommended mword dma cycle time (ns) */
	180	unsigned short eide_pio; /* min cycle time (ns), no IORDY */
	181	unsigned short eide_pio_iordy; /* min cycle time (ns), with IORDY */
	182	unsigned short words69_70[2]; /* reserved words 69-70 */
	183	unsigned short words71_74[4]; /* reserved words 71-74 */
	184	unsigned short queue_depth; /* */
	185	unsigned short words76_79[4]; /* reserved words 76-79 */
	186	unsigned short major_rev_num; /* */
	187	unsigned short minor_rev_num; /* */
	188	unsigned short command_set_1; /* bits 0:Smart 1:Security 2:Removable 3:PM */
c40b2956	189	unsigned short command_set_2; /* bits 14:Smart Enabled 13:0 zero 10:lba48 support*/
fe8c2806 WD	190	unsigned short cfsse; /* command set-feature supported extensions */
	191	unsigned short cfs_enable_1; /* command set-feature enabled */
	192	unsigned short cfs_enable_2; /* command set-feature enabled */
	193	unsigned short csf_default; /* command set-feature default */
	194	unsigned short dma_ultra; /* */
	195	unsigned short word89; /* reserved (word 89) */
	196	unsigned short word90; /* reserved (word 90) */
	197	unsigned short CurAPMvalues; /* current APM values */
	198	unsigned short word92; /* reserved (word 92) */
	199	unsigned short hw_config; /* hardware config */
c40b2956	200	unsigned short words94_99[6];/* reserved words 94-99 */
42dfe7a1	201	/unsigned long long lba48_capacity; /-- 4 16bit values containing lba 48 total number of sectors */
c40b2956 WD	202	unsigned short lba48_capacity[4]; /* 4 16bit values containing lba 48 total number of sectors */
c40b2956 WD	203	unsigned short words104_125[22];/* reserved words 104-125 */
fe8c2806 WD	204	unsigned short last_lun; /* reserved (word 126) */
	205	unsigned short word127; /* reserved (word 127) */
	206	unsigned short dlf; /* device lock function
	207	* 15:9 reserved
	208	* 8 security level 1:max 0:high
	209	* 7:6 reserved
	210	* 5 enhanced erase
	211	* 4 expire
	212	* 3 frozen
	213	* 2 locked
	214	* 1 en/disabled
	215	* 0 capability
	216	*/
	217	unsigned short csfo; /* current set features options
	218	* 15:4 reserved
	219	* 3 auto reassign
	220	* 2 reverting
	221	* 1 read-look-ahead
	222	* 0 write cache
	223	*/
	224	unsigned short words130_155[26];/* reserved vendor words 130-155 */
	225	unsigned short word156;
	226	unsigned short words157_159[3];/* reserved vendor words 157-159 */
36c2d306 SF	227	unsigned short words160_162[3];/* reserved words 160-162 */
	228	unsigned short cf_advanced_caps;
	229	unsigned short words164_255[92];/* reserved words 164-255 */
fe8c2806 WD	230	} hd_driveid_t;
	231
	232
	233	/*
	234	* PIO Mode Configuration
	235	*
	236	* See ATA-3 (AT Attachment-3 Interface) documentation, Figure 14 / Table 21
	237	*/
	238
	239	typedef struct {
	240	unsigned int t_setup; /* Setup Time in [ns] or clocks */
	241	unsigned int t_length; /* Length Time in [ns] or clocks */
	242	unsigned int t_hold; /* Hold Time in [ns] or clocks */
	243	}
	244	pio_config_t;
	245
	246	#define IDE_MAX_PIO_MODE 4 /* max suppurted PIO mode */
	247
	248	/* ------------------------------------------------------------------------- */
	249
	250	#endif /* _ATA_H */