projects / thirdparty / u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| 83d290c5 | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
| 320cf350 YS |
2 | /* |
| 3 | * Configuation settings for the sh7753evb board | |
| 4 | * | |
| 5 | * Copyright (C) 2012 Renesas Solutions Corp. | |
| 320cf350 YS |
6 | */ |
| 7 | ||
| 8 | #ifndef __SH7753EVB_H | |
| 9 | #define __SH7753EVB_H | |
| 10 | ||
| 320cf350 | 11 | #define CONFIG_CPU_SH7753 1 |
| 320cf350 | 12 | |
| 18a40e84 | 13 | #define CONFIG_DISPLAY_BOARDINFO |
| 320cf350 | 14 | #undef CONFIG_SHOW_BOOT_PROGRESS |
| 320cf350 YS |
15 | |
| 16 | /* MEMORY */ | |
| 17 | #define SH7753EVB_SDRAM_BASE (0x40000000) | |
| 18 | #define SH7753EVB_SDRAM_SIZE (512 * 1024 * 1024) | |
| 19 | ||
| 320cf350 | 20 | #define CONFIG_SYS_PBSIZE 256 |
| 320cf350 YS |
21 | #define CONFIG_SYS_BAUDRATE_TABLE { 115200 } |
| 22 | ||
| 23 | /* SCIF */ | |
| 320cf350 | 24 | #define CONFIG_CONS_SCIF2 1 |
| 320cf350 YS |
25 | |
| 26 | #define CONFIG_SYS_MEMTEST_START (SH7753EVB_SDRAM_BASE) | |
| 27 | #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \ | |
| 28 | 480 * 1024 * 1024) | |
| 320cf350 YS |
29 | #undef CONFIG_SYS_MEMTEST_SCRATCH |
| 30 | #undef CONFIG_SYS_LOADS_BAUD_CHANGE | |
| 31 | ||
| 32 | #define CONFIG_SYS_SDRAM_BASE (SH7753EVB_SDRAM_BASE) | |
| 33 | #define CONFIG_SYS_SDRAM_SIZE (SH7753EVB_SDRAM_SIZE) | |
| 34 | #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + \ | |
| 35 | 128 * 1024 * 1024) | |
| 36 | ||
| 37 | #define CONFIG_SYS_MONITOR_BASE 0x00000000 | |
| 38 | #define CONFIG_SYS_MONITOR_LEN (512 * 1024) | |
| 39 | #define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024) | |
| 40 | #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) | |
| 41 | ||
| 320cf350 | 42 | /* Ether */ |
| 320cf350 YS |
43 | #define CONFIG_SH_ETHER_USE_PORT 0 |
| 44 | #define CONFIG_SH_ETHER_PHY_ADDR 18 | |
| 45 | #define CONFIG_SH_ETHER_CACHE_WRITEBACK 1 | |
| 46 | #define CONFIG_SH_ETHER_USE_GETHER 1 | |
| 320cf350 YS |
47 | #define CONFIG_BITBANGMII |
| 48 | #define CONFIG_BITBANGMII_MULTI | |
| 49 | #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RGMII | |
| 50 | #define CONFIG_PHY_VITESSE | |
| 51 | ||
| 52 | #define SH7753EVB_ETHERNET_MAC_BASE_SPI 0x00090000 | |
| 53 | #define SH7753EVB_SPI_SECTOR_SIZE (64 * 1024) | |
| 54 | #define SH7753EVB_ETHERNET_MAC_BASE SH7753EVB_ETHERNET_MAC_BASE_SPI | |
| 55 | #define SH7753EVB_ETHERNET_MAC_SIZE 17 | |
| 56 | #define SH7753EVB_ETHERNET_NUM_CH 2 | |
| 320cf350 YS |
57 | |
| 58 | /* SPI */ | |
| 320cf350 | 59 | #define CONFIG_SH_SPI_BASE 0xfe002000 |
| 320cf350 YS |
60 | |
| 61 | /* MMCIF */ | |
| 320cf350 YS |
62 | #define CONFIG_SH_MMCIF_ADDR 0xffcb0000 |
| 63 | #define CONFIG_SH_MMCIF_CLK 48000000 | |
| 64 | ||
| 65 | /* ENV setting */ | |
| 320cf350 YS |
66 | #define CONFIG_ENV_SECT_SIZE (64 * 1024) |
| 67 | #define CONFIG_ENV_ADDR (0x00080000) | |
| 68 | #define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR) | |
| 69 | #define CONFIG_ENV_OVERWRITE 1 | |
| 70 | #define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE) | |
| 71 | #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE) | |
| 72 | #define CONFIG_EXTRA_ENV_SETTINGS \ | |
| 73 | "netboot=bootp; bootm\0" | |
| 74 | ||
| 75 | /* Board Clock */ | |
| 76 | #define CONFIG_SYS_CLK_FREQ 48000000 | |
| 320cf350 | 77 | #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ |
| 320cf350 | 78 | #endif /* __SH7753EVB_H */ |