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83d290c5 | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
cba69eee IC |
2 | /* |
3 | * (C) Copyright 2012-2012 Henrik Nordstrom <henrik@henriknordstrom.net> | |
4 | * | |
5 | * (C) Copyright 2007-2011 | |
6 | * Allwinner Technology Co., Ltd. <www.allwinnertech.com> | |
7 | * Tom Cubie <tangliang@allwinnertech.com> | |
8 | * | |
9 | * Configuration settings for the Allwinner sunxi series of boards. | |
cba69eee IC |
10 | */ |
11 | ||
12 | #ifndef _SUNXI_COMMON_CONFIG_H | |
13 | #define _SUNXI_COMMON_CONFIG_H | |
14 | ||
daf6d399 | 15 | #include <asm/arch/cpu.h> |
e049fe28 HG |
16 | #include <linux/stringify.h> |
17 | ||
77ef1369 SS |
18 | #ifdef CONFIG_OLD_SUNXI_KERNEL_COMPAT |
19 | /* | |
20 | * The U-Boot workarounds bugs in the outdated buggy sunxi-3.4 kernels at the | |
21 | * expense of restricting some features, so the regular machine id values can | |
22 | * be used. | |
23 | */ | |
24 | # define CONFIG_MACH_TYPE_COMPAT_REV 0 | |
25 | #else | |
26 | /* | |
27 | * A compatibility guard to prevent loading outdated buggy sunxi-3.4 kernels. | |
28 | * Only sunxi-3.4 kernels with appropriate fixes applied are able to pass | |
29 | * beyond the machine id check. | |
30 | */ | |
31 | # define CONFIG_MACH_TYPE_COMPAT_REV 1 | |
32 | #endif | |
33 | ||
d29adf8e | 34 | #ifdef CONFIG_ARM64 |
e628f008 | 35 | #define CONFIG_SYS_BOOTM_LEN (32 << 20) |
d29adf8e AP |
36 | #endif |
37 | ||
cba69eee | 38 | /* Serial & console */ |
cba69eee IC |
39 | #define CONFIG_SYS_NS16550_SERIAL |
40 | /* ns16550 reg in the low bits of cpu reg */ | |
cba69eee | 41 | #define CONFIG_SYS_NS16550_CLK 24000000 |
4fb60552 | 42 | #ifndef CONFIG_DM_SERIAL |
1a81cf83 SG |
43 | # define CONFIG_SYS_NS16550_REG_SIZE -4 |
44 | # define CONFIG_SYS_NS16550_COM1 SUNXI_UART0_BASE | |
45 | # define CONFIG_SYS_NS16550_COM2 SUNXI_UART1_BASE | |
46 | # define CONFIG_SYS_NS16550_COM3 SUNXI_UART2_BASE | |
47 | # define CONFIG_SYS_NS16550_COM4 SUNXI_UART3_BASE | |
48 | # define CONFIG_SYS_NS16550_COM5 SUNXI_R_UART_BASE | |
49 | #endif | |
cba69eee | 50 | |
8a65f69c | 51 | /* CPU */ |
e4916e85 | 52 | #define COUNTER_FREQUENCY 24000000 |
8a65f69c | 53 | |
e049fe28 HG |
54 | /* |
55 | * The DRAM Base differs between some models. We cannot use macros for the | |
56 | * CONFIG_FOO defines which contain the DRAM base address since they end | |
57 | * up unexpanded in include/autoconf.mk . | |
58 | * | |
59 | * So we have to have this #ifdef #else #endif block for these. | |
60 | */ | |
61 | #ifdef CONFIG_MACH_SUN9I | |
62 | #define SDRAM_OFFSET(x) 0x2##x | |
63 | #define CONFIG_SYS_SDRAM_BASE 0x20000000 | |
64 | #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* default load address */ | |
ff42d107 HG |
65 | /* Note SPL_STACK_R_ADDR is set through Kconfig, we include it here |
66 | * since it needs to fit in with the other values. By also #defining it | |
67 | * we get warnings if the Kconfig value mismatches. */ | |
68 | #define CONFIG_SPL_STACK_R_ADDR 0x2fe00000 | |
e049fe28 HG |
69 | #define CONFIG_SPL_BSS_START_ADDR 0x2ff80000 |
70 | #else | |
71 | #define SDRAM_OFFSET(x) 0x4##x | |
cba69eee | 72 | #define CONFIG_SYS_SDRAM_BASE 0x40000000 |
e049fe28 | 73 | #define CONFIG_SYS_LOAD_ADDR 0x42000000 /* default load address */ |
c199489f | 74 | /* V3s do not have enough memory to place code at 0x4a000000 */ |
ff42d107 HG |
75 | /* Note SPL_STACK_R_ADDR is set through Kconfig, we include it here |
76 | * since it needs to fit in with the other values. By also #defining it | |
77 | * we get warnings if the Kconfig value mismatches. */ | |
78 | #define CONFIG_SPL_STACK_R_ADDR 0x4fe00000 | |
e049fe28 HG |
79 | #define CONFIG_SPL_BSS_START_ADDR 0x4ff80000 |
80 | #endif | |
81 | ||
82 | #define CONFIG_SPL_BSS_MAX_SIZE 0x00080000 /* 512 KiB */ | |
e049fe28 | 83 | |
77fe9887 HG |
84 | /* |
85 | * The A80's A1 sram starts at 0x00010000 rather then at 0x00000000 and is | |
86 | * slightly bigger. Note that it is possible to map the first 32 KiB of the | |
87 | * A1 at 0x00000000 like with older SoCs by writing 0x16aa0001 to the | |
88 | * undocumented 0x008000e0 SYS_CTRL register. Where the 16aa is a key and | |
89 | * the 1 actually activates the mapping of the first 32 KiB to 0x00000000. | |
cadc7c20 IZ |
90 | * A64 and H5 also has SRAM A1 at 0x00010000, but no magic remap register |
91 | * is known yet. | |
92 | * H6 has SRAM A1 at 0x00020000. | |
77fe9887 | 93 | */ |
cadc7c20 IZ |
94 | #define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SUNXI_SRAM_ADDRESS |
95 | /* FIXME: this may be larger on some SoCs */ | |
96 | #define CONFIG_SYS_INIT_RAM_SIZE 0x8000 /* 32 KiB */ | |
cba69eee IC |
97 | |
98 | #define CONFIG_SYS_INIT_SP_OFFSET \ | |
99 | (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) | |
100 | #define CONFIG_SYS_INIT_SP_ADDR \ | |
101 | (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) | |
102 | ||
cba69eee IC |
103 | #define PHYS_SDRAM_0 CONFIG_SYS_SDRAM_BASE |
104 | #define PHYS_SDRAM_0_SIZE 0x80000000 /* 2 GiB */ | |
105 | ||
a6e50a88 | 106 | #ifdef CONFIG_AHCI |
0751b138 | 107 | #define CONFIG_SYS_64BIT_LBA |
a6e50a88 IC |
108 | #endif |
109 | ||
cba69eee IC |
110 | #define CONFIG_SETUP_MEMORY_TAGS |
111 | #define CONFIG_CMDLINE_TAG | |
112 | #define CONFIG_INITRD_TAG | |
9f852211 | 113 | #define CONFIG_SERIAL_TAG |
cba69eee | 114 | |
e5268616 | 115 | #ifdef CONFIG_NAND_SUNXI |
a0dfa88b | 116 | #define CONFIG_SYS_NAND_MAX_ECCPOS 1664 |
4ccae81c BB |
117 | #define CONFIG_SYS_NAND_ONFI_DETECTION |
118 | #define CONFIG_SYS_MAX_NAND_DEVICE 8 | |
960caeba PZ |
119 | #endif |
120 | ||
19e99fb4 | 121 | #ifdef CONFIG_SPL_SPI_SUNXI |
19e99fb4 SS |
122 | #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8000 |
123 | #endif | |
124 | ||
e24ea55c | 125 | /* mmc config */ |
44c79879 | 126 | #ifdef CONFIG_MMC |
e24ea55c | 127 | #define CONFIG_MMC_SUNXI_SLOT 0 |
fb1c43cc MR |
128 | #endif |
129 | ||
130 | #if defined(CONFIG_ENV_IS_IN_MMC) | |
99219664 MR |
131 | |
132 | #ifdef CONFIG_ARM64 | |
133 | /* | |
134 | * This is actually (CONFIG_ENV_OFFSET - | |
135 | * (CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)), but the value will be used | |
136 | * directly in a makefile, without the preprocessor expansion. | |
137 | */ | |
138 | #define CONFIG_BOARD_SIZE_LIMIT 0x7e000 | |
139 | #endif | |
140 | ||
de86fc38 MR |
141 | #if CONFIG_MMC_SUNXI_SLOT_EXTRA != -1 |
142 | /* If we have two devices (most likely eMMC + MMC), favour the eMMC */ | |
143 | #define CONFIG_SYS_MMC_ENV_DEV 1 | |
144 | #else | |
145 | /* Otherwise, use the only device we have */ | |
146 | #define CONFIG_SYS_MMC_ENV_DEV 0 | |
147 | #endif | |
ae042beb | 148 | #define CONFIG_SYS_MMC_MAX_DEVICE 4 |
ff2b47f6 | 149 | #endif |
e24ea55c | 150 | |
c199489f | 151 | #ifndef CONFIG_MACH_SUN8I_V3S |
5c965ed9 HG |
152 | /* 64MB of malloc() pool */ |
153 | #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (64 << 20)) | |
c199489f IZ |
154 | #else |
155 | /* 2MB of malloc() pool */ | |
156 | #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (2 << 20)) | |
157 | #endif | |
cba69eee IC |
158 | |
159 | /* | |
160 | * Miscellaneous configurable options | |
161 | */ | |
06beadb0 IC |
162 | #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ |
163 | #define CONFIG_SYS_PBSIZE 1024 /* Print Buffer Size */ | |
cba69eee | 164 | |
cba69eee | 165 | /* standalone support */ |
e049fe28 | 166 | #define CONFIG_STANDALONE_LOAD_ADDR CONFIG_SYS_LOAD_ADDR |
cba69eee | 167 | |
cba69eee IC |
168 | /* FLASH and environment organization */ |
169 | ||
fa5e1020 | 170 | #define CONFIG_SYS_MONITOR_LEN (768 << 10) /* 768 KiB */ |
cba69eee | 171 | |
eb77f5c9 | 172 | #ifndef CONFIG_ARM64 /* AArch64 FEL support is not ready yet */ |
942cb0b6 | 173 | #define CONFIG_SPL_BOARD_LOAD_IMAGE |
eb77f5c9 | 174 | #endif |
942cb0b6 | 175 | |
cadc7c20 IZ |
176 | /* |
177 | * We cannot use expressions here, because expressions won't be evaluated in | |
178 | * autoconf.mk. | |
179 | */ | |
180 | #if CONFIG_SUNXI_SRAM_ADDRESS == 0x10000 | |
7f0ef5a9 SS |
181 | #define CONFIG_SPL_TEXT_BASE 0x10060 /* sram start+header */ |
182 | #define CONFIG_SPL_MAX_SIZE 0x7fa0 /* 32 KiB */ | |
54522c92 AP |
183 | #ifdef CONFIG_ARM64 |
184 | /* end of SRAM A2 for now, as SRAM A1 is pretty tight for an ARM64 build */ | |
185 | #define LOW_LEVEL_SRAM_STACK 0x00054000 | |
186 | #else | |
bc613d85 | 187 | #define LOW_LEVEL_SRAM_STACK 0x00018000 |
54522c92 | 188 | #endif /* !CONFIG_ARM64 */ |
e5715e71 IZ |
189 | #elif CONFIG_SUNXI_SRAM_ADDRESS == 0x20000 |
190 | #define CONFIG_SPL_TEXT_BASE 0x20060 /* sram start+header */ | |
191 | #define CONFIG_SPL_MAX_SIZE 0x7fa0 /* 32 KiB */ | |
192 | /* end of SRAM A2 on H6 for now */ | |
193 | #define LOW_LEVEL_SRAM_STACK 0x00118000 | |
d96ebc46 | 194 | #else |
7f0ef5a9 SS |
195 | #define CONFIG_SPL_TEXT_BASE 0x60 /* sram start+header */ |
196 | #define CONFIG_SPL_MAX_SIZE 0x5fa0 /* 24KB on sun4i/sun7i */ | |
bc613d85 | 197 | #define LOW_LEVEL_SRAM_STACK 0x00008000 /* End of sram */ |
d96ebc46 | 198 | #endif |
50827a59 | 199 | |
bc613d85 AP |
200 | #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK |
201 | ||
50827a59 IC |
202 | #define CONFIG_SPL_PAD_TO 32768 /* decimal for 'dd' */ |
203 | ||
cba69eee | 204 | |
6620377e | 205 | /* I2C */ |
0d8382ae JW |
206 | #if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER || \ |
207 | defined CONFIG_SY8106A_POWER | |
ad40610b HG |
208 | #endif |
209 | ||
6c739c5d PK |
210 | #if defined CONFIG_I2C0_ENABLE || defined CONFIG_I2C1_ENABLE || \ |
211 | defined CONFIG_I2C2_ENABLE || defined CONFIG_I2C3_ENABLE || \ | |
9d082687 | 212 | defined CONFIG_I2C4_ENABLE || defined CONFIG_R_I2C_ENABLE |
6620377e | 213 | #define CONFIG_SYS_I2C_MVTWSI |
a8f01ccf JS |
214 | #ifndef CONFIG_DM_I2C |
215 | #define CONFIG_SYS_I2C | |
6620377e HG |
216 | #define CONFIG_SYS_I2C_SPEED 400000 |
217 | #define CONFIG_SYS_I2C_SLAVE 0x7f | |
8b2db32a | 218 | #endif |
a8f01ccf | 219 | #endif |
55410089 HG |
220 | |
221 | #if defined CONFIG_VIDEO_LCD_PANEL_I2C && !(defined CONFIG_SPL_BUILD) | |
222 | #define CONFIG_SYS_I2C_SOFT | |
223 | #define CONFIG_SYS_I2C_SOFT_SPEED 50000 | |
224 | #define CONFIG_SYS_I2C_SOFT_SLAVE 0x00 | |
55410089 HG |
225 | /* We use pin names in Kconfig and sunxi_name_to_gpio() */ |
226 | #define CONFIG_SOFT_I2C_GPIO_SDA soft_i2c_gpio_sda | |
227 | #define CONFIG_SOFT_I2C_GPIO_SCL soft_i2c_gpio_scl | |
228 | #ifndef __ASSEMBLY__ | |
229 | extern int soft_i2c_gpio_sda; | |
230 | extern int soft_i2c_gpio_scl; | |
231 | #endif | |
1fc42018 HG |
232 | #define CONFIG_VIDEO_LCD_I2C_BUS 0 /* The lcd panel soft i2c is bus 0 */ |
233 | #define CONFIG_SYS_SPD_BUS_NUM 1 /* And the axp209 i2c bus is bus 1 */ | |
234 | #else | |
235 | #define CONFIG_SYS_SPD_BUS_NUM 0 /* The axp209 i2c bus is bus 0 */ | |
236 | #define CONFIG_VIDEO_LCD_I2C_BUS -1 /* NA, but necessary to compile */ | |
55410089 HG |
237 | #endif |
238 | ||
14bc66bd | 239 | /* PMU */ |
95ab8fee | 240 | #if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER || \ |
0d8382ae JW |
241 | defined CONFIG_AXP221_POWER || defined CONFIG_AXP818_POWER || \ |
242 | defined CONFIG_SY8106A_POWER | |
14bc66bd HN |
243 | #endif |
244 | ||
a5da3c83 | 245 | #ifdef CONFIG_REQUIRE_SERIAL_CONSOLE |
f3133962 HG |
246 | #if CONFIG_CONS_INDEX == 1 |
247 | #ifdef CONFIG_MACH_SUN9I | |
248 | #define OF_STDOUT_PATH "/soc/serial@07000000:115200" | |
249 | #else | |
250 | #define OF_STDOUT_PATH "/soc@01c00000/serial@01c28000:115200" | |
251 | #endif | |
252 | #elif CONFIG_CONS_INDEX == 2 && defined(CONFIG_MACH_SUN5I) | |
253 | #define OF_STDOUT_PATH "/soc@01c00000/serial@01c28400:115200" | |
5cd83b11 LI |
254 | #elif CONFIG_CONS_INDEX == 3 && defined(CONFIG_MACH_SUN8I) |
255 | #define OF_STDOUT_PATH "/soc@01c00000/serial@01c28800:115200" | |
f3133962 HG |
256 | #elif CONFIG_CONS_INDEX == 5 && defined(CONFIG_MACH_SUN8I) |
257 | #define OF_STDOUT_PATH "/soc@01c00000/serial@01f02800:115200" | |
258 | #else | |
259 | #error Unsupported console port nr. Please fix stdout-path in sunxi-common.h. | |
260 | #endif | |
a5da3c83 | 261 | #endif /* ifdef CONFIG_REQUIRE_SERIAL_CONSOLE */ |
f3133962 | 262 | |
abce2c62 IC |
263 | /* GPIO */ |
264 | #define CONFIG_SUNXI_GPIO | |
abce2c62 | 265 | |
401a3ca0 | 266 | #ifdef CONFIG_VIDEO_SUNXI |
7f2c521f | 267 | /* |
5633a296 HG |
268 | * The amount of RAM to keep free at the top of RAM when relocating u-boot, |
269 | * to use as framebuffer. This must be a multiple of 4096. | |
7f2c521f | 270 | */ |
5c965ed9 | 271 | #define CONFIG_SUNXI_MAX_FB_SIZE (16 << 20) |
7f2c521f | 272 | |
7f2c521f | 273 | #define CONFIG_VIDEO_LOGO |
be8ec633 | 274 | #define CONFIG_VIDEO_STD_TIMINGS |
75481607 | 275 | #define CONFIG_I2C_EDID |
58332f89 | 276 | #define VIDEO_LINE_LEN (pGD->plnSizeX) |
7f2c521f LV |
277 | |
278 | /* allow both serial and cfb console. */ | |
7f2c521f | 279 | /* stop x86 thinking in cfbconsole from trying to init a pc keyboard */ |
7f2c521f | 280 | |
401a3ca0 | 281 | #endif /* CONFIG_VIDEO_SUNXI */ |
7f2c521f | 282 | |
c26fb9db | 283 | /* Ethernet support */ |
c26fb9db | 284 | |
6ff005cf | 285 | #ifdef CONFIG_SUN7I_GMAC |
1eae8f66 | 286 | #define CONFIG_PHY_REALTEK |
5835823d IC |
287 | #endif |
288 | ||
2582ca0d | 289 | #ifdef CONFIG_USB_EHCI_HCD |
6a72e804 | 290 | #define CONFIG_USB_OHCI_NEW |
6a72e804 | 291 | #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1 |
1a800f7a HG |
292 | #endif |
293 | ||
86b49093 | 294 | #ifdef CONFIG_USB_KEYBOARD |
86b49093 | 295 | #define CONFIG_PREBOOT |
86b49093 HG |
296 | #endif |
297 | ||
cba69eee | 298 | #ifndef CONFIG_SPL_BUILD |
2ec3a612 | 299 | |
671f9ad8 AP |
300 | #ifdef CONFIG_ARM64 |
301 | /* | |
302 | * Boards seem to come with at least 512MB of DRAM. | |
303 | * The kernel should go at 512K, which is the default text offset (that will | |
304 | * be adjusted at runtime if needed). | |
305 | * There is no compression for arm64 kernels (yet), so leave some space | |
306 | * for really big kernels, say 256MB for now. | |
307 | * Scripts, PXE and DTBs should go afterwards, leaving the rest for the initrd. | |
308 | * Align the initrd to a 2MB page. | |
309 | */ | |
c199489f | 310 | #define BOOTM_SIZE __stringify(0xa000000) |
671f9ad8 AP |
311 | #define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(0080000)) |
312 | #define FDT_ADDR_R __stringify(SDRAM_OFFSET(FA00000)) | |
313 | #define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(FC00000)) | |
314 | #define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(FD00000)) | |
315 | #define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(FE00000)) | |
316 | ||
317 | #else | |
8c95c556 | 318 | /* |
5c965ed9 | 319 | * 160M RAM (256M minimum minus 64MB heap + 32MB for u-boot, stack, fb, etc. |
8c95c556 HG |
320 | * 32M uncompressed kernel, 16M compressed kernel, 1M fdt, |
321 | * 1M script, 1M pxe and the ramdisk at the end. | |
322 | */ | |
c199489f IZ |
323 | #ifndef CONFIG_MACH_SUN8I_V3S |
324 | #define BOOTM_SIZE __stringify(0xa000000) | |
2a909c5f SS |
325 | #define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(2000000)) |
326 | #define FDT_ADDR_R __stringify(SDRAM_OFFSET(3000000)) | |
327 | #define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(3100000)) | |
328 | #define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(3200000)) | |
329 | #define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(3300000)) | |
c199489f IZ |
330 | #else |
331 | /* | |
332 | * 64M RAM minus 2MB heap + 16MB for u-boot, stack, fb, etc. | |
333 | * 16M uncompressed kernel, 8M compressed kernel, 1M fdt, | |
334 | * 1M script, 1M pxe and the ramdisk at the end. | |
335 | */ | |
336 | #define BOOTM_SIZE __stringify(0x2e00000) | |
337 | #define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(1000000)) | |
338 | #define FDT_ADDR_R __stringify(SDRAM_OFFSET(1800000)) | |
339 | #define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(1900000)) | |
340 | #define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(1A00000)) | |
341 | #define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(1B00000)) | |
342 | #endif | |
671f9ad8 | 343 | #endif |
2a909c5f | 344 | |
846e3254 | 345 | #define MEM_LAYOUT_ENV_SETTINGS \ |
c199489f | 346 | "bootm_size=" BOOTM_SIZE "\0" \ |
2a909c5f SS |
347 | "kernel_addr_r=" KERNEL_ADDR_R "\0" \ |
348 | "fdt_addr_r=" FDT_ADDR_R "\0" \ | |
349 | "scriptaddr=" SCRIPT_ADDR_R "\0" \ | |
350 | "pxefile_addr_r=" PXEFILE_ADDR_R "\0" \ | |
351 | "ramdisk_addr_r=" RAMDISK_ADDR_R "\0" | |
352 | ||
353 | #define DFU_ALT_INFO_RAM \ | |
354 | "dfu_alt_info_ram=" \ | |
355 | "kernel ram " KERNEL_ADDR_R " 0x1000000;" \ | |
356 | "fdt ram " FDT_ADDR_R " 0x100000;" \ | |
357 | "ramdisk ram " RAMDISK_ADDR_R " 0x4000000\0" | |
846e3254 | 358 | |
41f8e9f5 | 359 | #ifdef CONFIG_MMC |
5a37a400 | 360 | #if CONFIG_MMC_SUNXI_SLOT_EXTRA != -1 |
de86fc38 MR |
361 | #define BOOTENV_DEV_MMC_AUTO(devtypeu, devtypel, instance) \ |
362 | BOOTENV_DEV_MMC(MMC, mmc, 0) \ | |
363 | BOOTENV_DEV_MMC(MMC, mmc, 1) \ | |
364 | "bootcmd_mmc_auto=" \ | |
365 | "if test ${mmc_bootdev} -eq 1; then " \ | |
366 | "run bootcmd_mmc1; " \ | |
367 | "run bootcmd_mmc0; " \ | |
368 | "elif test ${mmc_bootdev} -eq 0; then " \ | |
369 | "run bootcmd_mmc0; " \ | |
370 | "run bootcmd_mmc1; " \ | |
371 | "fi\0" | |
372 | ||
373 | #define BOOTENV_DEV_NAME_MMC_AUTO(devtypeu, devtypel, instance) \ | |
374 | "mmc_auto " | |
375 | ||
376 | #define BOOT_TARGET_DEVICES_MMC(func) func(MMC_AUTO, mmc_auto, na) | |
5a37a400 | 377 | #else |
de86fc38 | 378 | #define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0) |
5a37a400 | 379 | #endif |
41f8e9f5 CYT |
380 | #else |
381 | #define BOOT_TARGET_DEVICES_MMC(func) | |
382 | #endif | |
383 | ||
2ec3a612 HG |
384 | #ifdef CONFIG_AHCI |
385 | #define BOOT_TARGET_DEVICES_SCSI(func) func(SCSI, scsi, 0) | |
386 | #else | |
387 | #define BOOT_TARGET_DEVICES_SCSI(func) | |
388 | #endif | |
389 | ||
2582ca0d | 390 | #ifdef CONFIG_USB_STORAGE |
859b3f14 CYT |
391 | #define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0) |
392 | #else | |
393 | #define BOOT_TARGET_DEVICES_USB(func) | |
394 | #endif | |
395 | ||
f3b589c0 BN |
396 | /* FEL boot support, auto-execute boot.scr if a script address was provided */ |
397 | #define BOOTENV_DEV_FEL(devtypeu, devtypel, instance) \ | |
398 | "bootcmd_fel=" \ | |
399 | "if test -n ${fel_booted} && test -n ${fel_scriptaddr}; then " \ | |
400 | "echo '(FEL boot)'; " \ | |
401 | "source ${fel_scriptaddr}; " \ | |
402 | "fi\0" | |
403 | #define BOOTENV_DEV_NAME_FEL(devtypeu, devtypel, instance) \ | |
404 | "fel " | |
405 | ||
2ec3a612 | 406 | #define BOOT_TARGET_DEVICES(func) \ |
f3b589c0 | 407 | func(FEL, fel, na) \ |
41f8e9f5 | 408 | BOOT_TARGET_DEVICES_MMC(func) \ |
2ec3a612 | 409 | BOOT_TARGET_DEVICES_SCSI(func) \ |
859b3f14 | 410 | BOOT_TARGET_DEVICES_USB(func) \ |
2ec3a612 HG |
411 | func(PXE, pxe, na) \ |
412 | func(DHCP, dhcp, na) | |
413 | ||
3b824025 HG |
414 | #ifdef CONFIG_OLD_SUNXI_KERNEL_COMPAT |
415 | #define BOOTCMD_SUNXI_COMPAT \ | |
416 | "bootcmd_sunxi_compat=" \ | |
417 | "setenv root /dev/mmcblk0p3 rootwait; " \ | |
418 | "if ext2load mmc 0 0x44000000 uEnv.txt; then " \ | |
419 | "echo Loaded environment from uEnv.txt; " \ | |
420 | "env import -t 0x44000000 ${filesize}; " \ | |
421 | "fi; " \ | |
422 | "setenv bootargs console=${console} root=${root} ${extraargs}; " \ | |
423 | "ext2load mmc 0 0x43000000 script.bin && " \ | |
424 | "ext2load mmc 0 0x48000000 uImage && " \ | |
425 | "bootm 0x48000000\0" | |
426 | #else | |
427 | #define BOOTCMD_SUNXI_COMPAT | |
428 | #endif | |
429 | ||
2ec3a612 HG |
430 | #include <config_distro_bootcmd.h> |
431 | ||
86b49093 HG |
432 | #ifdef CONFIG_USB_KEYBOARD |
433 | #define CONSOLE_STDIN_SETTINGS \ | |
434 | "preboot=usb start\0" \ | |
435 | "stdin=serial,usbkbd\0" | |
436 | #else | |
7f2c521f LV |
437 | #define CONSOLE_STDIN_SETTINGS \ |
438 | "stdin=serial\0" | |
86b49093 | 439 | #endif |
7f2c521f LV |
440 | |
441 | #ifdef CONFIG_VIDEO | |
442 | #define CONSOLE_STDOUT_SETTINGS \ | |
443 | "stdout=serial,vga\0" \ | |
444 | "stderr=serial,vga\0" | |
56009451 JS |
445 | #elif CONFIG_DM_VIDEO |
446 | #define CONFIG_SYS_WHITE_ON_BLACK | |
447 | #define CONSOLE_STDOUT_SETTINGS \ | |
448 | "stdout=serial,vidconsole\0" \ | |
449 | "stderr=serial,vidconsole\0" | |
7f2c521f LV |
450 | #else |
451 | #define CONSOLE_STDOUT_SETTINGS \ | |
452 | "stdout=serial\0" \ | |
453 | "stderr=serial\0" | |
454 | #endif | |
455 | ||
c8564b24 MR |
456 | #ifdef CONFIG_MTDIDS_DEFAULT |
457 | #define SUNXI_MTDIDS_DEFAULT \ | |
458 | "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" | |
459 | #else | |
460 | #define SUNXI_MTDIDS_DEFAULT | |
461 | #endif | |
462 | ||
463 | #ifdef CONFIG_MTDPARTS_DEFAULT | |
464 | #define SUNXI_MTDPARTS_DEFAULT \ | |
465 | "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" | |
466 | #else | |
467 | #define SUNXI_MTDPARTS_DEFAULT | |
468 | #endif | |
469 | ||
c53654fc MR |
470 | #define PARTS_DEFAULT \ |
471 | "name=loader1,start=8k,size=32k,uuid=${uuid_gpt_loader1};" \ | |
472 | "name=loader2,size=984k,uuid=${uuid_gpt_loader2};" \ | |
473 | "name=esp,size=128M,bootable,uuid=${uuid_gpt_esp};" \ | |
474 | "name=system,size=-,uuid=${uuid_gpt_system};" | |
475 | ||
476 | #define UUID_GPT_ESP "c12a7328-f81f-11d2-ba4b-00a0c93ec93b" | |
477 | ||
478 | #ifdef CONFIG_ARM64 | |
479 | #define UUID_GPT_SYSTEM "b921b045-1df0-41c3-af44-4c6f280d3fae" | |
480 | #else | |
481 | #define UUID_GPT_SYSTEM "69dad710-2ce4-4e3c-b16c-21a1d49abed3" | |
482 | #endif | |
483 | ||
7f2c521f LV |
484 | #define CONSOLE_ENV_SETTINGS \ |
485 | CONSOLE_STDIN_SETTINGS \ | |
486 | CONSOLE_STDOUT_SETTINGS | |
487 | ||
2eff3b71 AF |
488 | #ifdef CONFIG_ARM64 |
489 | #define FDTFILE "allwinner/" CONFIG_DEFAULT_DEVICE_TREE ".dtb" | |
490 | #else | |
491 | #define FDTFILE CONFIG_DEFAULT_DEVICE_TREE ".dtb" | |
492 | #endif | |
493 | ||
2ec3a612 | 494 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
7f2c521f | 495 | CONSOLE_ENV_SETTINGS \ |
846e3254 | 496 | MEM_LAYOUT_ENV_SETTINGS \ |
2a909c5f | 497 | DFU_ALT_INFO_RAM \ |
2eff3b71 | 498 | "fdtfile=" FDTFILE "\0" \ |
846e3254 | 499 | "console=ttyS0,115200\0" \ |
c8564b24 MR |
500 | SUNXI_MTDIDS_DEFAULT \ |
501 | SUNXI_MTDPARTS_DEFAULT \ | |
c53654fc MR |
502 | "uuid_gpt_esp=" UUID_GPT_ESP "\0" \ |
503 | "uuid_gpt_system=" UUID_GPT_SYSTEM "\0" \ | |
504 | "partitions=" PARTS_DEFAULT "\0" \ | |
3b824025 | 505 | BOOTCMD_SUNXI_COMPAT \ |
2ec3a612 HG |
506 | BOOTENV |
507 | ||
508 | #else /* ifndef CONFIG_SPL_BUILD */ | |
509 | #define CONFIG_EXTRA_ENV_SETTINGS | |
cba69eee IC |
510 | #endif |
511 | ||
512 | #endif /* _SUNXI_COMMON_CONFIG_H */ |