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armv8: fsl-lsch2: add clock support for the second eSDHC
authorYinbo Zhu <yinbo.zhu@nxp.com>
Mon, 3 Jun 2019 11:24:23 +0000 (19:24 +0800)
committerPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Wed, 19 Jun 2019 07:24:57 +0000 (12:54 +0530)
commit0dd74ec2df8ca77b1264e82c3a9a17ef7e4c0f14
treec7765ad831d3012f8d7321ec05e0def1721587d5tree | snapshot
parentfd90b6d5ab20ce321eef7b68696d064efb2f5063commit | diff
armv8: fsl-lsch2: add clock support for the second eSDHC

Layerscape began to use two eSDHC controllers, for example,
LS1012A. They are same IP block with same reference clock.
This patch is to add clock support for the second eSDHC.

Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c diff | blob | blame | history
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