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(parent: 3f190c5) | patch
arch: arm: Agilex5 enablement
authorJit Loon Lim <jit.loon.lim@intel.com>
Tue, 12 Mar 2024 14:01:03 +0000 (22:01 +0800)
committerTien Fong Chee <tien.fong.chee@intel.com>
Mon, 18 Mar 2024 06:45:47 +0000 (14:45 +0800)
commit386fca68960994ece0d9da8a69a14495b5f1aedf
tree880c6d852446a8fdcb47184986f92bb2812a2a6atree | snapshot
parent3f190c55a4211215914126b74357344342329943commit | diff
arch: arm: Agilex5 enablement

This patch is to enable Agilex5 platform for Intel
product. Changes, modification and new files are
created for board, dts, configs and makefile to
create the base for Agilex5.

Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com>
27 files changed:
arch/arm/Kconfig diff | blob | blame | history
arch/arm/dts/Makefile diff | blob | blame | history
arch/arm/dts/socfpga_agilex5-u-boot.dtsi [new file with mode: 0644] blob
arch/arm/dts/socfpga_agilex5.dtsi [new file with mode: 0644] blob
arch/arm/dts/socfpga_agilex5_socdk-u-boot.dtsi [new file with mode: 0644] blob
arch/arm/dts/socfpga_agilex5_socdk.dts [new file with mode: 0644] blob
arch/arm/dts/socfpga_soc64_fit-u-boot.dtsi diff | blob | blame | history
arch/arm/mach-socfpga/Kconfig diff | blob | blame | history
arch/arm/mach-socfpga/Makefile diff | blob | blame | history
arch/arm/mach-socfpga/board.c diff | blob | blame | history
arch/arm/mach-socfpga/clock_manager_agilex5.c [new file with mode: 0644] blob
arch/arm/mach-socfpga/include/mach/base_addr_soc64.h diff | blob | blame | history
arch/arm/mach-socfpga/include/mach/clock_manager.h diff | blob | blame | history
arch/arm/mach-socfpga/include/mach/clock_manager_agilex5.h [new file with mode: 0644] blob
arch/arm/mach-socfpga/include/mach/handoff_soc64.h diff | blob | blame | history
arch/arm/mach-socfpga/include/mach/mailbox_s10.h diff | blob | blame | history
arch/arm/mach-socfpga/mmu-arm64_s10.c diff | blob | blame | history
arch/arm/mach-socfpga/wrap_handoff_soc64.c diff | blob | blame | history
board/intel/agilex5-socdk/MAINTAINERS [new file with mode: 0644] blob
configs/socfpga_agilex5_defconfig [new file with mode: 0644] blob
drivers/clk/altera/Makefile diff | blob | blame | history
drivers/clk/altera/clk-agilex5.c [new file with mode: 0644] blob
drivers/clk/altera/clk-agilex5.h [new file with mode: 0644] blob
include/configs/socfpga_agilex5_socdk.h [new file with mode: 0644] blob
include/configs/socfpga_soc64_common.h diff | blob | blame | history
include/dt-bindings/clock/agilex5-clock.h [new file with mode: 0644] blob
include/dt-bindings/reset/altr,rst-mgr-agx5.h [new file with mode: 0644] blob
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