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(merge: 37345ab c2ad5fb)
Merge tag 'xilinx-for-v2024.04-rc3' of https://source.denx.de/u-boot/custodians/u...
authorTom Rini <trini@konsulko.com>
Wed, 14 Feb 2024 20:23:10 +0000 (15:23 -0500)
committerTom Rini <trini@konsulko.com>
Wed, 14 Feb 2024 20:23:10 +0000 (15:23 -0500)
commit77ff61a5bb437b5b19c50d8791f14a3b917e882c
treeee0d8f7efd458c4246b41eb10a0d2fcdf8ffe86etree | snapshot
parent37345abb97ef0dd9c50a03b2a72617612dcae585commit | diff
parentc2ad5fb616d4e8aa2ac00e224030589847731fbecommit | diff
Merge tag 'xilinx-for-v2024.04-rc3' of https://source.denx.de/u-boot/custodians/u-boot-microblaze

Xilinx changes for v2024.04-rc3

zynqmp:
- Cover missing _SE chip variants to fix fpga programming

versal:
- Enable LTO for mini configurations

versal-net:
- Enable LTO for mini configurations
- Fix GIC address to aligned with real silicon

xilinx:
- DTs cleanup and fixups
- Enable HTTP boot
- Add missing spl header to zynqmp.c
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