]> git.ipfire.org Git - thirdparty/u-boot.git/commitdiff
rtc: ds3232/ds3231: Add support to generate 32KHz output for driver module
authorChuanhua Han <chuanhua.han@nxp.com>
Fri, 26 Jul 2019 11:24:00 +0000 (19:24 +0800)
committerPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Thu, 22 Aug 2019 03:37:36 +0000 (09:07 +0530)
Add an implementation of the rtc_enable_32khz_output() that uses the
driver model i2c APIs.

Also put code related to rtc_enable_32khz_output
under CONFIG_RTC_ENABLE_32KHZ_OUTPUT.

Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
board/freescale/ls2080aqds/ls2080aqds.c
drivers/rtc/Kconfig
drivers/rtc/ds3231.c
include/configs/ls2080aqds.h
include/rtc.h

index e9c055745f6c47e387dbf17f2bfdf02398aaa1ca..dc239cf35ce15ffde43bc83e86d1888b84d95d45 100644 (file)
@@ -225,7 +225,9 @@ int board_init(void)
        gd->env_addr = (ulong)&default_environment[0];
 #endif
        select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT);
+#ifdef CONFIG_RTC_ENABLE_32KHZ_OUTPUT
        rtc_enable_32khz_output();
+#endif
 #ifdef CONFIG_FSL_CAAM
        sec_init();
 #endif
index 860b73d3690b74156dc5ea0e6ef1c81c48f10252..8778cc7b264ca4f4785e41d66338bac5421f7274 100644 (file)
@@ -31,6 +31,12 @@ config TPL_DM_RTC
          drivers to perform the actual functions. See rtc.h for a
          description of the API.
 
+config RTC_ENABLE_32KHZ_OUTPUT
+       bool "Enable RTC 32Khz output"
+       help
+          Some real-time clocks support the output of 32kHz square waves (such as ds3231),
+          the config symbol choose Real Time Clock device 32Khz output feature.
+
 config RTC_PCF2127
        bool "Enable PCF2127 driver"
        depends on DM_RTC
index 79b026af4b9f434a31f5f8f48ce251aafc40d3bf..fde4d860ec188ad9daf2afec98acc1782064bbad 100644 (file)
@@ -148,11 +148,13 @@ void rtc_reset (void)
 /*
  * Enable 32KHz output
  */
+#ifdef CONFIG_RTC_ENABLE_32KHZ_OUTPUT
 void rtc_enable_32khz_output(void)
 {
        rtc_write(RTC_STAT_REG_ADDR,
                  RTC_STAT_BIT_BB32KHZ | RTC_STAT_BIT_EN32KHZ);
 }
+#endif
 
 /*
  * Helper functions
@@ -251,6 +253,21 @@ static int ds3231_probe(struct udevice *dev)
        return 0;
 }
 
+#ifdef CONFIG_RTC_ENABLE_32KHZ_OUTPUT
+int rtc_enable_32khz_output(int busnum, int chip_addr)
+{
+       int ret;
+       struct udevice *dev;
+
+       ret = i2c_get_chip_for_busnum(busnum, chip_addr, 1, &dev);
+       if (!ret)
+               ret = dm_i2c_reg_write(dev, RTC_STAT_REG_ADDR,
+                                      RTC_STAT_BIT_BB32KHZ |
+                                      RTC_STAT_BIT_EN32KHZ);
+       return ret;
+}
+#endif
+
 static const struct rtc_ops ds3231_rtc_ops = {
        .get = ds3231_rtc_get,
        .set = ds3231_rtc_set,
index 18f30b585c4f6d57fe61c24253bc83c4ce2db14e..81af1d9ea43da8b3a87a141b8d588fe7c570cd62 100644 (file)
@@ -325,6 +325,7 @@ unsigned long get_board_ddr_clk(void);
 #define RTC
 #define CONFIG_RTC_DS3231               1
 #define CONFIG_SYS_I2C_RTC_ADDR         0x68
+#define CONFIG_RTC_ENABLE_32KHZ_OUTPUT
 
 /* EEPROM */
 #define CONFIG_ID_EEPROM
index b255bdc7a3311017f65e0e62e937808b92a52c51..7386d52db1d70d5a133beb2977898e0e172ebb4a 100644 (file)
@@ -166,11 +166,17 @@ int rtc_read32(struct udevice *dev, unsigned int reg, u32 *valuep);
  */
 int rtc_write32(struct udevice *dev, unsigned int reg, u32 value);
 
+#ifdef CONFIG_RTC_ENABLE_32KHZ_OUTPUT
+int rtc_enable_32khz_output(int busnum, int chip_addr);
+#endif
+
 #else
 int rtc_get (struct rtc_time *);
 int rtc_set (struct rtc_time *);
 void rtc_reset (void);
+#ifdef CONFIG_RTC_ENABLE_32KHZ_OUTPUT
 void rtc_enable_32khz_output(void);
+#endif
 
 /**
  * rtc_read8() - Read an 8-bit register