From 5c6dc6c9a9a5f253f3928a97ca020712177884e7 Mon Sep 17 00:00:00 2001 From: Laurentiu Tudor Date: Tue, 30 Jul 2019 17:29:58 +0300 Subject: [PATCH] armv8: ls1088a: add icid setup for platform devices MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Add ICID setup for the platform devices contained on this chip: usb, sata, sdhc, sec. The ICID macros for SEC needed to be adapted because the format of the registers is different. Signed-off-by: Laurentiu Tudor Reviewed-by: Horia Geantă Reviewed-by: Prabhakar Kushwaha --- arch/arm/cpu/armv8/fsl-layerscape/Makefile | 1 + .../arm/cpu/armv8/fsl-layerscape/ls1088_ids.c | 30 +++++++++++ arch/arm/cpu/armv8/fsl-layerscape/soc.c | 4 ++ .../asm/arch-fsl-layerscape/fsl_icid.h | 54 +++++++++++++++---- .../asm/arch-fsl-layerscape/stream_id_lsch3.h | 6 +++ board/freescale/ls1088a/ls1088a.c | 4 ++ 6 files changed, 89 insertions(+), 10 deletions(-) create mode 100644 arch/arm/cpu/armv8/fsl-layerscape/ls1088_ids.c diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Makefile b/arch/arm/cpu/armv8/fsl-layerscape/Makefile index a8d3cf91fc8..aa88b931754 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Makefile +++ b/arch/arm/cpu/armv8/fsl-layerscape/Makefile @@ -47,6 +47,7 @@ endif ifneq ($(CONFIG_ARCH_LS1088A),) obj-$(CONFIG_SYS_HAS_SERDES) += ls1088a_serdes.o +obj-y += icid.o ls1088_ids.o endif ifneq ($(CONFIG_ARCH_LS1028A),) diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls1088_ids.c b/arch/arm/cpu/armv8/fsl-layerscape/ls1088_ids.c new file mode 100644 index 00000000000..956d6e78c8b --- /dev/null +++ b/arch/arm/cpu/armv8/fsl-layerscape/ls1088_ids.c @@ -0,0 +1,30 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2019 NXP + */ + +#include +#include +#include +#include + +struct icid_id_table icid_tbl[] = { + SET_SDHC_ICID(FSL_SDMMC_STREAM_ID), + SET_USB_ICID(1, "snps,dwc3", FSL_USB1_STREAM_ID), + SET_USB_ICID(2, "snps,dwc3", FSL_USB2_STREAM_ID), + SET_SATA_ICID(1, "fsl,ls1088a-ahci", FSL_SATA1_STREAM_ID), + SET_SEC_JR_ICID_ENTRY(0, FSL_SEC_JR1_STREAM_ID), + SET_SEC_JR_ICID_ENTRY(1, FSL_SEC_JR2_STREAM_ID), + SET_SEC_JR_ICID_ENTRY(2, FSL_SEC_JR3_STREAM_ID), + SET_SEC_JR_ICID_ENTRY(3, FSL_SEC_JR4_STREAM_ID), + SET_SEC_RTIC_ICID_ENTRY(0, FSL_SEC_STREAM_ID), + SET_SEC_RTIC_ICID_ENTRY(1, FSL_SEC_STREAM_ID), + SET_SEC_RTIC_ICID_ENTRY(2, FSL_SEC_STREAM_ID), + SET_SEC_RTIC_ICID_ENTRY(3, FSL_SEC_STREAM_ID), + SET_SEC_DECO_ICID_ENTRY(0, FSL_SEC_STREAM_ID), + SET_SEC_DECO_ICID_ENTRY(1, FSL_SEC_STREAM_ID), + SET_SEC_DECO_ICID_ENTRY(2, FSL_SEC_STREAM_ID), + SET_SEC_DECO_ICID_ENTRY(3, FSL_SEC_STREAM_ID), +}; + +int icid_tbl_sz = ARRAY_SIZE(icid_tbl); diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c index ca8005992ae..72e546fad68 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c @@ -340,6 +340,10 @@ void fsl_lsch3_early_init_f(void) if (fsl_check_boot_mode_secure() == 1) bypass_smmu(); #endif + +#ifdef CONFIG_ARCH_LS1088A + set_icids(); +#endif } /* Get VDD in the unit mV from voltage ID */ diff --git a/arch/arm/include/asm/arch-fsl-layerscape/fsl_icid.h b/arch/arm/include/asm/arch-fsl-layerscape/fsl_icid.h index 435ffb04fa3..feb3304364c 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/fsl_icid.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/fsl_icid.h @@ -40,6 +40,14 @@ void fdt_fixup_icid(void *blob); .le = _le \ } +#ifdef CONFIG_SYS_FSL_SEC_LE +#define SEC_IS_LE true +#elif defined(CONFIG_SYS_FSL_SEC_BE) +#define SEC_IS_LE false +#endif + +#ifdef CONFIG_FSL_LSCH2 + #ifdef CONFIG_SYS_FSL_CCSR_SCFG_LE #define SCFG_IS_LE true #elif defined(CONFIG_SYS_FSL_CCSR_SCFG_BE) @@ -100,11 +108,7 @@ void fdt_fixup_icid(void *blob); #define SET_FMAN_ICID_ENTRY(_port_id, streamid) \ { .port_id = (_port_id), .icid = (streamid) } -#ifdef CONFIG_SYS_FSL_SEC_LE -#define SEC_IS_LE true -#elif defined(CONFIG_SYS_FSL_SEC_BE) -#define SEC_IS_LE false -#endif +#define SEC_ICID_REG_VAL(streamid) (((streamid) << 16) | (streamid)) #define SET_SEC_QI_ICID(streamid) \ SET_ICID_ENTRY("fsl,sec-v4.0", streamid, \ @@ -112,6 +116,38 @@ void fdt_fixup_icid(void *blob); CONFIG_SYS_FSL_SEC_ADDR, \ CONFIG_SYS_FSL_SEC_ADDR, SEC_IS_LE) +extern struct fman_icid_id_table fman_icid_tbl[]; +extern int fman_icid_tbl_sz; + +#else /* CONFIG_FSL_LSCH2 */ + +#ifdef CONFIG_SYS_FSL_CCSR_GUR_LE +#define GUR_IS_LE true +#elif defined(CONFIG_SYS_FSL_CCSR_GUR_BE) +#define GUR_IS_LE false +#endif + +#define SET_GUR_ICID(compat, streamid, name, compataddr) \ + SET_ICID_ENTRY(compat, streamid, streamid, \ + offsetof(struct ccsr_gur, name) + CONFIG_SYS_FSL_GUTS_ADDR, \ + compataddr, GUR_IS_LE) + +#define SET_USB_ICID(usb_num, compat, streamid) \ + SET_GUR_ICID(compat, streamid, usb##usb_num##_amqr,\ + CONFIG_SYS_XHCI_USB##usb_num##_ADDR) + +#define SET_SATA_ICID(sata_num, compat, streamid) \ + SET_GUR_ICID(compat, streamid, sata##sata_num##_amqr, \ + AHCI_BASE_ADDR##sata_num) + +#define SET_SDHC_ICID(streamid) \ + SET_GUR_ICID("fsl,esdhc", streamid, sdmm1_amqr,\ + CONFIG_SYS_FSL_ESDHC_ADDR) + +#define SEC_ICID_REG_VAL(streamid) (streamid) + +#endif /* CONFIG_FSL_LSCH2 */ + #define SET_SEC_JR_ICID_ENTRY(jr_num, streamid) \ SET_ICID_ENTRY( \ (CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT && \ @@ -120,24 +156,22 @@ void fdt_fixup_icid(void *blob); ? NULL \ : "fsl,sec-v4.0-job-ring"), \ streamid, \ - (((streamid) << 16) | (streamid)), \ + SEC_ICID_REG_VAL(streamid), \ offsetof(ccsr_sec_t, jrliodnr[jr_num].ls) + \ CONFIG_SYS_FSL_SEC_ADDR, \ FSL_SEC_JR##jr_num##_BASE_ADDR, SEC_IS_LE) #define SET_SEC_DECO_ICID_ENTRY(deco_num, streamid) \ - SET_ICID_ENTRY(NULL, streamid, (((streamid) << 16) | (streamid)), \ + SET_ICID_ENTRY(NULL, streamid, SEC_ICID_REG_VAL(streamid), \ offsetof(ccsr_sec_t, decoliodnr[deco_num].ls) + \ CONFIG_SYS_FSL_SEC_ADDR, 0, SEC_IS_LE) #define SET_SEC_RTIC_ICID_ENTRY(rtic_num, streamid) \ - SET_ICID_ENTRY(NULL, streamid, (((streamid) << 16) | (streamid)), \ + SET_ICID_ENTRY(NULL, streamid, SEC_ICID_REG_VAL(streamid), \ offsetof(ccsr_sec_t, rticliodnr[rtic_num].ls) + \ CONFIG_SYS_FSL_SEC_ADDR, 0, SEC_IS_LE) extern struct icid_id_table icid_tbl[]; -extern struct fman_icid_id_table fman_icid_tbl[]; extern int icid_tbl_sz; -extern int fman_icid_tbl_sz; #endif diff --git a/arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch3.h b/arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch3.h index c53cc57e567..383eb259bd5 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch3.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch3.h @@ -98,4 +98,10 @@ #define FSL_DPAA2_STREAM_ID_START 23 #define FSL_DPAA2_STREAM_ID_END 63 +#define FSL_SEC_STREAM_ID 64 +#define FSL_SEC_JR1_STREAM_ID 65 +#define FSL_SEC_JR2_STREAM_ID 66 +#define FSL_SEC_JR3_STREAM_ID 67 +#define FSL_SEC_JR4_STREAM_ID 68 + #endif diff --git a/board/freescale/ls1088a/ls1088a.c b/board/freescale/ls1088a/ls1088a.c index b851e159bcd..f1592982a34 100644 --- a/board/freescale/ls1088a/ls1088a.c +++ b/board/freescale/ls1088a/ls1088a.c @@ -21,6 +21,7 @@ #include #include #include +#include #include "../common/qixis.h" #include "ls1088a_qixis.h" @@ -968,6 +969,9 @@ int ft_board_setup(void *blob, bd_t *bd) #ifdef CONFIG_FSL_MC_ENET fdt_fixup_board_enet(blob); #endif + + fdt_fixup_icid(blob); + if (is_pb_board()) fixup_ls1088ardb_pb_banner(blob); -- 2.39.2