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9a2dd740 SR |
1 | /* |
2 | * (C) Copyright 2003 | |
3 | * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com | |
4 | * | |
1a459660 | 5 | * SPDX-License-Identifier: GPL-2.0+ |
9a2dd740 SR |
6 | */ |
7 | ||
8 | /*******************************************************/ | |
9 | /* file: ports.h */ | |
10 | /* abstract: This file contains extern declarations */ | |
11 | /* for providing stimulus to the JTAG ports.*/ | |
12 | /*******************************************************/ | |
13 | ||
14 | #ifndef ports_dot_h | |
15 | #define ports_dot_h | |
16 | ||
17 | /* these constants are used to send the appropriate ports to setPort */ | |
18 | /* they should be enumerated types, but some of the microcontroller */ | |
19 | /* compilers don't like enumerated types */ | |
20 | #define TCK (short) 0 | |
21 | #define TMS (short) 1 | |
22 | #define TDI (short) 2 | |
23 | ||
24 | /* | |
6d0f6bcf | 25 | * Use CONFIG_SYS_FPGA_xxx defines from board include file. |
9a2dd740 | 26 | */ |
6d0f6bcf JCPV |
27 | #define JTAG_TMS CONFIG_SYS_FPGA_PRG /* output */ |
28 | #define JTAG_TCK CONFIG_SYS_FPGA_CLK /* output */ | |
29 | #define JTAG_TDI CONFIG_SYS_FPGA_DATA /* output */ | |
30 | #define JTAG_TDO CONFIG_SYS_FPGA_DONE /* input */ | |
9a2dd740 SR |
31 | |
32 | /* set the port "p" (TCK, TMS, or TDI) to val (0 or 1) */ | |
33 | void setPort(short p, short val); | |
34 | ||
35 | /* read the TDO bit and store it in val */ | |
36 | unsigned char readTDOBit(void); | |
37 | ||
38 | /* make clock go down->up->down*/ | |
39 | void pulseClock(void); | |
40 | ||
41 | /* read the next byte of data from the xsvf file */ | |
42 | void readByte(unsigned char *data); | |
43 | ||
44 | void waitTime(long microsec); | |
45 | ||
46 | #endif |