1 From 510cd9e688453166b2bff3999ed21cac97385bb5 Mon Sep 17 00:00:00 2001
2 From: Alexey Charkov <alchark@gmail.com>
3 Date: Mon, 17 Jun 2024 22:28:51 +0400
4 Subject: [PATCH] arm64: dts: rockchip: add thermal zones information on RK3588
6 This includes the necessary device tree data to allow thermal
7 monitoring on RK3588(s) using the on-chip TSADC device, along with
8 trip points for automatic thermal management.
10 Each of the CPU clusters (one for the little cores and two for
11 the big cores) get a passive cooling trip point at 85C, which
12 will trigger DVFS throttling of the respective cluster upon
13 reaching a high temperature condition.
15 All zones also have a critical trip point at 115C, which will
18 Signed-off-by: Alexey Charkov <alchark@gmail.com>
19 Link: https://lore.kernel.org/r/20240617-rk-dts-additions-v5-1-c1f5f3267f1e@gmail.com
20 Signed-off-by: Heiko Stuebner <heiko@sntech.de>
22 arch/arm64/boot/dts/rockchip/rk3588-base.dtsi | 153 ++++++++++++++++++
23 1 file changed, 153 insertions(+)
25 --- a/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi
26 +++ b/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi
28 #include <dt-bindings/reset/rockchip,rk3588-cru.h>
29 #include <dt-bindings/phy/phy.h>
30 #include <dt-bindings/ata/ahci.h>
31 +#include <dt-bindings/thermal/thermal.h>
34 compatible = "rockchip,rk3588";
35 @@ -2368,6 +2369,158 @@
39 + thermal_zones: thermal-zones {
40 + /* sensor near the center of the SoC */
41 + package_thermal: package-thermal {
42 + polling-delay-passive = <0>;
43 + polling-delay = <0>;
44 + thermal-sensors = <&tsadc 0>;
47 + package_crit: package-crit {
48 + temperature = <115000>;
55 + /* sensor between A76 cores 0 and 1 */
56 + bigcore0_thermal: bigcore0-thermal {
57 + polling-delay-passive = <100>;
58 + polling-delay = <0>;
59 + thermal-sensors = <&tsadc 1>;
62 + bigcore0_alert: bigcore0-alert {
63 + temperature = <85000>;
64 + hysteresis = <2000>;
68 + bigcore0_crit: bigcore0-crit {
69 + temperature = <115000>;
77 + trip = <&bigcore0_alert>;
79 + <&cpu_b0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
80 + <&cpu_b1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
85 + /* sensor between A76 cores 2 and 3 */
86 + bigcore2_thermal: bigcore2-thermal {
87 + polling-delay-passive = <100>;
88 + polling-delay = <0>;
89 + thermal-sensors = <&tsadc 2>;
92 + bigcore2_alert: bigcore2-alert {
93 + temperature = <85000>;
94 + hysteresis = <2000>;
98 + bigcore2_crit: bigcore2-crit {
99 + temperature = <115000>;
107 + trip = <&bigcore2_alert>;
109 + <&cpu_b2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
110 + <&cpu_b3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
115 + /* sensor between the four A55 cores */
116 + little_core_thermal: littlecore-thermal {
117 + polling-delay-passive = <100>;
118 + polling-delay = <0>;
119 + thermal-sensors = <&tsadc 3>;
122 + littlecore_alert: littlecore-alert {
123 + temperature = <85000>;
124 + hysteresis = <2000>;
128 + littlecore_crit: littlecore-crit {
129 + temperature = <115000>;
137 + trip = <&littlecore_alert>;
139 + <&cpu_l0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
140 + <&cpu_l1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
141 + <&cpu_l2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
142 + <&cpu_l3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
147 + /* sensor near the PD_CENTER power domain */
148 + center_thermal: center-thermal {
149 + polling-delay-passive = <0>;
150 + polling-delay = <0>;
151 + thermal-sensors = <&tsadc 4>;
154 + center_crit: center-crit {
155 + temperature = <115000>;
162 + gpu_thermal: gpu-thermal {
163 + polling-delay-passive = <0>;
164 + polling-delay = <0>;
165 + thermal-sensors = <&tsadc 5>;
168 + gpu_crit: gpu-crit {
169 + temperature = <115000>;
176 + npu_thermal: npu-thermal {
177 + polling-delay-passive = <0>;
178 + polling-delay = <0>;
179 + thermal-sensors = <&tsadc 6>;
182 + npu_crit: npu-crit {
183 + temperature = <115000>;
191 tsadc: tsadc@fec00000 {
192 compatible = "rockchip,rk3588-tsadc";
193 reg = <0x0 0xfec00000 0x0 0x400>;