git.ipfire.org Git - thirdparty/openwrt.git/blob

   1 From bcbbfb4f62c4ba35783cc617997a2e92d91e3940 Mon Sep 17 00:00:00 2001
   2 From: "SkyLake.Huang" <skylake.huang@mediatek.com>
   3 Date: Thu, 17 Oct 2024 11:22:13 +0800
   4 Subject: [PATCH 03/20] net: phy: mediatek-ge-soc: Propagate error code
   5  correctly in cal_cycle()
   6
   7 This patch propagates error code correctly in cal_cycle()
   8 and improve with FIELD_GET().
   9
  10 Signed-off-by: SkyLake.Huang <skylake.huang@mediatek.com>
  11 Reviewed-by: Simon Horman <horms@kernel.org>
  12 Signed-off-by: Andrew Lunn <andrew@lunn.ch>
  13 ---
  14  drivers/net/phy/mediatek-ge-soc.c | 8 +++++---
  15  1 file changed, 5 insertions(+), 3 deletions(-)
  16
  17 --- a/drivers/net/phy/mediatek-ge-soc.c
  18 +++ b/drivers/net/phy/mediatek-ge-soc.c
  19 @@ -110,7 +110,7 @@
  20  #define   MTK_PHY_CR_TX_AMP_OFFSET_D_MASK      GENMASK(6, 0)
  21
  22  #define MTK_PHY_RG_AD_CAL_COMP                 0x17a
  23 -#define   MTK_PHY_AD_CAL_COMP_OUT_SHIFT                (8)
  24 +#define   MTK_PHY_AD_CAL_COMP_OUT_MASK         GENMASK(8, 8)
  25
  26  #define MTK_PHY_RG_AD_CAL_CLK                  0x17b
  27  #define   MTK_PHY_DA_CAL_CLK                   BIT(0)
  28 @@ -351,8 +351,10 @@ static int cal_cycle(struct phy_device *
  29
  30         phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_RG_AD_CALIN,
  31                            MTK_PHY_DA_CALIN_FLAG);
  32 -       ret = phy_read_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_RG_AD_CAL_COMP) >>
  33 -                          MTK_PHY_AD_CAL_COMP_OUT_SHIFT;
  34 +       ret = phy_read_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_RG_AD_CAL_COMP);
  35 +       if (ret < 0)
  36 +               return ret;
  37 +       ret = FIELD_GET(MTK_PHY_AD_CAL_COMP_OUT_MASK, ret);
  38         phydev_dbg(phydev, "cal_val: 0x%x, ret: %d\n", cal_val, ret);
  39
  40         return ret;