git.ipfire.org Git - thirdparty/openwrt.git/blob

   1 From eb836a6a299322a8e2b9627cccd23c7a76d068ba Mon Sep 17 00:00:00 2001
   2 From: Dave Stevenson <dave.stevenson@raspberrypi.com>
   3 Date: Fri, 8 Nov 2024 17:36:13 +0000
   4 Subject: [PATCH] rp1: clk: Rationalise the use of the CLK_IS_CRITICAL flag
   5
   6 The clock setup had been copied from clk-bcm2835 which had to cope
   7 with the firmware having configured clocks, so there were flags
   8 of CLK_IS_CRITICAL and CLK_IGNORE_UNUSED dotted around.
   9
  10 That isn't the situation with RP1 where only the main PLLs, CLK_SYS,
  11 and CLK_SLOW_SYS are critical, so update the configuration to match.
  12
  13 Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
  14 ---
  15  drivers/clk/clk-rp1.c | 41 ++++++-----------------------------------
  16  1 file changed, 6 insertions(+), 35 deletions(-)
  17
  18 --- a/drivers/clk/clk-rp1.c
  19 +++ b/drivers/clk/clk-rp1.c
  20 @@ -1504,8 +1504,6 @@ static const struct clk_ops rp1_varsrc_o
  21         .round_rate = rp1_varsrc_round_rate,
  22  };
  23
  24 -static bool rp1_clk_is_claimed(const char *name);
  25 -
  26  static struct clk_hw *rp1_register_pll_core(struct rp1_clockman *clockman,
  27                                             const void *data)
  28  {
  29 @@ -1521,7 +1519,7 @@ static struct clk_hw *rp1_register_pll_c
  30         init.num_parents = 1;
  31         init.name = pll_core_data->name;
  32         init.ops = &rp1_pll_core_ops;
  33 -       init.flags = pll_core_data->flags | CLK_IGNORE_UNUSED | CLK_IS_CRITICAL;
  34 +       init.flags = pll_core_data->flags | CLK_IS_CRITICAL;
  35
  36         pll_core = kzalloc(sizeof(*pll_core), GFP_KERNEL);
  37         if (!pll_core)
  38 @@ -1554,7 +1552,7 @@ static struct clk_hw *rp1_register_pll(s
  39         init.num_parents = 1;
  40         init.name = pll_data->name;
  41         init.ops = &rp1_pll_ops;
  42 -       init.flags = pll_data->flags | CLK_IGNORE_UNUSED | CLK_IS_CRITICAL;
  43 +       init.flags = pll_data->flags | CLK_IGNORE_UNUSED;
  44
  45         pll = kzalloc(sizeof(*pll), GFP_KERNEL);
  46         if (!pll)
  47 @@ -1635,11 +1633,6 @@ static struct clk_hw *rp1_register_pll_d
  48         divider->div.hw.init = &init;
  49         divider->div.table = pll_sec_div_table;
  50
  51 -       if (!rp1_clk_is_claimed(divider_data->source_pll))
  52 -               init.flags |= CLK_IS_CRITICAL;
  53 -       if (!rp1_clk_is_claimed(divider_data->name))
  54 -               divider->div.flags |= CLK_IS_CRITICAL;
  55 -
  56         divider->clockman = clockman;
  57         divider->data = divider_data;
  58
  59 @@ -1861,6 +1854,8 @@ static const struct rp1_clk_desc clk_des
  60                                 .max_freq = 200 * MHz,
  61                                 .fc0_src = FC_NUM(0, 4),
  62                                 .clk_src_mask = 0x3,
  63 +                               /* Always enabled in hardware */
  64 +                               .flags = CLK_IS_CRITICAL,
  65                                 ),
  66
  67         [RP1_CLK_SLOW_SYS] = REGISTER_CLK(
  68 @@ -1875,6 +1870,8 @@ static const struct rp1_clk_desc clk_des
  69                                 .max_freq = 50 * MHz,
  70                                 .fc0_src = FC_NUM(1, 4),
  71                                 .clk_src_mask = 0x1,
  72 +                               /* Always enabled in hardware */
  73 +                               .flags = CLK_IS_CRITICAL,
  74                                 ),
  75
  76         [RP1_CLK_UART] = REGISTER_CLK(
  77 @@ -2394,24 +2391,6 @@ static const struct rp1_clk_desc clk_des
  78         [RP1_CLK_MIPI1_DSI_BYTECLOCK] = REGISTER_VARSRC("clksrc_mipi1_dsi_byteclk"),
  79  };
  80
  81 -static bool rp1_clk_claimed[ARRAY_SIZE(clk_desc_array)];
  82 -
  83 -static bool rp1_clk_is_claimed(const char *name)
  84 -{
  85 -       unsigned int i;
  86 -
  87 -       for (i = 0; i < ARRAY_SIZE(clk_desc_array); i++) {
  88 -               if (clk_desc_array[i].data) {
  89 -                       const char *clk_name = *(const char **)(clk_desc_array[i].data);
  90 -
  91 -                       if (!strcmp(name, clk_name))
  92 -                               return rp1_clk_claimed[i];
  93 -               }
  94 -       }
  95 -
  96 -       return false;
  97 -}
  98 -
  99  static int rp1_clk_probe(struct platform_device *pdev)
 100  {
 101         const struct rp1_clk_desc *desc;
 102 @@ -2422,7 +2401,6 @@ static int rp1_clk_probe(struct platform
 103         const size_t asize = ARRAY_SIZE(clk_desc_array);
 104         u32 chip_id, platform;
 105         unsigned int i;
 106 -       u32 clk_id;
 107         int ret;
 108
 109         clockman = devm_kzalloc(dev, struct_size(clockman, onecell.hws, asize),
 110 @@ -2439,13 +2417,6 @@ static int rp1_clk_probe(struct platform
 111         if (IS_ERR(clockman->regs))
 112                 return PTR_ERR(clockman->regs);
 113
 114 -       memset(rp1_clk_claimed, 0, sizeof(rp1_clk_claimed));
 115 -       for (i = 0;
 116 -            !of_property_read_u32_index(pdev->dev.of_node, "claim-clocks",
 117 -                                        i, &clk_id);
 118 -            i++)
 119 -               rp1_clk_claimed[clk_id] = true;
 120 -
 121         platform_set_drvdata(pdev, clockman);
 122
 123         clockman->onecell.num = asize;