git.ipfire.org Git - thirdparty/openwrt.git/blob

   1 From 6f2a136f210d0e4178fbb5dc3fb5f765ef4c431d Mon Sep 17 00:00:00 2001
   2 From: Phil Elwell <phil@raspberrypi.com>
   3 Date: Thu, 29 Feb 2024 11:53:44 +0000
   4 Subject: [PATCH 0931/1085] fixup! ASoC: dwc: Defer bclk_ratio handling to
   5  hw_params
   6
   7 See: https://github.com/raspberrypi/linux/issues/5743#issuecomment-1962740328
   8
   9 Signed-off-by: Phil Elwell <phil@raspberrypi.com>
  10 ---
  11  sound/soc/dwc/dwc-i2s.c | 51 ++++++++++++++++++++---------------------
  12  1 file changed, 25 insertions(+), 26 deletions(-)
  13
  14 --- a/sound/soc/dwc/dwc-i2s.c
  15 +++ b/sound/soc/dwc/dwc-i2s.c
  16 @@ -287,21 +287,18 @@ static int dw_i2s_hw_params(struct snd_p
  17         case SNDRV_PCM_FORMAT_S16_LE:
  18                 config->data_width = 16;
  19                 dma_data->dt.addr_width = 2;
  20 -               dev->ccr = 0x00;
  21                 dev->xfer_resolution = 0x02;
  22                 break;
  23
  24         case SNDRV_PCM_FORMAT_S24_LE:
  25                 config->data_width = 24;
  26                 dma_data->dt.addr_width = 4;
  27 -               dev->ccr = 0x08;
  28                 dev->xfer_resolution = 0x04;
  29                 break;
  30
  31         case SNDRV_PCM_FORMAT_S32_LE:
  32                 config->data_width = 32;
  33                 dma_data->dt.addr_width = 4;
  34 -               dev->ccr = 0x10;
  35                 dev->xfer_resolution = 0x05;
  36                 break;
  37
  38 @@ -313,25 +310,6 @@ static int dw_i2s_hw_params(struct snd_p
  39         if (dev->tdm_slots)
  40                 config->data_width = 32;
  41
  42 -       if ((dev->capability & DW_I2S_MASTER) && dev->bclk_ratio) {
  43 -               switch (dev->bclk_ratio) {
  44 -               case 32:
  45 -                       dev->ccr = 0x00;
  46 -                       break;
  47 -
  48 -               case 48:
  49 -                       dev->ccr = 0x08;
  50 -                       break;
  51 -
  52 -               case 64:
  53 -                       dev->ccr = 0x10;
  54 -                       break;
  55 -
  56 -               default:
  57 -                       return -EINVAL;
  58 -               }
  59 -       }
  60 -
  61         config->chan_nr = params_channels(params);
  62
  63         switch (config->chan_nr) {
  64 @@ -347,11 +325,31 @@ static int dw_i2s_hw_params(struct snd_p
  65
  66         dw_i2s_config(dev, substream->stream);
  67
  68 -       i2s_write_reg(dev->i2s_base, CCR, dev->ccr);
  69 -
  70         config->sample_rate = params_rate(params);
  71
  72         if (dev->capability & DW_I2S_MASTER) {
  73 +               u32 frame_length = config->data_width * 2;
  74 +
  75 +               if (dev->bclk_ratio)
  76 +                       frame_length = dev->bclk_ratio;
  77 +
  78 +               switch (frame_length) {
  79 +               case 32:
  80 +                       dev->ccr = 0x00;
  81 +                       break;
  82 +
  83 +               case 48:
  84 +                       dev->ccr = 0x08;
  85 +                       break;
  86 +
  87 +               case 64:
  88 +                       dev->ccr = 0x10;
  89 +                       break;
  90 +
  91 +               default:
  92 +                       return -EINVAL;
  93 +               }
  94 +
  95                 if (dev->i2s_clk_cfg) {
  96                         ret = dev->i2s_clk_cfg(config);
  97                         if (ret < 0) {
  98 @@ -359,8 +357,7 @@ static int dw_i2s_hw_params(struct snd_p
  99                                 return ret;
 100                         }
 101                 } else {
 102 -                       u32 bitclk = config->sample_rate *
 103 -                                       config->data_width * 2;
 104 +                       u32 bitclk = config->sample_rate * frame_length;
 105
 106                         ret = clk_set_rate(dev->clk, bitclk);
 107                         if (ret) {
 108 @@ -369,6 +366,8 @@ static int dw_i2s_hw_params(struct snd_p
 109                                 return ret;
 110                         }
 111                 }
 112 +
 113 +               i2s_write_reg(dev->i2s_base, CCR, dev->ccr);
 114         }
 115         return 0;
 116  }