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1 From 239df148741e35d5b54749a624f96dfcacc7c57e Mon Sep 17 00:00:00 2001
2 From: Dave Stevenson <dave.stevenson@raspberrypi.com>
3 Date: Mon, 14 Oct 2024 15:37:57 +0100
4 Subject: [PATCH 1321/1350] dtoverlays: Fix up imx500 overlays to have unique
5 clock nodes
6
7 The overlay was creating DT nodes /clocks/clk-aicam and
8 /clocks/clk-aicam-gated for both cam0 and cam1, which resulted
9 in one failing.
10
11 The clock infrastructure creates the clock name from the node name
12 without any @N reg extension, so we can't just use that. The nodes
13 therefore have to be renamed.
14
15 Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
16 ---
17 arch/arm/boot/dts/overlays/imx500-overlay.dts | 10 ++++++----
18 arch/arm/boot/dts/overlays/imx500-pi5-overlay.dts | 10 ++++++----
19 2 files changed, 12 insertions(+), 8 deletions(-)
20
21 --- a/arch/arm/boot/dts/overlays/imx500-overlay.dts
22 +++ b/arch/arm/boot/dts/overlays/imx500-overlay.dts
23 @@ -72,16 +72,16 @@
24 };
25 };
26
27 - clocks_frag: fragment@104 {
28 + fragment@104 {
29 target-path = "/clocks";
30 __overlay__ {
31 - clk_aicam: clk-aicam {
32 + clk_aicam: clk-aicam1 {
33 compatible = "fixed-clock";
34 #clock-cells = <0>;
35 clock-frequency = <24000000>;
36 };
37
38 - clk_aicam_gated: clk-aicam-gated {
39 + clk_aicam_gated: clk-aicam-gated1 {
40 compatible = "gpio-gate-clock";
41 clocks = <&clk_aicam>;
42 #clock-cells = <0>;
43 @@ -98,7 +98,9 @@
44 <&csi_frag>, "target:0=",<&csi0>,
45 <&spi_bridge>, "power-supply:0=",<&cam0_reg>,
46 <&reg_frag>, "target:0=",<&cam0_reg>,
47 - <&cam_node>, "VANA-supply:0=",<&cam0_reg>;
48 + <&cam_node>, "VANA-supply:0=",<&cam0_reg>,
49 + <&clk_aicam>,"name=clk-aicam0",
50 + <&clk_aicam_gated>,"name=clk-aicam-gated0";
51 bypass-cache = <&spi_bridge>,"bypass-cache?";
52 };
53 };
54 --- a/arch/arm/boot/dts/overlays/imx500-pi5-overlay.dts
55 +++ b/arch/arm/boot/dts/overlays/imx500-pi5-overlay.dts
56 @@ -75,16 +75,16 @@
57 };
58 };
59
60 - clocks_frag: fragment@104 {
61 + fragment@104 {
62 target-path = "/clocks";
63 __overlay__ {
64 - clk_aicam: clk-aicam {
65 + clk_aicam: clk-aicam1 {
66 compatible = "fixed-clock";
67 #clock-cells = <0>;
68 clock-frequency = <24000000>;
69 };
70
71 - clk_aicam_gated: clk-aicam-gated {
72 + clk_aicam_gated: clk-aicam-gated1 {
73 compatible = "gpio-gate-clock";
74 clocks = <&clk_aicam>;
75 #clock-cells = <0>;
76 @@ -103,7 +103,9 @@
77 <&spi_frag_overlay>, "fast_xfer-gpios:16=35", // CD0_IO1_MICDAT0 (clock)
78 <&spi_bridge>, "power-supply:0=",<&cam0_reg>,
79 <&reg_frag>, "target:0=",<&cam0_reg>,
80 - <&cam_node>, "VANA-supply:0=",<&cam0_reg>;
81 + <&cam_node>, "VANA-supply:0=",<&cam0_reg>,
82 + <&clk_aicam>,"name=clk-aicam0",
83 + <&clk_aicam_gated>,"name=clk-aicam-gated0";
84 bypass-cache = <&spi_bridge>,"bypass-cache?";
85 };
86 };