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1 From 67d915604e6993ff627ac001983a2de63ff71b13 Mon Sep 17 00:00:00 2001
2 From: Bitterblue Smith <rtl8821cerfe2@gmail.com>
3 Date: Wed, 23 Oct 2024 17:12:39 +0300
4 Subject: [PATCH] wifi: rtw88: Move pwr_track_tbl to struct rtw_rfe_def
5
6 RTL8812AU uses one set of TX power tracking tables for RFE 3, and
7 another set for everything else.
8
9 Move pwr_track_tbl from struct rtw_chip_info to struct rtw_rfe_def in
10 order to load the right set of tables for each RFE (RF front end) type.
11
12 Signed-off-by: Bitterblue Smith <rtl8821cerfe2@gmail.com>
13 Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
14 Link: https://patch.msgid.link/904d0ab1-c046-40cd-a3a3-d4fdcf663c9d@gmail.com
15 ---
16 drivers/net/wireless/realtek/rtw88/main.h | 8 ++++---
17 drivers/net/wireless/realtek/rtw88/phy.c | 3 ++-
18 drivers/net/wireless/realtek/rtw88/rtw8703b.c | 12 +++++-----
19 drivers/net/wireless/realtek/rtw88/rtw8723d.c | 12 +++++-----
20 drivers/net/wireless/realtek/rtw88/rtw8723x.c | 3 ++-
21 drivers/net/wireless/realtek/rtw88/rtw8821c.c | 17 +++++++-------
22 drivers/net/wireless/realtek/rtw88/rtw8822b.c | 15 ++++++------
23 drivers/net/wireless/realtek/rtw88/rtw8822c.c | 23 +++++++++----------
24 8 files changed, 47 insertions(+), 46 deletions(-)
25
26 --- a/drivers/net/wireless/realtek/rtw88/main.h
27 +++ b/drivers/net/wireless/realtek/rtw88/main.h
28 @@ -1099,17 +1099,20 @@ enum rtw_rfe_fem {
29 struct rtw_rfe_def {
30 const struct rtw_table *phy_pg_tbl;
31 const struct rtw_table *txpwr_lmt_tbl;
32 + const struct rtw_pwr_track_tbl *pwr_track_tbl;
33 const struct rtw_table *agc_btg_tbl;
34 };
35
36 -#define RTW_DEF_RFE(chip, bb_pg, pwrlmt) { \
37 +#define RTW_DEF_RFE(chip, bb_pg, pwrlmt, track) { \
38 .phy_pg_tbl = &rtw ## chip ## _bb_pg_type ## bb_pg ## _tbl, \
39 .txpwr_lmt_tbl = &rtw ## chip ## _txpwr_lmt_type ## pwrlmt ## _tbl, \
40 + .pwr_track_tbl = &rtw ## chip ## _pwr_track_type ## track ## _tbl, \
41 }
42
43 -#define RTW_DEF_RFE_EXT(chip, bb_pg, pwrlmt, btg) { \
44 +#define RTW_DEF_RFE_EXT(chip, bb_pg, pwrlmt, track, btg) { \
45 .phy_pg_tbl = &rtw ## chip ## _bb_pg_type ## bb_pg ## _tbl, \
46 .txpwr_lmt_tbl = &rtw ## chip ## _txpwr_lmt_type ## pwrlmt ## _tbl, \
47 + .pwr_track_tbl = &rtw ## chip ## _pwr_track_type ## track ## _tbl, \
48 .agc_btg_tbl = &rtw ## chip ## _agc_btg_type ## btg ## _tbl, \
49 }
50
51 @@ -1243,7 +1246,6 @@ struct rtw_chip_info {
52 u16 dpd_ratemask;
53 u8 iqk_threshold;
54 u8 lck_threshold;
55 - const struct rtw_pwr_track_tbl *pwr_track_tbl;
56
57 u8 bfer_su_max_num;
58 u8 bfer_mu_max_num;
59 --- a/drivers/net/wireless/realtek/rtw88/phy.c
60 +++ b/drivers/net/wireless/realtek/rtw88/phy.c
61 @@ -2384,7 +2384,8 @@ void rtw_phy_init_tx_power(struct rtw_de
62 void rtw_phy_config_swing_table(struct rtw_dev *rtwdev,
63 struct rtw_swing_table *swing_table)
64 {
65 - const struct rtw_pwr_track_tbl *tbl = rtwdev->chip->pwr_track_tbl;
66 + const struct rtw_rfe_def *rfe_def = rtw_get_rfe_def(rtwdev);
67 + const struct rtw_pwr_track_tbl *tbl = rfe_def->pwr_track_tbl;
68 u8 channel = rtwdev->hal.current_channel;
69
70 if (IS_CH_2G_BAND(channel)) {
71 --- a/drivers/net/wireless/realtek/rtw88/rtw8703b.c
72 +++ b/drivers/net/wireless/realtek/rtw88/rtw8703b.c
73 @@ -493,11 +493,6 @@ static const struct rtw_pwr_seq_cmd * co
74 NULL
75 };
76
77 -static const struct rtw_rfe_def rtw8703b_rfe_defs[] = {
78 - [0] = { .phy_pg_tbl = &rtw8703b_bb_pg_tbl,
79 - .txpwr_lmt_tbl = &rtw8703b_txpwr_lmt_tbl,},
80 -};
81 -
82 static const struct rtw_page_table page_table_8703b[] = {
83 {12, 2, 2, 0, 1},
84 {12, 2, 2, 0, 1},
85 @@ -1818,6 +1813,12 @@ static const struct rtw_pwr_track_tbl rt
86 .pwrtrk_xtal_p = rtw8703b_pwrtrk_xtal_p,
87 };
88
89 +static const struct rtw_rfe_def rtw8703b_rfe_defs[] = {
90 + [0] = { .phy_pg_tbl = &rtw8703b_bb_pg_tbl,
91 + .txpwr_lmt_tbl = &rtw8703b_txpwr_lmt_tbl,
92 + .pwr_track_tbl = &rtw8703b_rtw_pwr_track_tbl, },
93 +};
94 +
95 /* Shared-Antenna Coex Table */
96 static const struct coex_table_para table_sant_8703b[] = {
97 {0xffffffff, 0xffffffff}, /* case-0 */
98 @@ -1997,7 +1998,6 @@ const struct rtw_chip_info rtw8703b_hw_s
99 .rfe_defs_size = ARRAY_SIZE(rtw8703b_rfe_defs),
100
101 .iqk_threshold = 8,
102 - .pwr_track_tbl = &rtw8703b_rtw_pwr_track_tbl,
103
104 /* WOWLAN firmware exists, but not implemented yet */
105 .wow_fw_name = "rtw88/rtw8703b_wow_fw.bin",
106 --- a/drivers/net/wireless/realtek/rtw88/rtw8723d.c
107 +++ b/drivers/net/wireless/realtek/rtw88/rtw8723d.c
108 @@ -2020,11 +2020,6 @@ static const struct rtw_intf_phy_para_ta
109 .n_gen1_para = ARRAY_SIZE(pcie_gen1_param_8723d),
110 };
111
112 -static const struct rtw_rfe_def rtw8723d_rfe_defs[] = {
113 - [0] = { .phy_pg_tbl = &rtw8723d_bb_pg_tbl,
114 - .txpwr_lmt_tbl = &rtw8723d_txpwr_lmt_tbl,},
115 -};
116 -
117 static const u8 rtw8723d_pwrtrk_2gb_n[] = {
118 0, 0, 1, 1, 1, 2, 2, 3, 4, 4, 4, 4, 5, 5, 5,
119 6, 6, 7, 7, 8, 8, 8, 9, 9, 9, 10, 10, 10, 10, 10
120 @@ -2088,6 +2083,12 @@ static const struct rtw_pwr_track_tbl rt
121 .pwrtrk_xtal_n = rtw8723d_pwrtrk_xtal_n,
122 };
123
124 +static const struct rtw_rfe_def rtw8723d_rfe_defs[] = {
125 + [0] = { .phy_pg_tbl = &rtw8723d_bb_pg_tbl,
126 + .txpwr_lmt_tbl = &rtw8723d_txpwr_lmt_tbl,
127 + .pwr_track_tbl = &rtw8723d_rtw_pwr_track_tbl, },
128 +};
129 +
130 static const struct rtw_reg_domain coex_info_hw_regs_8723d[] = {
131 {0x948, MASKDWORD, RTW_REG_DOMAIN_MAC32},
132 {0x67, BIT(7), RTW_REG_DOMAIN_MAC8},
133 @@ -2159,7 +2160,6 @@ const struct rtw_chip_info rtw8723d_hw_s
134 .rfe_defs = rtw8723d_rfe_defs,
135 .rfe_defs_size = ARRAY_SIZE(rtw8723d_rfe_defs),
136 .rx_ldpc = false,
137 - .pwr_track_tbl = &rtw8723d_rtw_pwr_track_tbl,
138 .iqk_threshold = 8,
139 .ampdu_density = IEEE80211_HT_MPDU_DENSITY_16,
140 .max_scan_ie_len = IEEE80211_MAX_DATA_LEN,
141 --- a/drivers/net/wireless/realtek/rtw88/rtw8723x.c
142 +++ b/drivers/net/wireless/realtek/rtw88/rtw8723x.c
143 @@ -595,7 +595,8 @@ void __rtw8723x_pwrtrack_set_xtal(struct
144 u8 delta)
145 {
146 struct rtw_dm_info *dm_info = &rtwdev->dm_info;
147 - const struct rtw_pwr_track_tbl *tbl = rtwdev->chip->pwr_track_tbl;
148 + const struct rtw_rfe_def *rfe_def = rtw_get_rfe_def(rtwdev);
149 + const struct rtw_pwr_track_tbl *tbl = rfe_def->pwr_track_tbl;
150 const s8 *pwrtrk_xtal;
151 s8 xtal_cap;
152
153 --- a/drivers/net/wireless/realtek/rtw88/rtw8821c.c
154 +++ b/drivers/net/wireless/realtek/rtw88/rtw8821c.c
155 @@ -1581,13 +1581,6 @@ static const struct rtw_intf_phy_para_ta
156 .n_gen2_para = ARRAY_SIZE(pcie_gen2_param_8821c),
157 };
158
159 -static const struct rtw_rfe_def rtw8821c_rfe_defs[] = {
160 - [0] = RTW_DEF_RFE(8821c, 0, 0),
161 - [2] = RTW_DEF_RFE_EXT(8821c, 0, 0, 2),
162 - [4] = RTW_DEF_RFE_EXT(8821c, 0, 0, 2),
163 - [6] = RTW_DEF_RFE(8821c, 0, 0),
164 -};
165 -
166 static const struct rtw_hw_reg rtw8821c_dig[] = {
167 [0] = { .addr = 0xc50, .mask = 0x7f },
168 };
169 @@ -1899,7 +1892,7 @@ static const u8 rtw8821c_pwrtrk_2g_cck_a
170 5, 6, 6, 7, 7, 7, 8, 8, 9, 9, 9, 9, 9, 9
171 };
172
173 -static const struct rtw_pwr_track_tbl rtw8821c_rtw_pwr_track_tbl = {
174 +static const struct rtw_pwr_track_tbl rtw8821c_pwr_track_type0_tbl = {
175 .pwrtrk_5gb_n[0] = rtw8821c_pwrtrk_5gb_n[0],
176 .pwrtrk_5gb_n[1] = rtw8821c_pwrtrk_5gb_n[1],
177 .pwrtrk_5gb_n[2] = rtw8821c_pwrtrk_5gb_n[2],
178 @@ -1922,6 +1915,13 @@ static const struct rtw_pwr_track_tbl rt
179 .pwrtrk_2g_ccka_p = rtw8821c_pwrtrk_2g_cck_a_p,
180 };
181
182 +static const struct rtw_rfe_def rtw8821c_rfe_defs[] = {
183 + [0] = RTW_DEF_RFE(8821c, 0, 0, 0),
184 + [2] = RTW_DEF_RFE_EXT(8821c, 0, 0, 0, 2),
185 + [4] = RTW_DEF_RFE_EXT(8821c, 0, 0, 0, 2),
186 + [6] = RTW_DEF_RFE(8821c, 0, 0, 0),
187 +};
188 +
189 static const struct rtw_reg_domain coex_info_hw_regs_8821c[] = {
190 {0xCB0, MASKDWORD, RTW_REG_DOMAIN_MAC32},
191 {0xCB4, MASKDWORD, RTW_REG_DOMAIN_MAC32},
192 @@ -1994,7 +1994,6 @@ const struct rtw_chip_info rtw8821c_hw_s
193 .rfe_defs = rtw8821c_rfe_defs,
194 .rfe_defs_size = ARRAY_SIZE(rtw8821c_rfe_defs),
195 .rx_ldpc = false,
196 - .pwr_track_tbl = &rtw8821c_rtw_pwr_track_tbl,
197 .iqk_threshold = 8,
198 .bfer_su_max_num = 2,
199 .bfer_mu_max_num = 1,
200 --- a/drivers/net/wireless/realtek/rtw88/rtw8822b.c
201 +++ b/drivers/net/wireless/realtek/rtw88/rtw8822b.c
202 @@ -2072,12 +2072,6 @@ static const struct rtw_intf_phy_para_ta
203 .n_gen2_para = ARRAY_SIZE(pcie_gen2_param_8822b),
204 };
205
206 -static const struct rtw_rfe_def rtw8822b_rfe_defs[] = {
207 - [2] = RTW_DEF_RFE(8822b, 2, 2),
208 - [3] = RTW_DEF_RFE(8822b, 3, 0),
209 - [5] = RTW_DEF_RFE(8822b, 5, 5),
210 -};
211 -
212 static const struct rtw_hw_reg rtw8822b_dig[] = {
213 [0] = { .addr = 0xc50, .mask = 0x7f },
214 [1] = { .addr = 0xe50, .mask = 0x7f },
215 @@ -2432,7 +2426,7 @@ static const u8 rtw8822b_pwrtrk_2g_cck_a
216 10, 11, 11, 12, 12, 13, 13, 14, 14, 15
217 };
218
219 -static const struct rtw_pwr_track_tbl rtw8822b_rtw_pwr_track_tbl = {
220 +static const struct rtw_pwr_track_tbl rtw8822b_pwr_track_type0_tbl = {
221 .pwrtrk_5gb_n[RTW_PWR_TRK_5G_1] = rtw8822b_pwrtrk_5gb_n[RTW_PWR_TRK_5G_1],
222 .pwrtrk_5gb_n[RTW_PWR_TRK_5G_2] = rtw8822b_pwrtrk_5gb_n[RTW_PWR_TRK_5G_2],
223 .pwrtrk_5gb_n[RTW_PWR_TRK_5G_3] = rtw8822b_pwrtrk_5gb_n[RTW_PWR_TRK_5G_3],
224 @@ -2455,6 +2449,12 @@ static const struct rtw_pwr_track_tbl rt
225 .pwrtrk_2g_ccka_p = rtw8822b_pwrtrk_2g_cck_a_p,
226 };
227
228 +static const struct rtw_rfe_def rtw8822b_rfe_defs[] = {
229 + [2] = RTW_DEF_RFE(8822b, 2, 2, 0),
230 + [3] = RTW_DEF_RFE(8822b, 3, 0, 0),
231 + [5] = RTW_DEF_RFE(8822b, 5, 5, 0),
232 +};
233 +
234 static const struct rtw_reg_domain coex_info_hw_regs_8822b[] = {
235 {0xcb0, MASKDWORD, RTW_REG_DOMAIN_MAC32},
236 {0xcb4, MASKDWORD, RTW_REG_DOMAIN_MAC32},
237 @@ -2535,7 +2535,6 @@ const struct rtw_chip_info rtw8822b_hw_s
238 .rf_tbl = {&rtw8822b_rf_a_tbl, &rtw8822b_rf_b_tbl},
239 .rfe_defs = rtw8822b_rfe_defs,
240 .rfe_defs_size = ARRAY_SIZE(rtw8822b_rfe_defs),
241 - .pwr_track_tbl = &rtw8822b_rtw_pwr_track_tbl,
242 .iqk_threshold = 8,
243 .bfer_su_max_num = 2,
244 .bfer_mu_max_num = 1,
245 --- a/drivers/net/wireless/realtek/rtw88/rtw8822c.c
246 +++ b/drivers/net/wireless/realtek/rtw88/rtw8822c.c
247 @@ -4883,16 +4883,6 @@ static const struct rtw_intf_phy_para_ta
248 .n_gen2_para = ARRAY_SIZE(pcie_gen2_param_8822c),
249 };
250
251 -static const struct rtw_rfe_def rtw8822c_rfe_defs[] = {
252 - [0] = RTW_DEF_RFE(8822c, 0, 0),
253 - [1] = RTW_DEF_RFE(8822c, 0, 0),
254 - [2] = RTW_DEF_RFE(8822c, 0, 0),
255 - [3] = RTW_DEF_RFE(8822c, 0, 0),
256 - [4] = RTW_DEF_RFE(8822c, 0, 0),
257 - [5] = RTW_DEF_RFE(8822c, 0, 5),
258 - [6] = RTW_DEF_RFE(8822c, 0, 0),
259 -};
260 -
261 static const struct rtw_hw_reg rtw8822c_dig[] = {
262 [0] = { .addr = 0x1d70, .mask = 0x7f },
263 [1] = { .addr = 0x1d70, .mask = 0x7f00 },
264 @@ -5238,7 +5228,7 @@ static const u8 rtw8822c_pwrtrk_2g_cck_a
265 18, 18, 19, 20, 21, 22, 23, 24, 24, 25
266 };
267
268 -static const struct rtw_pwr_track_tbl rtw8822c_rtw_pwr_track_tbl = {
269 +static const struct rtw_pwr_track_tbl rtw8822c_pwr_track_type0_tbl = {
270 .pwrtrk_5gb_n[RTW_PWR_TRK_5G_1] = rtw8822c_pwrtrk_5gb_n[RTW_PWR_TRK_5G_1],
271 .pwrtrk_5gb_n[RTW_PWR_TRK_5G_2] = rtw8822c_pwrtrk_5gb_n[RTW_PWR_TRK_5G_2],
272 .pwrtrk_5gb_n[RTW_PWR_TRK_5G_3] = rtw8822c_pwrtrk_5gb_n[RTW_PWR_TRK_5G_3],
273 @@ -5261,6 +5251,16 @@ static const struct rtw_pwr_track_tbl rt
274 .pwrtrk_2g_ccka_p = rtw8822c_pwrtrk_2g_cck_a_p,
275 };
276
277 +static const struct rtw_rfe_def rtw8822c_rfe_defs[] = {
278 + [0] = RTW_DEF_RFE(8822c, 0, 0, 0),
279 + [1] = RTW_DEF_RFE(8822c, 0, 0, 0),
280 + [2] = RTW_DEF_RFE(8822c, 0, 0, 0),
281 + [3] = RTW_DEF_RFE(8822c, 0, 0, 0),
282 + [4] = RTW_DEF_RFE(8822c, 0, 0, 0),
283 + [5] = RTW_DEF_RFE(8822c, 0, 5, 0),
284 + [6] = RTW_DEF_RFE(8822c, 0, 0, 0),
285 +};
286 +
287 static const struct rtw_hw_reg_offset rtw8822c_edcca_th[] = {
288 [EDCCA_TH_L2H_IDX] = {
289 {.addr = 0x84c, .mask = MASKBYTE2}, .offset = 0x80
290 @@ -5360,7 +5360,6 @@ const struct rtw_chip_info rtw8822c_hw_s
291 .rfe_defs_size = ARRAY_SIZE(rtw8822c_rfe_defs),
292 .en_dis_dpd = true,
293 .dpd_ratemask = DIS_DPD_RATEALL,
294 - .pwr_track_tbl = &rtw8822c_rtw_pwr_track_tbl,
295 .iqk_threshold = 8,
296 .lck_threshold = 8,
297 .bfer_su_max_num = 2,
Mirror of https://github.com/openwrt/openwrt.git