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1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 /dts-v1/;
3 /plugin/;
4
5 #include <dt-bindings/gpio/gpio.h>
6
7 / {
8 compatible = "bananapi,bpi-r4", "mediatek,mt7988a";
9
10 fragment@0 {
11 target-path = "/";
12 __overlay__ {
13 wifi_12v: regulator-wifi-12v {
14 compatible = "regulator-fixed";
15 regulator-name = "wifi";
16 regulator-min-microvolt = <12000000>;
17 regulator-max-microvolt = <12000000>;
18 gpios = <&pio 4 GPIO_ACTIVE_HIGH>;
19 enable-active-high;
20 regulator-always-on;
21 };
22 };
23 };
24
25 fragment@1 {
26 target = <&i2c_wifi>;
27 __overlay__ {
28 #address-cells = <1>;
29 #size-cells = <0>;
30
31 // 5G WIFI MAC Address EEPROM
32 wifi_eeprom@51 {
33 compatible = "atmel,24c02";
34 reg = <0x51>;
35 address-bits = <8>;
36 page-size = <8>;
37 size = <256>;
38
39 nvmem-layout {
40 compatible = "fixed-layout";
41 #address-cells = <1>;
42 #size-cells = <1>;
43
44 macaddr_5g: macaddr@0 {
45 reg = <0x0 0x6>;
46 };
47 };
48 };
49
50 // 6G WIFI MAC Address EEPROM
51 wifi_eeprom@52 {
52 compatible = "atmel,24c02";
53 reg = <0x52>;
54 address-bits = <8>;
55 page-size = <8>;
56 size = <256>;
57
58 nvmem-layout {
59 compatible = "fixed-layout";
60 #address-cells = <1>;
61 #size-cells = <1>;
62
63 macaddr_6g: macaddr@0 {
64 reg = <0x0 0x6>;
65 };
66 };
67 };
68 };
69 };
70
71 fragment@2 {
72 target = <&pcie0>;
73 __overlay__ {
74 #address-cells = <3>;
75 #size-cells = <2>;
76
77 pcie@0,0 {
78 #address-cells = <3>;
79 #size-cells = <2>;
80 reg = <0x0000 0 0 0 0>;
81
82 wifi@0,0 {
83 compatible = "mediatek,mt76";
84 reg = <0x0000 0 0 0 0>;
85 nvmem-cell-names = "mac-address";
86 nvmem-cells = <&macaddr_5g>;
87 };
88 };
89 };
90 };
91
92 fragment@3 {
93 target = <&pcie1>;
94 __overlay__ {
95 #address-cells = <3>;
96 #size-cells = <2>;
97
98 pcie@0,0 {
99 #address-cells = <3>;
100 #size-cells = <2>;
101 reg = <0x0000 0 0 0 0>;
102
103 wifi@0,0 {
104 compatible = "mediatek,mt76";
105 reg = <0x0000 0 0 0 0>;
106 nvmem-cell-names = "mac-address";
107 nvmem-cells = <&macaddr_6g>;
108 };
109 };
110 };
111 };
112 };