1 From: George Moussalem <george.moussalem@outlook.com>
2 Date: Wed, 27 Oct 2024 16:34:11 +0400
3 Subject: [PATCH] dt: bindings: net: add bindings for QCN6122
5 QCN6122 is a PCIe based solution that is attached to and enumerated
6 by the WPSS (Wireless Processor SubSystem) Q6 processor.
8 Though it is a PCIe device, since it is not attached to APSS processor
9 (Application Processor SubSystem), APSS will be unaware of such a decice
10 and hence it is registered to the APSS processor as a platform device(AHB).
11 Because of this hybrid nature, it is called as a hybrid bus device.
13 As such, QCN6122 is a hybrid bus type device and follows the same codepath
16 This is a reversed engineered and heavily simplified version of below
18 https://git.codelinaro.org/clo/qsdk/oss/system/feeds/wlan-open/-/ \
19 blob/NHSS.QSDK.12.4.5.r2/mac80211/patches/232-ath11k-qcn6122-support.patch
21 Signed-off-by: George Moussalem <george.moussalem@outlook.com>
23 --- a/Documentation/devicetree/bindings/net/wireless/qcom,ath11k.yaml
24 +++ b/Documentation/devicetree/bindings/net/wireless/qcom,ath11k.yaml
25 @@ -21,6 +21,7 @@ properties:
33 @@ -258,6 +259,29 @@ allOf:
34 - description: interrupt event for ring DP20
35 - description: interrupt event for ring DP21
36 - description: interrupt event for ring DP22
47 + - description: interrupt event for ring CE1
48 + - description: interrupt event for ring CE2
49 + - description: interrupt event for ring CE3
50 + - description: interrupt event for ring CE4
51 + - description: interrupt event for ring CE5
52 + - description: interrupt event for ring DP1
53 + - description: interrupt event for ring DP2
54 + - description: interrupt event for ring DP3
55 + - description: interrupt event for ring DP4
56 + - description: interrupt event for ring DP5
57 + - description: interrupt event for ring DP6
58 + - description: interrupt event for ring DP7
59 + - description: interrupt event for ring DP8