1 From dda83b1fb650670b865e8735115c00bdfccacabf Mon Sep 17 00:00:00 2001
2 From: Jonathan Bell <jonathan@raspberrypi.com>
3 Date: Fri, 24 May 2024 14:49:28 +0100
4 Subject: [PATCH 1107/1135] DTS: overlays: add mmio-hi parameter to
7 I225-V network adapters have a buggy ROM that won't complete internal
8 initialisation if (at least) BAR0 has an assigned address of 0x0.
10 Add a parameter to the pciex1-compat-pi5 overlay to make outbound
11 addresses start at 2GB.
13 Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
15 arch/arm/boot/dts/overlays/README | 2 ++
16 .../overlays/pciex1-compat-pi5-overlay.dts | 20 +++++++++++++++++++
17 2 files changed, 22 insertions(+)
19 --- a/arch/arm/boot/dts/overlays/README
20 +++ b/arch/arm/boot/dts/overlays/README
21 @@ -3550,6 +3550,8 @@ Params: l1ss Enable A
22 the MSI-MIP peripheral. Use if a) more than 8
23 interrupt vectors are required or b) the EP
24 requires DMA and MSI addresses to be 32bit.
25 + mmio-hi Move the start of outbound 32bit addresses to
26 + 2GB and expand 64bit outbound space to 14GB.
29 [ The pcf2127-rtc overlay has been deleted. See i2c-rtc. ]
30 --- a/arch/arm/boot/dts/overlays/pciex1-compat-pi5-overlay.dts
31 +++ b/arch/arm/boot/dts/overlays/pciex1-compat-pi5-overlay.dts
37 + * Shift the start of the 32bit outbound window to 2GB,
38 + * so there are no BARs starting at 0x0. Expand the 64bit
39 + * outbound window to use the spare 2GB.
44 + #address-cells = <3>;
46 + ranges = <0x02000000 0x00 0x80000000
49 + <0x43000000 0x04 0x00000000
59 + mmio-hi = <0>, "+3";