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   2   Copyright 1988-2022 Free Software Foundation, Inc.
   3   This is part of the GCC manual.
   4   For copying conditions, see the copyright.rst file.
   5
   6 .. _powerpc-function-attributes:
   7
   8 PowerPC Function Attributes
   9 ^^^^^^^^^^^^^^^^^^^^^^^^^^^
  10
  11 These function attributes are supported by the PowerPC back end:
  12
  13 .. index:: indirect calls, PowerPC, longcall function attribute, PowerPC, shortcall function attribute, PowerPC
  14
  15 .. powerpc-fn-attr:: longcall, shortcall
  16
  17   The :powerpc-fn-attr:`longcall` attribute
  18   indicates that the function might be far away from the call site and
  19   require a different (more expensive) calling sequence.  The
  20   ``shortcall`` attribute indicates that the function is always close
  21   enough for the shorter calling sequence to be used.  These attributes
  22   override both the :option:`-mlongcall` switch and
  23   the ``#pragma longcall`` setting.
  24
  25   See :ref:`rs-6000-and-powerpc-options`, for more information on whether long
  26   calls are necessary.
  27
  28 .. index:: target function attribute
  29
  30 .. powerpc-fn-attr:: target (options)
  31
  32   As discussed in :ref:`common-function-attributes`, this attribute
  33   allows specification of target-specific compilation options.
  34
  35   On the PowerPC, the following options are allowed:
  36
  37   :samp:`altivec` :samp:`no-altivec`
  38
  39     .. index:: target("altivec") function attribute, PowerPC
  40
  41     Generate code that uses (does not use) AltiVec instructions.  In
  42     32-bit code, you cannot enable AltiVec instructions unless
  43     :option:`-mabi=altivec` is used on the command line.
  44
  45   :samp:`cmpb` :samp:`no-cmpb`
  46
  47     .. index:: target("cmpb") function attribute, PowerPC
  48
  49     Generate code that uses (does not use) the compare bytes instruction
  50     implemented on the POWER6 processor and other processors that support
  51     the PowerPC V2.05 architecture.
  52
  53   :samp:`dlmzb` :samp:`no-dlmzb`
  54
  55     .. index:: target("dlmzb") function attribute, PowerPC
  56
  57     Generate code that uses (does not use) the string-search :samp:`dlmzb`
  58     instruction on the IBM 405, 440, 464 and 476 processors.  This instruction is
  59     generated by default when targeting those processors.
  60
  61   :samp:`fprnd` :samp:`no-fprnd`
  62
  63     .. index:: target("fprnd") function attribute, PowerPC
  64
  65     Generate code that uses (does not use) the FP round to integer
  66     instructions implemented on the POWER5+ processor and other processors
  67     that support the PowerPC V2.03 architecture.
  68
  69   :samp:`hard-dfp` :samp:`no-hard-dfp`
  70
  71     .. index:: target("hard-dfp") function attribute, PowerPC
  72
  73     Generate code that uses (does not use) the decimal floating-point
  74     instructions implemented on some POWER processors.
  75
  76   :samp:`isel` :samp:`no-isel`
  77
  78     .. index:: target("isel") function attribute, PowerPC
  79
  80     Generate code that uses (does not use) ISEL instruction.
  81
  82   :samp:`mfcrf` :samp:`no-mfcrf`
  83
  84     .. index:: target("mfcrf") function attribute, PowerPC
  85
  86     Generate code that uses (does not use) the move from condition
  87     register field instruction implemented on the POWER4 processor and
  88     other processors that support the PowerPC V2.01 architecture.
  89
  90   :samp:`mulhw` :samp:`no-mulhw`
  91
  92     .. index:: target("mulhw") function attribute, PowerPC
  93
  94     Generate code that uses (does not use) the half-word multiply and
  95     multiply-accumulate instructions on the IBM 405, 440, 464 and 476 processors.
  96     These instructions are generated by default when targeting those
  97     processors.
  98
  99   :samp:`multiple` :samp:`no-multiple`
 100
 101     .. index:: target("multiple") function attribute, PowerPC
 102
 103     Generate code that uses (does not use) the load multiple word
 104     instructions and the store multiple word instructions.
 105
 106   :samp:`update` :samp:`no-update`
 107
 108     .. index:: target("update") function attribute, PowerPC
 109
 110     Generate code that uses (does not use) the load or store instructions
 111     that update the base register to the address of the calculated memory
 112     location.
 113
 114   :samp:`popcntb` :samp:`no-popcntb`
 115
 116     .. index:: target("popcntb") function attribute, PowerPC
 117
 118     Generate code that uses (does not use) the popcount and double-precision
 119     FP reciprocal estimate instruction implemented on the POWER5
 120     processor and other processors that support the PowerPC V2.02
 121     architecture.
 122
 123   :samp:`popcntd` :samp:`no-popcntd`
 124
 125     .. index:: target("popcntd") function attribute, PowerPC
 126
 127     Generate code that uses (does not use) the popcount instruction
 128     implemented on the POWER7 processor and other processors that support
 129     the PowerPC V2.06 architecture.
 130
 131   :samp:`powerpc-gfxopt` :samp:`no-powerpc-gfxopt`
 132
 133     .. index:: target("powerpc-gfxopt") function attribute, PowerPC
 134
 135     Generate code that uses (does not use) the optional PowerPC
 136     architecture instructions in the Graphics group, including
 137     floating-point select.
 138
 139   :samp:`powerpc-gpopt` :samp:`no-powerpc-gpopt`
 140
 141     .. index:: target("powerpc-gpopt") function attribute, PowerPC
 142
 143     Generate code that uses (does not use) the optional PowerPC
 144     architecture instructions in the General Purpose group, including
 145     floating-point square root.
 146
 147   :samp:`recip-precision` :samp:`no-recip-precision`
 148
 149     .. index:: target("recip-precision") function attribute, PowerPC
 150
 151     Assume (do not assume) that the reciprocal estimate instructions
 152     provide higher-precision estimates than is mandated by the PowerPC
 153     ABI.
 154
 155   :samp:`string` :samp:`no-string`
 156
 157     .. index:: target("string") function attribute, PowerPC
 158
 159     Generate code that uses (does not use) the load string instructions
 160     and the store string word instructions to save multiple registers and
 161     do small block moves.
 162
 163   :samp:`vsx` :samp:`no-vsx`
 164
 165     .. index:: target("vsx") function attribute, PowerPC
 166
 167     Generate code that uses (does not use) vector/scalar (VSX)
 168     instructions, and also enable the use of built-in functions that allow
 169     more direct access to the VSX instruction set.  In 32-bit code, you
 170     cannot enable VSX or AltiVec instructions unless
 171     :option:`-mabi=altivec` is used on the command line.
 172
 173   :samp:`friz` :samp:`no-friz`
 174
 175     .. index:: target("friz") function attribute, PowerPC
 176
 177     Generate (do not generate) the ``friz`` instruction when the
 178     :option:`-funsafe-math-optimizations` option is used to optimize
 179     rounding a floating-point value to 64-bit integer and back to floating
 180     point.  The ``friz`` instruction does not return the same value if
 181     the floating-point number is too large to fit in an integer.
 182
 183   :samp:`avoid-indexed-addresses` :samp:`no-avoid-indexed-addresses`
 184
 185     .. index:: target("avoid-indexed-addresses") function attribute, PowerPC
 186
 187     Generate code that tries to avoid (not avoid) the use of indexed load
 188     or store instructions.
 189
 190   :samp:`paired` :samp:`no-paired`
 191
 192     .. index:: target("paired") function attribute, PowerPC
 193
 194     Generate code that uses (does not use) the generation of PAIRED simd
 195     instructions.
 196
 197   :samp:`longcall` :samp:`no-longcall`
 198
 199     .. index:: target("longcall") function attribute, PowerPC
 200
 201     Generate code that assumes (does not assume) that all calls are far
 202     away so that a longer more expensive calling sequence is required.
 203
 204   :samp:`cpu={CPU}`
 205
 206     .. index:: target("cpu=CPU") function attribute, PowerPC
 207
 208     Specify the architecture to generate code for when compiling the
 209     function.  If you select the ``target("cpu=power7")`` attribute when
 210     generating 32-bit code, VSX and AltiVec instructions are not generated
 211     unless you use the :option:`-mabi=altivec` option on the command line.
 212
 213   :samp:`tune={TUNE}`
 214
 215     .. index:: target("tune=TUNE") function attribute, PowerPC
 216
 217     Specify the architecture to tune for when compiling the function.  If
 218     you do not specify the ``target("tune=TUNE")`` attribute and
 219     you do specify the ``target("cpu=CPU")`` attribute,
 220     compilation tunes for the :samp:`{CPU}` architecture, and not the
 221     default tuning specified on the command line.
 222
 223   On the PowerPC, the inliner does not inline a
 224   function that has different target options than the caller, unless the
 225   callee has a subset of the target options of the caller.