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1 From 4a4286465b5d6c28968bc2b29ae08daca7f219a3 Mon Sep 17 00:00:00 2001
2 From: Nick Clifton <nickc@redhat.com>
3 Date: Fri, 18 Nov 2016 11:42:48 -0800
4 Subject: [PATCH] Fix the generation of alignment frags in code sections for AArch64.
5
6 PR gas/20364
7 * config/tc-aarch64.c (s_ltorg): Change the mapping state after
8 aligning the frag.
9 (aarch64_init): Treat rs_align frags in code sections as
10 containing code, not data.
11 * testsuite/gas/aarch64/pr20364.s: New test.
12 * testsuite/gas/aarch64/pr20364.d: New test driver.
13
14 Backporting the patch from binutils mainline
15 https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=7ea12e5c3ad54da440c08f32da09534e63e515ca
16
17 Upstream-Status: Backport
18
19 Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com>
20 ---
21 gas/ChangeLog | 10 ++++++++++
22 gas/config/tc-aarch64.c | 10 +++++++---
23 gas/testsuite/gas/aarch64/pr20364.d | 13 +++++++++++++
24 gas/testsuite/gas/aarch64/pr20364.s | 28 ++++++++++++++++++++++++++++
25 4 files changed, 58 insertions(+), 3 deletions(-)
26 create mode 100644 gas/testsuite/gas/aarch64/pr20364.d
27 create mode 100644 gas/testsuite/gas/aarch64/pr20364.s
28
29 diff --git a/gas/ChangeLog b/gas/ChangeLog
30 index a39895a..fad06dc 100644
31 --- a/gas/ChangeLog
32 +++ b/gas/ChangeLog
33 @@ -1,3 +1,13 @@
34 +2016-08-05 Nick Clifton <nickc@redhat.com>
35 +
36 + PR gas/20364
37 + * config/tc-aarch64.c (s_ltorg): Change the mapping state after
38 + aligning the frag.
39 + (aarch64_init): Treat rs_align frags in code sections as
40 + containing code, not data.
41 + * testsuite/gas/aarch64/pr20364.s: New test.
42 + * testsuite/gas/aarch64/pr20364.d: New test driver.
43 +
44 2016-08-03 Tristan Gingold <gingold@adacore.com>
45
46 * configure: Regenerate.
47 diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
48 index ddc40f2..74933cb 100644
49 --- a/gas/config/tc-aarch64.c
50 +++ b/gas/config/tc-aarch64.c
51 @@ -1736,13 +1736,13 @@ s_ltorg (int ignored ATTRIBUTE_UNUSED)
52 if (pool == NULL || pool->symbol == NULL || pool->next_free_entry == 0)
53 continue;
54
55 - mapping_state (MAP_DATA);
56 -
57 /* Align pool as you have word accesses.
58 Only make a frag if we have to. */
59 if (!need_pass_2)
60 frag_align (align, 0, 0);
61
62 + mapping_state (MAP_DATA);
63 +
64 record_alignment (now_seg, align);
65
66 sprintf (sym_name, "$$lit_\002%x", pool->id);
67 @@ -6373,11 +6373,15 @@ aarch64_init_frag (fragS * fragP, int max_chars)
68
69 switch (fragP->fr_type)
70 {
71 - case rs_align:
72 case rs_align_test:
73 case rs_fill:
74 mapping_state_2 (MAP_DATA, max_chars);
75 break;
76 + case rs_align:
77 + /* PR 20364: We can get alignment frags in code sections,
78 + so do not just assume that we should use the MAP_DATA state. */
79 + mapping_state_2 (subseg_text_p (now_seg) ? MAP_INSN : MAP_DATA, max_chars);
80 + break;
81 case rs_align_code:
82 mapping_state_2 (MAP_INSN, max_chars);
83 break;
84 diff --git a/gas/testsuite/gas/aarch64/pr20364.d b/gas/testsuite/gas/aarch64/pr20364.d
85 new file mode 100644
86 index 0000000..babcff1
87 --- /dev/null
88 +++ b/gas/testsuite/gas/aarch64/pr20364.d
89 @@ -0,0 +1,13 @@
90 +# Check that ".align <size>, <fill>" does not set the mapping state to DATA, causing unnecessary frag generation.
91 +#name: PR20364
92 +#objdump: -d
93 +
94 +.*: file format .*
95 +
96 +Disassembly of section \.vectors:
97 +
98 +0+000 <.*>:
99 + 0: d2800000 mov x0, #0x0 // #0
100 + 4: 94000000 bl 0 <plat_report_exception>
101 + 8: 17fffffe b 0 <bl1_exceptions>
102 +
103 diff --git a/gas/testsuite/gas/aarch64/pr20364.s b/gas/testsuite/gas/aarch64/pr20364.s
104 new file mode 100644
105 index 0000000..594ad7c
106 --- /dev/null
107 +++ b/gas/testsuite/gas/aarch64/pr20364.s
108 @@ -0,0 +1,28 @@
109 + .macro vector_base label
110 + .section .vectors, "ax"
111 + .align 11, 0
112 + \label:
113 + .endm
114 +
115 + .macro vector_entry label
116 + .section .vectors, "ax"
117 + .align 7, 0
118 + \label:
119 + .endm
120 +
121 + .macro check_vector_size since
122 + .if (. - \since) > (32 * 4)
123 + .error "Vector exceeds 32 instructions"
124 + .endif
125 + .endm
126 +
127 + .globl bl1_exceptions
128 +
129 +vector_base bl1_exceptions
130 +
131 +vector_entry SynchronousExceptionSP0
132 + mov x0, #0x0
133 + bl plat_report_exception
134 + b SynchronousExceptionSP0
135 + check_vector_size SynchronousExceptionSP0
136 +
137 --
138 2.7.4
139