git.ipfire.org Git - thirdparty/openwrt.git/blob

   1 From afee12219e87d273aacd9db6919ef649970dce0d Mon Sep 17 00:00:00 2001
   2 From: Dave Stevenson <dave.stevenson@raspberrypi.com>
   3 Date: Tue, 9 Jan 2024 17:37:00 +0000
   4 Subject: [PATCH 1060/1085] drm/bridge: tc358762: Program the DPI mode into the
   5  chip
   6
   7 The autodetection of resolution/timing by the TC358762 can lead
   8 to the display being shifted by a pixel or two.
   9
  10 Program the TC358762 with the requested mode timing so that
  11 it can reproduce it accurately.
  12
  13 Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
  14 ---
  15  drivers/gpu/drm/bridge/tc358762.c | 15 +++++++++++++++
  16  1 file changed, 15 insertions(+)
  17
  18 --- a/drivers/gpu/drm/bridge/tc358762.c
  19 +++ b/drivers/gpu/drm/bridge/tc358762.c
  20 @@ -53,6 +53,12 @@
  21  #define LCDCTRL_VSPOL          BIT(19) /* Polarity of VSYNC signal */
  22  #define LCDCTRL_VSDELAY(v)     (((v) & 0xfff) << 20) /* VSYNC delay */
  23
  24 +/* First parameter is in the 16bits, second is in the top 16bits */
  25 +#define LCD_HS_HBP             0x0424
  26 +#define LCD_HDISP_HFP          0x0428
  27 +#define LCD_VS_VBP             0x042c
  28 +#define LCD_VDISP_VFP          0x0430
  29 +
  30  /* SPI Master Registers */
  31  #define SPICMR                 0x0450
  32  #define SPITCR                 0x0454
  33 @@ -139,6 +145,15 @@ static int tc358762_init(struct tc358762
  34         tc358762_write(ctx, LCDCTRL, lcdctrl);
  35
  36         tc358762_write(ctx, SYSCTRL, 0x040f);
  37 +
  38 +       tc358762_write(ctx, LCD_HS_HBP, (ctx->mode.hsync_end - ctx->mode.hsync_start) |
  39 +                      ((ctx->mode.htotal - ctx->mode.hsync_end) << 16));
  40 +       tc358762_write(ctx, LCD_HDISP_HFP, ctx->mode.hdisplay |
  41 +                      ((ctx->mode.hsync_start - ctx->mode.hdisplay) << 16));
  42 +       tc358762_write(ctx, LCD_VS_VBP, (ctx->mode.vsync_end - ctx->mode.vsync_start) |
  43 +                      ((ctx->mode.vtotal - ctx->mode.vsync_end) << 16));
  44 +       tc358762_write(ctx, LCD_VDISP_VFP, ctx->mode.vdisplay |
  45 +                      ((ctx->mode.vsync_start - ctx->mode.vdisplay) << 16));
  46         msleep(100);
  47
  48         tc358762_write(ctx, PPI_STARTPPI, PPI_START_FUNCTION);