x86: Fix Logical Shift Issue in expand_vec_perm_psrlw_psllw_por [PR115146]

x86: Fix Logical Shift Issue in expand_vec_perm_psrlw_psllw_por [PR115146]

Replaced arithmetic shifts with logical shifts in expand_vec_perm_psrlw_psllw_por to avoid sign bit extension issues. Also corrected gen_vlshrv8hi3 to gen_lshrv8hi3 and gen_vashlv8hi3 to gen_ashlv8hi3.

Co-authored-by: H.J. Lu <hjl.tools@gmail.com>
gcc/ChangeLog:

	PR target/115146
	* config/i386/i386-expand.cc (expand_vec_perm_psrlw_psllw_por): Replace arithmatic shift
	gen_ashrv4hi3 with logic shift gen_lshrv4hi3.
	Replace gen_vlshrv8hi3 with gen_lshrv8hi3 and gen_vashlv8hi3 with gen_ashlv8hi3.

gcc/testsuite/ChangeLog:

	PR target/115146
	* g++.target/i386/pr107563-a.C: Append '-mno-sse3' to compile option
	to avoid test failure on hosts with SSE3 support.
	* g++.target/i386/pr107563-b.C: Append '-mno-sse3' to compile option
	to avoid test failure on hosts with SSE3 support.
	* gcc.target/i386/pr115146.c: New test.