[to-be-committed][RISC-V] Adjust testcases and finish register move costing fix

[to-be-committed][RISC-V] Adjust testcases and finish register move costing fix

The recent adjustment to more correctly cost register moves tripped a few
testsuite regressions.

I'm pretty torn on the thead test adjustments.  But in reality they only worked
because the register move costing was broken.  So I've reverted the scan-asm
part of those to a prior state for two of those tests.  The other was only
failing at -Og/-Oz which was added to the exclude list.

The other Zfa test is similar, but we can make the test behave with a suitable
-mtune option and thus preserve the test.

While investigating I also noted that vector moves aren't being handled
correctly for subclasses of the integer/fp register files.  So I fixed those
while I was in there.

Note this may have an impact on some of your work Pan.  I haven't followed the
changes from the last week or so due to illness.

Waiting on pre-commit's verdict, though it did spin through my tester
successfully, though not all of the regressions related to that change are
addressed (there's still one for rv32 I'll look at shortly).

gcc/
	* config/riscv/riscv.cc (riscv_register_move_cost): Handle
	subclasses with vector registers as well.

gcc/testsuite/

	* gcc.target/riscv/xtheadfmemidx-xtheadfmv-medany.c: Adjust expected
	output.
	* gcc.target/riscv/xtheadfmemidx-zfa-medany.c: Likewise.
	* gcc.target/riscv/xtheadfmv-fmv.c: Skip for -Os and -Oz.
	* gcc.target/riscv/zfa-fmovh-fmovp.c: Use sifive-p400 tuning.