]> git.ipfire.org Git - thirdparty/kernel/linux.git/commit
dt-bindings: arm: cix: add OrangePi 6 Plus board
authorGary Yang <gary.yang@cixtech.com>
Sat, 10 Jan 2026 09:34:05 +0000 (17:34 +0800)
committerPeter Chen <peter.chen@cixtech.com>
Mon, 12 Jan 2026 01:08:12 +0000 (09:08 +0800)
commit01a08fd967301e75b2a9350b28a3f09fa2c3b838
tree77865a96c0830f61342d14e14d953246a21185a1
parent8f0b4cce4481fb22653697cced8d0d04027cb1e8
dt-bindings: arm: cix: add OrangePi 6 Plus board

OrangePi 6 Plus adopts CIX CD8180/CD8160 SoC, built-in 12-core 64-bit
processor + NPU processor,integrated graphics processor, equipped with
16GB/32GB/64GB LPDDR5, and provides two M.2 KEY-M interfaces 2280 for NVMe
SSD,as well as SPI FLASH and TF slots to meet the needs of fast read/write
and high-capacity storage

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Gary Yang <gary.yang@cixtech.com>
Link: https://lore.kernel.org/r/20260110093406.2700505-2-gary.yang@cixtech.com
Signed-off-by: Peter Chen <peter.chen@cixtech.com>
Documentation/devicetree/bindings/arm/cix.yaml