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(parent: bc13c02) | patch
iommu/arm-smmu: fix programming of SMMU_CBn_TCR for stage 1
authorOlav Haugan <ohaugan@codeaurora.org>
Mon, 4 Aug 2014 18:01:02 +0000 (19:01 +0100)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Sun, 5 Oct 2014 20:41:00 +0000 (13:41 -0700)
commit0203e57c5d70d116d39d5cac8d594a0425e92d51
tree508406b066f0cdae562fa566f392736147946e8ctree | snapshot
parentbc13c021564c53278e64be4c2e5c1b8678a792abcommit | diff
iommu/arm-smmu: fix programming of SMMU_CBn_TCR for stage 1

commit 1fc870c7efa364862c3bc792cfbdb38afea26742 upstream.

Stage-1 context banks do not have the SMMU_CBn_TCR[SL0] field since it
is only applicable to stage-2 context banks.

This patch ensures that we don't set the reserved TCR bits for stage-1
translations.

Signed-off-by: Olav Haugan <ohaugan@codeaurora.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/iommu/arm-smmu.c diff | blob | blame | history
Mirror https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git