]> git.ipfire.org Git - thirdparty/kernel/stable.git/commit
drm/amd/display: prevent hang on link training fail
authorBrendan Tam <Brendan.Tam@amd.com>
Fri, 14 Mar 2025 17:09:13 +0000 (13:09 -0400)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Fri, 25 Apr 2025 08:47:58 +0000 (10:47 +0200)
commit0363c03672cd3191f037905bf981eb523a3b71b1
tree4e168636edc34813e91f92fca0707189f8bee627
parent531d4633641751c3fceac809f919c047ab421e09
drm/amd/display: prevent hang on link training fail

commit 8058061ed9d6bc259d1e678607b07d259342c08f upstream.

[Why]
When link training fails, the phy clock will be disabled. However, in
enable_streams, it is assumed that link training succeeded and the
mux selects the phy clock, causing a hang when a register write is made.

[How]
When enable_stream is hit, check if link training failed. If it did, fall
back to the ref clock to avoid a hang and keep the system in a recoverable
state.

Reviewed-by: Dillon Varone <dillon.varone@amd.com>
Signed-off-by: Brendan Tam <Brendan.Tam@amd.com>
Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c