]> git.ipfire.org Git - thirdparty/glibc.git/commit
riscv: memcpy_noalignment: Fold SZREG/BLOCK_SIZE alignment to single andi
authorYao Zihong <zihong.plct@isrc.iscas.ac.cn>
Thu, 30 Oct 2025 22:47:24 +0000 (17:47 -0500)
committerPeter Bergner <bergner@tenstorrent.com>
Thu, 30 Oct 2025 22:47:24 +0000 (17:47 -0500)
commit0698fd462a22d5e0fda71ef1dce04656d17a7c5f
tree3effd209c85311aa9eadfa279dc9bd9d70a65752
parent444d81284e5c07842b4af874cc7346fab3baae97
riscv: memcpy_noalignment: Fold SZREG/BLOCK_SIZE alignment to single andi

Simplify the alignment steps for SZREG and BLOCK_SIZE multiples. The previous
three-instruction sequences

    addi    a7, a2, -SZREG
    andi    a7, a7, -SZREG
    addi    a7, a7, SZREG

and

    addi    a7, a2, -BLOCK_SIZE
    andi    a7, a7, -BLOCK_SIZE
    addi    a7, a7, BLOCK_SIZE

are equivalent to a single

    andi    a7, a2, -SZREG
    andi    a7, a2, -BLOCK_SIZE

because SZREG and BLOCK_SIZE are powers of two in this context, making the
surrounding addi steps cancel out. Folding to one instruction reduces code
size with identical semantics.

No functional change.

sysdeps/riscv/multiarch/memcpy_noalignment.S: Remove redundant addi around
alignment; keep a single andi for SZREG/BLOCK_SIZE rounding.

Signed-off-by: Yao Zihong <zihong.plct@isrc.iscas.ac.cn>
Reviewed-by: Peter Bergner <bergner@tenstorrent.com>
sysdeps/riscv/multiarch/memcpy_noalignment.S